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Ordering number : ENA0913
Bi-CMOS IC
LV7107M
Overview
For Video/Audio Signal Input/ Output Interface of DVD Recorder
The LV7107M is an IC which integrates on a single chip the analog video/audio signal input switch and video drivers. The IC, which conforms to the Scart connector standard in Europe, is an interface optimal for use in DVD recorders in Europe and DVD complex machines.
Functions
* Video audio canal SW * S signal 3 input switch * 6dB amplifier * 6MHz/12MHz low pass filter * 11-channel video driver (AV1, AV2, Line output, S output, R*G*B output, component output) * Video signal detection * Composite sync output * Audio ALC
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage 1 Maximum supply voltage 2 Allowable power dissipation Operating temperature Storage temperature Symbol VCC max VCC max Pd max Ta75C Mounted on a specified board * Conditions Ratings 6.0 13.0 1200 -20 to +75 -40 to +150 Unit V V mW C C
Topr Tstg
Note *: Mounted on a specified board: 114.3mmx76.1mmx1.6mm glass epoxy
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
91207 TI IM 20051012-S00007 No.A0913-1/35
LV7107M
Recommended Operating Conditions at Ta = 25C
Parameter Recommended supply voltage 1 Recommended supply voltage 2 Operating supply voltage range 1 Operating supply voltage range 2 Symbol VCC VCC VCC opg VCC opg Conditions Ratings 5.0 11.6 4.5 to 5.3 11.1 to 12.1 Unit V V V V
Electrical Characteristics at Ta = 25C, VCCV = 5.0V, VCCA = 11.6V
Parameter Current dissipation 1 (5V) Current dissipation 2 (ALL5V) Current dissipation 3 (11.6V) Video CANAL SW part Output voltage 1 Voltage gain Frequency characteristics DG differential gain DP differential phase Cross-talk VDCC VGC VFC DGC DPC CTC 4.43M 100k 26 28 26 28 26 28 26 28 26 28 26 28 Picture S/N Maximum output level VSNC VOMAXC 26 28 26 28 Output level at which the linearity of AVI-OUT (pin 26) and AV2-OUT (pin 28) exceeds 1%. VIN=Linearity (lamp) signal Output level at linearity 1% Video INPUT SW part Output voltage 1 Output voltage 2 Output voltage 3 Voltage gain 1 Voltage gain 2 Frequency characteristics DG Differential Gain DP Differential Phase Cross-talk VDCI1 VDCI2 VDCI3 VGI1 VGI2 VFI DGSW DPSW CTC 4.43M 100k 100k 83 83 81 81 83 85 81 83 83 83 81 83 Picture S/N Maximum output level VSNC VOMAXSW 83 83 VIN=1Vp-p, /load =10k (SLICER output only) VIN=1Vp-p, f=10MHz/100kHz VIN=Video:1Vp-p VIN=Video:1Vp-p Selected input =GND Non-selected input =1Vp-p, f=4.43MHz VIN=Video (50%White) Output level when the linearity of pin 83 exceeds 1%. Linearity (lamp) signal Output level at linearity 1% 1.8 2.0 Vp-p -66 -60 dB -60 -50 dB Composite (Sync-Tip) Y (Sync-Tip) Chroma (Center) VIN=1Vp-p, /load =10k 0.8 0.8 1.8 -0.5 5.5 -1.0 -1 -1.5 1.0 1.0 2.1 0.0 6.0 0.0 0 0 1.2 1.2 2.4 +0.5 6.5 +1.0 +1 +1.5 V V V dB dB dB % deg 2.8 3.0 Vp-p Selected input=GND Non-selected input=1Vp-p, f=4.43MHz VIN=Video (50%White) -70 -65 dB -60 -50 dB VIN=Video: 1Vp-p VIN=1Vp-p, f=10MHz/100kHz VIN=Video: 1Vp-p VIN=1Vp-p, AV1, AV2-OUT AV1, AV2-OUT (Sync tip) 0.3 5.5 -1.0 -1 -1.5 0.5 6.0 0.0 0 0 0.7 6.5 +1.0 +1 +1.5 V dB dB % deg ICC3 Symbol Point ICC1 ICC2 Input signal Signal Freq Out Point Test condition min Pin6, 8, 25, 40 flow in current when non-signal Pin42, 84, 94 flow in current when non-signal Pin46 flow in current when non-signal 97.7 16.6 18.7 Ratings typ 115 19.5 22 max 132.2 22.4 25.3 mA mA mA Unit
Continued on next page.
No.A0913-2/35
LV7107M
Continued from preceding page.
Parameter Video Driver part Output voltage 1 VDCD1 95 97 99 Output voltage 2 VDCD2 93 9 12 17 14 19 23 Output voltage 3 VDCD3 95 99 91 Voltage gain 1 VGD 100k 7 11 22 VIN=1Vp-p, Line output: 2 drives, Scart output: DC directly-coupled single drive Note 1) Frequency characteristics 1 VFD1 VIN=1Vp-p, f=6MHz/100kHz when 6MHzLPF is selected Frequency characteristics 2 Frequency characteristics 3 Frequency characteristics 4 Mute attenuation DG Differential Gain DP Differential Phase Cross-talk Picture S/N Maximum output level 1 VFD2 VFD3 VFD4 VMUD DG1 DP1 CTD VSND VOMAXD1 9 12 17 91 93 91 93 4.43M VIN=1Vp-p, f=4.43MHz, Driver output terminated with 75 VIN=Video (50%White) Output level when the linearity of pins 9, 12, and 17 exceeds 1%. VIN=Linearity (lamp) signal Output level at linearity 1% Maximum output level 2 VOMAXD2 14 19 23 Output level when the linearity of pins 14, 19, and 23 exceeds 1% VIN=Linearity (lamp) signal Output level at linearity 1% Maximum output level 3 VOMAXD3 7 11 22 Output level at which the linearity of pins 7, 11, and 22 exceeds 1% VIN=sin 10kHz Output level at linearity 1% Sync-SEP part C.SYNC output High voltage C.SYNC output Low voltage C.SYNC output delay time C.SYNC output pulse width V.SYNC output High voltage V.SYNC output Low voltage Note 2) When pin 10 is open VVSL 82 VVSH 82 TWCS 86 Note 2) TDCS 86 Note 2) VCSL 86 VCSH 86 4.3 0 0.7 3.2 4.3 0 4.7 0.3 1.0 4.2 4.7 0.3 5.0 0.6 1.3 5.2 5.0 0.6 V V s s V V 2.0 2.5 Vp-p 2.8 3.0 Vp-p 2.8 3.0 Vp-p 23 VIN=Video: 1Vp-p 23 f=27MHz/100kHz when 6MHzLPF is selected f=12MHz/100kHz when 12MHzLPF is selected f=54MHz/100kHz when 12MHzLPF is selected VIN=1Vp-p, f=4.43MHz VIN=Video: 1Vp-p -1 -1.5 -1.5 -35 0.0 -40 -60 0 0 -60 -70 -25 +1.5 -30 -50 +1 +1.5 -50 -65 dB dB dB dB % deg dB dB -1.5 0.0 +1.5 dB 5.5 6.0 6.5 dB C, R-Y, B-Y (Center) 1.4 1.7 2 V Y (Sync tip) 0.5 0.7 0.9 V RGB (Pedestal) 0.3 0.5 0.7 V Symbol Point Input signal Signal Freq Out Point Test condition min Ratings typ max Unit
Note 1) The Line output can drive two systems through capacitive coupling while the Scart output drives only one system through DC direct coupling.
Continued on next page. No.A0913-3/35
LV7107M
Continued from preceding page.
Parameter Audio canal switches part V.SYNC output delay time V.SYNC output pulse width V.DET output High voltage V.DET output Low voltage Maximum output level VOMAXC 71 to 74 Channel balance CVSW 71 to 74 Total harmonic distortion THDAC 71 to 74 Output noise voltage VNAC 71 to 74 Mute attenuation VMUAC 71 to 74 Input impedance Cross talk between channel and selctors Tuner gain GTU ZIN CTSW 71 to 74 71 to 74 Output off set voltage VOFSET 71 to 74 Audio ADC block Voltage gain 1 VGA1 78 79 Voltage gain 2 VGA2 78 79 Voltage gain 3 VGA3 78 79 Voltage gain 4 VGA4 78 79 Channel balance CVVR 78 79 Maximum output level VOMAXI 78 79 VIN=1Vrms, f=1kHz, EVR=0dB Serial control select 6dB. VIN=1Vrms, f=1kHz, EVR=0dB Serial control select 5.5dB. VIN=1Vrms, f=1kHz, EVR=0dB Serial control select 5dB. VIN=1Vrms, f=1kHz, EVR=0dB Serial control select 0dB. VIN=2Vrms, f=1kHz, AMP=5.5dB, AEVR=-12dB Lch Gain-Rch Gain ADC-OUT (L, R), AMP=0dB, EVR=0dB BW=400 to 30kHz Output level at f=1kHz, THD=1% Total harmonic distortion THDAI 78 79 Note 2) When pin 10 is open VIN=2Vrms, f=1kHz, AMP=5.5dB, EVR=-12dB BW=400 to 30kHz 0.002 0.005 % 2.2 2.5 Vrms -1.5 0.0 +1.5 dB -1.5 0.0 +1.5 dB 3.5 5.0 6.5 dB 4.0 5.5 7.0 dB Off set voltage at the time of changeover SW. -20 0 20 mV VIN=0.5Vrms 10.0 12.0 14.0 dB VIN=2Vrms, f=1kHz Rg=0, BW=JIS-A VIN=2Vrms, f=1kHz, BW=JIS-A 20log (VOUT/VIN) 80 100 -110 120 -80 k dB -90 -75 dB Rg=0, BW=JIS-A -100 -80 dBV VIN=2Vrms, f=1kHz, BW=400 to 30kHz 0.003 0.01 % AV1, AV2-OUT (L, R) BW=400 to 30kHz Output level at f=1kHz, THD=1% VIN=2Vrms, f=1kHz Lch Gain-Rch Gain -1.5 0.0 +1.5 dB 2.2 2.5 Vrms VDETL 90 VDETH 90 TWVS 82 VIN=PAL Video: 1Vp-p Note 2) TDVS 82 Note 2) 7 125 4.3 0 15 155 4.7 0.3 25 185 5.0 0.6 s s V V Symbol Point Input signal Signal Freq Out Point Test condition min Ratings typ max Unit
4.5
6.0
7.5
dB
Continued on next page.
No.A0913-4/35
LV7107M
Continued from preceding page.
Parameter Output noise voltage Cross talk between channel and selctors Max attenuation amount VMUAI Symbol Point VNAI CTVR Input signal Signal Freq Out Point 78 79 78 79 78 79 Residual noise voltage Audio ALC block Note 3) ALC I/O level 1 ALC I/O level 2 ALC I/O level 3 Mute attenuation ALC1 ALC2 ALC3 VMUALC 76 76 76 76 VIN=2Vrms, f=1kHz VIN=2Vrms, f=1kHz VIN=2Vrms, f=1kHz VIN=2Vrms, f=1kHz, BW=JIS-A 20log (VOUT/VIN) External control part FSS output H voltage VHFSS 27 Serial control FSS OUT H selection, load =10k external output resistor 470 recommended Serial control select FSS OUT H. FSS output M voltage VMFSS 27 Serial control FSS OUT M selection, load =10k external output resistor 470 recommended. Serial control select FSS OUT M. FSS output L voltage VLFSS 27 Serial control FSS OUT L selection, load=10k Serial control select FSS OUT L. FSS risinge time FB output H voltage TFSSLH VHFB 27 34 Serial control FB OUT H selection. load=150 Serial control select FB OUT H. FB output L voltage VLFB 34 Serial control FB OUT L selection. load=150 Serial control select FB OUT L. FB external control L range FB external control H range External control output H voltage External control output L voltage Internal reference regulator REG2.5V REG9.0V VRE4.5 Note 3) Audio ALC AMP block When pin 76 (RF MOD OUT) is not used, it is recommended that pin 77 is pulled up to VCC (11.6 V). VREG25 VREG90 VREG45 2 100 57 65 49 Pin 49 voltage Pins 57 and 65 voltage Pins 2 and 100 voltage 2.3 8.7 4.3 2.5 9.0 4.5 2.7 9.3 4.7 V V V VEXTL VEXTH 10 36 38 10 36 38 2k load for data 0 0.0 0.3 1.0 V VHFBIN 32 VLFBIN 32 Pin 32 input voltage range at which the pin 34 output becomes L Pin 32 input voltage range when the pin 34 output becomes H 2k load for data 1 4.0 4.5 5.0 V 1.0 3.0 V 0.0 0.5 V 0.0 0.2 0.4 V 3.0 4.0 5.0 V 1.0 ms 0.0 0.1 0.5 V 5.5 6.0 6.5 V 10.6 11.1 11.6 V -3.0 -5.0 -7.0 -1.0 -3.0 -5.0 dBV dBV dBV VNAR 78 79 Test condition min AMP=5.5dB, EVR=-12dB Rg=0, BW=JIS-A VIN=2Vrms, f=1kHz, AMP=5.5dB, EVR=-12dB Rg=0, BW=JIS-A VIN=2Vrms, f=1kHz, AMP=5.5dB, BW=JIS-A EVR=mute/EVR=0dB AMP=5.5dB, EVR=mute Rg=0, BW=JIS-A -106 -80 dBV -106 -85 dB Ratings typ -100 max -80 dBV Unit
-110
-80
dB
-73
-65
dB
No.A0913-5/35
LV7107M
Package Dimensions
unit : mm (typ) 3349
23.2 80 81 51 50
100 1 0.65 (0.58) 0.22 30
31 0.15
3.0MAX 0.1 (2.7)
SANYO : QIP100EK(14X20)
Audio ALC Characteristics Diagram
10 VIN=1kHz 5 0 Output Level (dBV) -5 -10 -15 -20 -25 -30 -35 -40 -40 -30 -20 Input Level (dBV) -10 0 10 -3dBV -5dBV -7dBV OFF
14.0 17.2
0.8
20.0
No.A0913-6/35
LV7107M
Graphical View of Audio Block Power Supply
DAC_R_IN VCR_R_IN AV3_R_IN
No.A0913-7/35
LV7107M
Graphical View of The Video Block Power Supply GND
* The thick line indicates the circuit operative in the power save mode. In the power save mode, 5V is applied to Pin 42 (VCC5_All), pin 84 (VCC5V_VSW), and pin 94 (VCC_LOGIC) only.
No.A0913-8/35
AV2(11pin) G_IN
GND_VD AV2(7pin) B_IN
VCA Mute
RF_MOD
VCC 5V_VD R-Y_OUT
6dB Mute + Buf Mute
GND_AR AV2(1pin) R_OUT AV2(3pin) L_OUT
Buf
VCC 5V_RGB AV1(15pin) R/C_OUT
6dB
Mute Buf
SYNC_SEP_LPF B-Y_OUT
6dB Mute
Buf
N.C.
6dB
Mute +
N.C.
AV1(7pin) B_OUT EXT_CTL1
N.C.
6dB
Y_OUT (Component)
Mute
N.C.
GND_REG Audio_Mute_Filter
Mute
REG 9V AL A_DAC_L_IN
AV1(11pin) G_OUT
6dB Mute
GND-RGB
Mute Mute Mute 12dB
6dB
Y_OUT (Line_OUT)
GND_VL
Mute 6dB
C_OUT (Line_OUT)
6dB
Mute
V_OUT (Line_OUT)
Mute
REG 9V AR A_DAC_R_IN
VCC 5V_VL AV1(19pin) V_OUT
6dB
AV1(8pin) FSS_OUT AV2(19pin) V_OUT
6dB
Mute 12dB Mute
GND_VC Tuner V_IN
Block Diagram
+
+
+
LV7107M
+
No.A0913-9/35
AV2(15pin) R/C_IN GND_AL REG 2.5 A_ADC_R
0dB/ -12dB
A_ADC_L
0dB/ -12dB
AV1(1pin) R_OUT
AV1(3pin) L_OUT
VCR_L_IN
TUNER_AL_IN AV2(6pin) L_IN AV1(6pin) L_IN AV4(Rear) L_IN TUNER2 AL IN AV3(Front) L_IN
VCR_R_IN
TUNER_AR_IN AV2(2pin) R_IN AV1(2pin) R_IN AV4(Rear) R_IN TUNER2 AR IN
AV2(15pin) R/C_IN GND_AL
REG 2.5VA AV2(11pin) G_IN GND_VD
AV2(7pin) B_IN Vcc 5V_VD
R-Y_OUT
VCC 5V_RGB
AV1(15pin) R/C_OUT SYNC_SEP_LPF
B-Y_OUT
AV1(7pin) B_OUT EXT_CTL1
Y_OUT (Component)
Audio_Mute_Filter
AV1(11pin) G_OUT GND-RGB
Y_OUT (Line_OUT)
GND_VL C_OUT (Line_OUT) V_OUT (Line_OUT)
VCC 5V_VL AV1(19pin) V_OUT AV1(8pin) FSS_OUT AV2(19pin) V_OUT GND_VC
Tuner1 V_IN AV4(Rear) R_IN Tuner2 L IN
Test Circuit
LV7107M
+
No.A0913-10/35
A_ADC R_OUT A_ADC L_OUT RF_OUT GND_AR AV2(3pin) R_OUT AV2(1pin) L_OUT
AV1(3pin) R_OUT
AV1(1pin) L_OUT NC
NC
NC
NC
GND_REG
REG 9V AL
A_DAC L_IN
VCR L_IN
TUNER_AL_IN AV2(6pin) L_IN AV1(6pin) L_IN AV4(Rear) L_IN Tuner2 L IN AV3(Front) L_IN REG 9V AR
A_DAC R_IN
+
VCR R_IN
Tuner1 R_IN AV2(2pin) R_IN AV1(2pin) R_IN
+ +
LV7107M
Cautions for Use
1. Drive capacity of video driver Line and component outputs can drive two systems through capacitive coupling. Scart output can drive one system only through DC coupling. 2. Application not using the SAG correction function in the video driver with SAG correction When the SAG correction function is not to be used in the video driver with SAG correction, short-circuit output and correction pins for output through capacitive coupling. Application using SAG correction function
+ 100F SAG correction pin + 22F 75 SAG correction pin 75 Video output pin
Application without using SAG correction function
+ 1000F 75 75
Video output pin
3. Treatment of the pin when Audio RF_MOD output is not used When RF MOD OUT (Pin76) is not used, it is recommended to pull up the ALC filter pin (pin77) to VCC (11.6V). 4. Audio Mute This IC incorporates a mute transistor to reduce the POP noise of audio output when power is turned ON/OFF. Mute control can be made by serial control. 5. Resistor to limit the Audio input When the large signal is input in the input pin with power OFF, cross-talke between input and output occurs through the protective diode and parasitic elements. Because of the structure of LSI, such cross-talke is difficult to avoid. If cross-talk at a time of power OFF presents a problem, the cross-talk amount can be reduced by inserting the limiting resistor in the input. In this case, the input signal level changes depending on the resistance value. Determine the constant while taking both the cross-talk amount and input level into account. 6. Pin treatment when external control is not to be used When external control pins (Pins 13, 36, and 38) are not used, pull-down to GND is recommended. 7. Pin treatment of N.C pin It is recommended to connect N.C. pins (Pins 67, 68, 69, and 70) directly to the GND. 8. Audio 9V_REG pin external capacitance Use the Audio 9V_REG pins (pins 57 and 66) external capacitance of 10F or more and with the equivalent series resistance component of 7 or less. 9. Power application and disconnection sequences The recommended power application sequence to this IC is VCC_ALL5V (Pin42) VCC5V (Pins 6, 8, 25, 40, 84 and 94), VCC11.6V (Pin46). (No particular order is established between VCC5V and VCC11.6V.) It is recommended to reverse the above sequence when power supply is turned OFF.
No.A0913-11/35
LV7107M
Serial Control Table
ADDRESS SV1 0 0 0 0 1 1 1 Group 1 00000001 VIDEO CANAL-SW VIDEO SV2 0 0 0 0 1 1 SV3 0 0 1 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 0 1 and after 0 0 1 1 0 0 1 0 1 0 1 0 1 * 8 7 6 5 4 3 2 1 SV1 V(AV2) Y+C MIX(ENC) Y(ENC) Y(VCR) CV(VCR) MUTE PROHIBIT SV2 V(AV1) V(TU) Y+C MIX(ENC) CV(VCR) MUTE PROHIBIT SV3 V(AV1) V(AV2) V(TU) Y(VCR) PB * PB(VCR) PB * PB(SCART Y/C) PB(VCR SCART Y/C) PB(VCR) PB *
* indicates initial.
Remarks
ADDRESS SV4
8
7
6
5
4
3
2
1 SV4
Remarks
0 0 1 1 SV5/6 0 0 0 Group 2 00000010 VIDEO INPUT-SW SV7 0 0 1 1 SV16 Note 1) 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1
0 1 0 1
V(AV3) V(AV4) SV3-OUT SV5/6 MIX SV5 Y(AV3) Y(AV4) Y(AV2) Y(VCR) MUTE SV6 C(AV3) C(AV4) C(AV2) C(VCR) MUTE PROHIBIT * FRONT REAR SCART-YC *
and after
PROHIBIT SV7 Y CV MUTE MUTE SV16 THROUGH CLAMP input fixed
*
*
Note 1) G2D8/G3D8="11" is prohibited. Follow the AV2 (16) FB_IN (Pin32) control in case of THROUGH. AV2_16pin SV16 H L a: Clamp input (RGB) b: Bias input (COMPONENT)
No.A0913-12/35
LV7107M
ADDRESS RESERVE 0 1 RGB output 0 1 SV11a SV12a SV13a 0 0 0 1 1 Group 3 00000011 VIDEO OTHER-1 SV11b SV12b SV13b * effective at G3D2="0" 0 0 0 0 1 1 1 SV14 0 1 SV15 0 1 SV16 Note 1) 0 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 and after 1 0 1 1 0 0 1 1 0 1 0 1 0 and after 0 0 0 SV11b SV12b SV13b 8 7 6 5 4 3 2 1 Remarks
According to G3D3/D4/D5 control AV2_R SV11a MUTE ENC_R-Y ENC_R-Y ENC_R-Y MUTE ENC_R-Y PROHIBIT SV11b ENC_R MUTE ENC_C VCR_C MUTE AV2_R PROHIBIT SV14 CV(PB) MUTE SV15a(Y) SV17Y-OUT MUTE SV16 THROUGH BIAS input fixed * SV15b(C) SV17C-OUT MUTE PB(according to DVD/VCR of GR4) * PB * AV2_G SV12a ENC_Y ENC_Y (component) ENC_Y (component) ENC_Y (component) MUTE ENC_Y (component) PROHIBIT SV12b ENC_G MUTE MUTE MUTE MUTE AV2_G PROHIBIT PROHIBIT SV13b ENC_B MUTE MUTE MUTE MUTE AV2_B PROHIBIT a: ENC_RGB(6MLPF) b: mute c: ENC_C d: VCR_C e: mute f: AV2_RGB(EXTERNAL) * MUTE ENC_B-Y ENC_B-Y ENC_B-Y AV2_B SV13a MUTE ENC_B-Y a: ENC_Y b: component (12MLPF) c: component (12MLPF) d: component (12MLPF) e: mute f: component (12MLPF) * f: AV2_RGB(EXTERNAL) *
Note 1) G2D8/G3D8="11" is prohibited. Follow the AV2 (16) FB_IN (Pin32) control in case of THROUGH. AV2_16pin SV16 H L a: Clamp input (RGB) b: Bias input (COMPONENT)
No.A0913-13/35
LV7107M
ADDRESS SV17 DVD/VCR Note 2) 0 1 SV18 TUNER1/2 Note 2) FB AV1(16) Group 4 00000100 VIDEO & AUDIO OTHER-1 FSS AV1(8) Note 3) 0 0 1 1 SLICE AMP 0 1 A-MUTE Note 4) 0 1 Note 2) Operates in VIDEO/AUDIO interlock. Note 3) Same polarity as the AV2 (16) FB_IN (Pin32) control in case of THROUGH. Note 4) AUDIO MUTE control RF_MOD output: Serial control MUTE, Power-ON_MUTE CANAL output: Serial control MUTE, Power-ON_MUTE ADDRESS SA1L/R 0 0 0 0 1 and after SA2L/R Group 5 00000101 AUDIO CANAL-SW 0 0 0 0 1 1 SA4L/R 0 0 1 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 0 1 and after 1 0 0 1 1 0 0 0 1 0 1 0 1 8 7 6 5 4 3 2 1 SA1L L(AV2) L(DAC) L(DAC) L(VCR) MUTE PROHIBIT SA2L L(AV1) L(TU) L(DAC) L(VCR) MUTE PROHIBIT SA4L L(AV3) L(AV4) SL3 out MUTE SA1R R(AV2) R(DAC) R(DAC) R(VCR) MUTE PROHIBIT SA2R R(AV1) R(TU) R(DAC) R(VCR) MUTE PROHIBIT SA4R R(AV3) R(AV4) SR3 out MUTE * PB PB * PB(DAC) PB(DAC) PB(VCR) * Remarks 0 1 0 1 0 0 1 1 0 1 0 1 0 1 8 7 6 5 4 3 2 1 SV17 (V/C/Y) Y+C MIX (ENC) Y+C MIX(VCR) SV18 Tuner1 Tuner2 SWF 0 5V THROUGH THROUGH FSS-OUT LOW(0.5V) MID(6.0V) HIGH(11.0V) HIGH(11.0V) SLICE AMP gain 0dB 6dB All MUTE (Audio) THROUGH MUTE Pins 71 to 74 output MUTE * * * * SA18(L/R) Tuner1 Tuner2 * AUDIO(VCR) PB(VCR) AUDIO(DAC) PB(DVD) * SA17(L/R) Remarks
No.A0913-14/35
LV7107M
ADDRESS SA3L/R 0 0 0 0 1 and after SA5 Group 6 00000110 AUDIO INPUT-SW MUTE 0 1 1 ADC-AMP 0 0 1 1 Note 4) AUDIO MUTE control RF_MOD output: Serial control MUTE, Power-ON_MUTE CANAL output: Serial control MUTE, Power-ON_MUTE ADDRESS AUDIO EVR-L 0 0 1 0 0 1 0 1 1 0 1 1 0 0 1 0 0 1 8 7 6 5 4 3 2 1 Audio EVR(L) 0dB -12dB Mute PROHIBIT EXT_CTL1 (Pin13) 0 1 Changeover of VIDEO input BIAS/CLAMP 0 1 L H R/R-Y_IN (Pin95) BIAS input CLAMP input G/Y_IN (Pin97) CLAMP input CLAMP input B/B-Y_IN (Pin99) BIAS input CLAMP input Component RGB * Input changeover General purpose OUT1 * Pin 78 output MUTE * Remarks 0 1 0 1 1 0 1 ALC-LEVE L 0 0 Note 4) 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 8 7 6 5 4 3 2 1 SA3L L(AV1) L(AV2) L(TU) L(DAC) L(VCR) PROHIBIT RF_MOD output THROUGH MUTE Audio ALC -3dBV -5dBV -7dBV PROHIBIT ADC-AMP-g ain 6.0dB 5.5dB 5.0dB PROHIBIT * * Pin 77 output MUTE * SA3R R(AV1) R(AV2) R(TU) R(DAC) R(VCR) PROHIBIT PB * Remarks
Other than above Group 7 00000111 General purpose 1
ADDRESS AUDIO EVR-R
8
7
6
5
4
3
2
1 Audio EVR(R)
Remarks
0 0 1
0 0 1
0 1 1
0 1 1
0 0 1
0 0 1
0dB -12dB Mute PROHIBIT EXT_CTL3 (Pin36) Pin 79 output MUTE *
Other than above Group 8 00001000 General purpose 3 0 1 General purpose 4 0 1
L H EXT_CTL4 (Pin38) L H
General purpose OUT3
*
General purpose OUT4
*
No.A0913-15/35
LV7107M
Serial Control Specification
1. Slave address MSB
1 0 0 1 0 1 0
LSB
0
Slave receiver One-way communication (this IC is dedicated to receive) 2. DATA TRANSFER MANUAL: [1] is High level. [0] is Low level. I2C-BUS control system is adopted in SW LSI. SW LSI is controlled by SCL (Serial Clock) and SDA (Serial Data) At first, please set up the START condition*1 by these two terminals (SCL and SDA). And next, please input the 8bits data, which should be synchronized with SCL into SDA terminal. Still more, please give priority to high rank bit at data transfer order (MSBLSB). The 9th bit is called as ACK (Acknowledge), SW LSI sends [0] to the SDA terminal during SCL [1] period. So, please open the port of microprocessor during this period. LV7107M adopt auto-increment, so you input only first group-address and you can transfer data in order. As thus the Data transfer Stop condition*2 is finished. *1 SDA rise up during SCI is [1] *2 SDA fall down during SCL is [1] 3. TRANSFER DATA FORMAT The transfer data is composed by START condition, Slave address, Group address*1, data, and STOP condition. After setting up the START condition, please transfer the Slave Address (regulated as "1001000" in SW LSI). Group and next control data*2 (Please see the Fig.1) Slave Address is composed by 7bits, and this bit 8th bit*3 should be set as [0]. The both of Group address and control data are composed by 8bits, and the one control action is defined with combination of these two data. And if you want to control 2 or more groups at the same mode, you can realize it by sending some control data together. The data makes meaning with all bits, so you cannot stop the sending until all data transfer is over. But LV7107M adopt auto-increment, for example you can stop to transfer STOP condition after group 2 data. If you want to stop transfer action, please transfer the STOP condition without fail. *1/2 There are 8 control groups. *3 This 8th bit called as R/W bit, and this bit shows the data transmission direction. [0] means send mode (accept mode with SW LSI) and [1] means accept mode (send mode with SW LSI) fundamentally. But SW LSI is not equipped with such a data out function, please keep this bit as [0]. Fig.1 DATA STRUCTURE
START condition Slave address R/W ACK Group address ACK Control data ACK ... STOP condition
Start condition
Acknowledge
Stop condition
No.A0913-16/35
LV7107M
4. INITIALIZE AND OTHERS SW LSI is initialized as the following mode for circuit protection. Please see "SERIAL CONTROL TABLE". Characteristics of the SDA and SCL 1/0 stages for SW LSI
Parameter LOW level input voltage HIGH level input voltage LOW level output current SCL clock frequency Set-up time for a repeated START condition Hold time START condition. After this period, the first clock pulse is generated. LOW period of the SCL clock Rise time of both SDA and SDL signals HIGH period of the SCL clock Fall time of both SDA and SDL signals Data hold time: Data set-up time Set-up time for STOP condition BUS fredd time between a STOP and START condition Symbol VIL VIH IOL fSCL tSU:STA tHD:STA tLOW tR tHIGH tF tHD:DAT tSU:DAT tSU:STO tBUF 0.6 0.6 1.3 0 0.6 0 0 100 0.6 1.3 0.3 0.9 0.3 Min 0 3.0 Max 0.8 5.0 3.0 400 Unit V V mA kHz s s s s s s s ns s s
Fig.2 Definition of timing.
tHIGH SCL (86pin) tSU:STA SDA (87pin) tHD:STA tLOW tHD:DAT tSU:DAT tSU:STO tBUF tR tF
No.A0913-17/35
LV7107M
Pin Function
Pin No. P1 Pin name AV2 R/C_IN DC voltage 1.6V R Signal wave form In put/Out put form
1k 0.7Vpp 1.6V
4k
4k
2.1V Chroma
20k
300
300
0.7Vpp 2.1V 1
P2
REG 2.5VA
2.5V
DC
10pF 50 1k 100 2 6.8k 13k 18.5k 18.5k 22.8k
30k
910
23k
P3
AV2 G_IN
1.6V G
1k
4k
0.7Vpp 1.6V 300 300
4k
3
P4 P5 GND_VD AV2 B_IN 1.6V B
1k
4k
0.7Vpp 300 1.6V 300
4k
5
Continued on next page.
No.A0913-18/35
LV7107M
Continued from preceding page.
Pin No. P6 P7 Pin name VCC 5V_VD R-Y_OUT 1.7V R-Y DC voltage Signal wave form In put/Out put form
100 2k 1.7V 1.4Vpp 3.3pF 10.7 k 10k 1pF 100 7 1pF 100 k
P8 P9
VCC 5V_RGB AV1 R/C_OUT 0.5V R
1.4Vpp 0.5V
100 2k 10.7 k
1.25pF 200 9
1.7V Chroma
3.3pF
10 k
1.25pF
1.4Vpp 1.7V
P10
SYNC_SEP_LPF
2.2V Y
10
500 500 1.0Vpp 2.2V 8pF 40k
P11
B-Y_OUT
1.7V B-Y
100 1.7V 1.4Vpp
2k
10.7 k 10k
1pF 100 11 1pF 100 k
3.3pF
Continued on next page.
No.A0913-19/35
LV7107M
Continued from preceding page.
Pin No. P12 Pin name AV1 B_OUT DC voltage 0.5V B Signal wave form In put/Out put form
100 1.4Vpp 0.5V 3.3pF 10 k 2k 10.7 k
1.25pF 200 12 1.25pF
P13
EXT_CTL1
5V 13
0V
P14
Y_OUT (Component)
0.7V Y
15 2.0Vpp 100 0.7V 2k 10.4 k 10 k 3pF 100 14 3pF 100 k 1k
P15
Y_SAG_IN (Component)
0.7V Y
2.0Vpp 0.7V
P16 Audio_Mute _Filter
3pF
140k 500 16 60k
P17
AV1 G_OUT
0.5V G
100 1.4Vpp 0.5V 2k 10.7 k 1.25pF 200 17 3.3pF 10 k 1.25pF
Continued on next page.
No.A0913-20/35
LV7107M
Continued from preceding page.
Pin No. P18 P19 Pin name GND_RGB Y_OUT (Line_OUT) 0.7V Y DC voltage Signal wave form In put/Out put form
20 2.0Vpp 100 0.7V 2k 10.4 k 10 k 1k 3pF 100 19 3pF 100 k
P20
Y_SAG_IN (Line_OUT)
0.7V Y
2.0Vpp 0.7V
P21 P22 GND_VL C_OUT (Line_OUT) 1.7V Chroma
3pF
100
2k
10.7 k 10k
1pF 100 22 1pF 100 k
1.4Vpp
1.7V
3.3pF
P23
V_OUT (Line_OUT)
0.7V Video
24 2.0Vpp 100 0.7V 2k 10.4 k 10 k 3pF 100 3pF 100 k 1k 23
P24
V_SAG_IN (Line_OUT)
0.7V Video
3pF 2.0Vpp
0.7V
P25 P26 VCC 5V_VL AV1 V_OUT 0.5V Video
2.0Vpp 100 2k 0.5V
0.5V Y
10.7 k 10 k
1.25pF 200 26
3.3pF 2.0Vpp 0.5V
1.25pF
Continued on next page.
No.A0913-21/35
LV7107M
Continued from preceding page.
Pin No. P27 Pin name AV1 FSS_OUT DC voltage Low:0.5V Midol:6.0V High:11.1V DC Signal wave form In put/Out put form
27 100k
P28
AV2 V_OUT
0.5V Video
100 2.0Vpp 0.5V 2k 10.7 k
1.25pF 200 28
3.3pF
10 k
1.25pF
P29 P30
GND_VC Tuner1 V_IN 1.6V Video
1k
4k
1.0Vpp 300 1.6V 30 300
4k
P31
AV2 V/Y_IN
1.6V Video
1.0Vpp
1k
4k
1.6V 4k
1.6V Y
300 1.0Vpp 1.6V 31
300
P32
AV2 FB_IN
2V 32
1k
0V
Continued on next page.
No.A0913-22/35
LV7107M
Continued from preceding page.
Pin No. P33 Pin name AV1 V_IN DC voltage 1.6V Videoo Signal wave form In put/Out put form
1k
4k
1.0Vpp 4k 1.6V 300 300
33
P34
AV1 FB_OUT
L:0V H:3.8V Through: 0/3.8V
10k 3.8V 1k 34 1k 0V 1k 1k 100 k
P35
AV4 V_IN
1.6V Video
1k
4k
1.0Vpp 300 1.6V 35 300
4k
P36
EXT_CTL3
5V 36 0V
P37
AV3 V_IN
1.6V Video
1k
4k
1.0Vpp 300 1.6V 300
4k
37 Continued on next page.
No.A0913-23/35
LV7107M
Continued from preceding page.
Pin No. P38 Pin name EXT_CTL4 DC voltage Signal wave form In put/Out put form
5V 38
0V
P39
AV4 Y_IN/ Tuner2 V_IN
1.6V Y
1.0Vpp 1.6V
1k
4k
4k
1.6V Video
300 1.0Vpp 39 1.6V
300
P40 P41
VCC 5V_VC AV3 Y_IN 1.6V Y
1k
4k
1.0Vpp 300 1.6V 41
VCC 5V_ALL AV4 C_IN
4k 300
P42 P43
5V 2.1V Chroma
DC
1k
4k 0.7Vpp 2.1V 20.3k 300
43
P44
GND_REF
0V
DC
Continued on next page.
No.A0913-24/35
LV7107M
Continued from preceding page.
Pin No. P45 Pin name AV3 C_IN DC voltage 2.1V Chroma Signal wave form In put/Out put form
1k
0.7Vpp 2.1V
4k 20.3k 300
45
P46 P47
VCC 11.6V_A VCR Y_IN
11.6V 1.6V Y
DC
1k
4k
1.0Vpp 300 1.6V 300
4k
47
P48
VCR C_IN
2.1V Chroma
1k
0.7Vpp 2.1V
4k 20.3k 300
48
P49
REF 4.5V
4.5V
57
60k 1k 60k 49
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No.A0913-25/35
LV7107M
Continued from preceding page.
Pin No. P50 Pin name AV3 R_IN DC voltage 4.5V Signal wave form In put/Out put form
4.5V
50 500 100k Max 5.6Vpp 4.5V
P51
AV4 R_IN/ Tuner2 R_IN
4.5V
4.5V
51 500 Max 5.6Vpp 100k 4.5V
P52
AV1 R_IN
4.5V
4.5V
52 500 Max 5.6Vpp 100k 4.5V
P53
AV2 R_IN
4.5V
4.5V
53 500 Max 5.6Vpp 100k 4.5V
P54
Tuner1 R_IN
4.5V
4.5V
54 500 100k Max 5.6Vpp 4.5V
Continued on next page.
No.A0913-26/35
LV7107M
Continued from preceding page.
Pin No. P55 Pin name VCR R_IN DC voltage 4.5V Signal wave form In put/Out put form
4.5V
55 500 Max 5.6Vpp 100k 4.5V
P56
A_DAC R_IN
4.5V
4.5V
56 500 Max 5.6Vpp 100k 4.5V
P57
REG 9V AR
9V
DC
50 100 57 141k
23k
P58 AV3 L_IN 4.5V
4.5V
58 500 100k Max 5.6Vpp 4.5V
P59
AV4 L_IN/ Tuner2 L_IN
4.5V
4.5V
59 500 100k Max 5.6Vpp 4.5V
Continued on next page.
No.A0913-27/35
LV7107M
Continued from preceding page.
Pin No. P60 Pin name AV1 L_IN DC voltage 4.5V Signal wave form In put/Out put form
4.5V 60 500 Max 5.6Vpp 100k 4.5V
P61
AV2 L_IN
4.5V
4.5V 61 500 Max 5.6Vpp 100k 4.5V
P62
Tuner1 L_IN
4.5V
4.5V
62 500 Max 5.6Vpp 100k 4.5V
P63
VCR L_IN
4.5V
4.5V
63 500 Max 5.6Vpp 100k 4.5V
P64
A_DAC L_IN
4.5V
4.5V 64 500 Max 5.6Vpp 100k 4.5V
Continued on next page.
No.A0913-28/35
LV7107M
Continued from preceding page.
Pin No. P65 Pin name REG 9V AL 9V DC voltage DC Signal wave form In put/Out put form
50 100 65 141k
23k
P66 P67 P68 P69 P70 P71 GND_REG N.C. N.C. N.C. N.C. AV1 L_OUT 4.5V 0V DC
4.5V 700 Max 5.6Vpp 100 71 20k 4.5V
P72
AV1 R_OUT
4.5V
4.5V
700
100 72
Max 5.6Vpp
20k 4.5V
Continued on next page.
No.A0913-29/35
LV7107M
Continued from preceding page.
Pin No. P73 Pin name AV2 L_OUT DC voltage 4.5V Signal wave form In put/Out put form
4.5V
700
100 73
Max 5.6Vpp
20k 4.5V
P74
AV2 R_OUT
4.5V
4.5V
700
100 74
Max 5.6Vpp
20k 4.5V
P75 P76
GND_AR RF_OUT
0V 4.5V
DC
15.3k
50 76
4.5V
5k 100k Max 5.6Vpp
500
10k
P77
PALCFIL
0V
DC
250
250 2k
77
Continued on next page.
No.A0913-30/35
LV7107M
Continued from preceding page.
Pin No. P78 Pin name A_DAC L_OUT DC voltage 4.5V Signal wave form In put/Out put form
100 4.5V 78
Max 5.6Vpp
P79
A_DAC R_OUT
4.5V
4.5V
100 79
Max 5.6Vpp
P80 P81
GND_AL DAC C_OUT 2.1V
500
0.7Vpp 2.1V 81 500A
P82
V_SYNC_OUT
4.7V
300 82 300
0.3V
Continued on next page.
No.A0913-31/35
LV7107M
Continued from preceding page.
Pin No. P83 Pin name DAC V/Y_OUT DC voltage 1.0V Y Signal wave form In put/Out put form
1.0Vpp 1.0V
1.0V Video
500
83 1.0Vpp 1.0V 500A
P84 P85
VCC 5V_VSW Slicer_OUT 1.0V Y
Max 2.0Vpp or 1.0Vpp 1.0V
1.0V Video
500
Max 2.0Vpp or 1.0Vpp 1.0V
P86 C_CYNC_OUT
85 500A
4.7V
300 86 300
0.3V
P87
V_DET_IN
87
4.7V 10k
0.3V
25k
50A
Continued on next page.
No.A0913-32/35
LV7107M
Continued from preceding page.
Pin No. P88 Pin name SCL_IN DC voltage Signal wave form In put/Out put form
50k 5V 2.3V 1.0V 30k 88
P89
SDL_IN
50k 5V 2.3V 1.0V 30k 89
P90
V_DET_OUT
4.7V with signal 0V without signal
DC
300 90 300
P91
ENC. C_IN
2.1V Chroma
1k
4k 0.7Vpp 2.1V 20.3k 300
91
P92
V_DET_FIL
DC
92 200
1k 1k
1k
60A
Continued on next page.
No.A0913-33/35
LV7107M
Continued from preceding page.
Pin No. P93 Pin name ENC. Y_IN DC voltage 1.6V Y Signal wave form In put/Out put form
1k
4k
1.0Vpp 300 1.6V 300
4k
93
P94 P95 VCC_LOGIC ENC. R/ R-Y_IN 1.6V R
1k 0.7Vpp 1.6V
2.1V R-Y
4k
4k 20k 2.1V 0.7Vpp 95 300 300
P96 P97
GND_LOGIC ENC. G/Y_IN 1.6V G
1k 0.7Vpp 1.6V
1.6V Y
4k
4k 300 300
1.0Vpp 97 1.6V
P98 P99 GND_VSW ENC. B/B-Y_IN 1.6V B
0.7Vpp 1.6V
1k
4k
4k
2.1V B-Y
20k 2.1V 0.7Vpp
300
300
99
Continued on next page.
No.A0913-34/35
LV7107M
Continued from preceding page.
Pin No. P100 Pin name REG 2.5V DC voltage 2.5V DC Signal wave form In put/Out put form
10pF 50 1k 100 100 6.8k 13k 18.5k 18.5k
30k
910
23k
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of September, 2007. Specifications and information herein are subject to change without notice.
PS No.A0913-35/35

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