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PM4325 OCTLIU ST Octal Short Haul T1/E1/J1 Low Latency Transport Line Interface
FEATURES
* Monolithic device integrating eight T1/J1 or E1 short haul line interface units. * Software switchable between T1/J1 and E1 operation on a per-device basis. * Meets or exceeds T1/J1 and E1 short haul network access specifications including ANSI T1.102, T1.403, T1.408, AT&T TR 62411, ITU-T G.703, G.704 as well as ETSI 300-011, TBR 4, TBR 12, and TBR 13. In conjunction with the TEMAP 84 (PM5366), allows Add Drop Multiplexers and Terminal Multiplexers to meet GR253, GR496, and G.783. * Optional encoding/decoding of B8ZS, HDB3, and AMI line codes. * Provides receive equalization, clock recovery, and line performance monitoring. * Provides transmit and receive jitter attenuation. * Provides digitally programmable pulse templates. * Provides a selectable, per channel independent de-jittered T1 or E1 recovered clock for system timing and redundancy. * Provides PRBS generators and detectors on each tributary for error testing at DS1 and E1 rates as recommended in ITU-T O.151. * Uses line rate system clock. * Recovers clock and data using a digital phase locked loop for high jitter tolerance. * Tolerates more than 0.4 UI peak-topeak high frequency jitter as required by AT&T TR 62411 and Bellcore TR-TSY-000170. * Outputs dual rail recovered line pulses, a single rail DS-1/E1 signal, or parallel data in SBI/SBI TR bus format. * Performs B8ZS or AMI decoding when processing a bipolar DS-1 signal and HDB3 or AMI decoding when processing a bipolar E1 signal. * Detects line code violations (LCVs), B8ZS/HDB3 line code signatures, and four (E1), eight (T1+B8ZS), or sixteen (T1 AMI) successive zeros. * Provides a programmable depth FIFO buffer for jitter attenuation, rate conversion, and latency optimization in the receive path.
SYSTEM INTERFACE
* Supports transfer of transmitted single rail PCM and signaling data from 1.544 Mbit/s and 2.048 Mbit/s backplane buses or a SBI/SBI TR interface for low pin count interconnection of up to 11 OCTLIU STs to the high-density PM5366 TEMAP 84 T1/E1 framer.
RECEIVE SECTION
* Supports T1/E1 signal reception for distances with up to 12dB of cable attenuation at nominal conditions using PIC 22 gauge cable emulation. * Supports G.772 compliant non-intrusive protected monitoring points.
TRANSMIT SECTION
* Generates DSX-1 short haul pulses with programmable pulse shape compatible with AT&T, ANSI, and ITU requirements.
BLOCK DIAGRAM
TDN[8:1] TDP[8:1] TCLK[8:1] DSYNC DDATA[7:0] SBI TR Extract DLINKRATE[5:0] DPARITY DALARM DVALID DFULL DC1FP DDATA[7:0] DDP DPL DV5 PMON Performance Monitor (Line Loopback) SBI Insert PDVD Pulse Density Viol. Detector IBCD Inband Loop back Code Detector RJAT Digital Jitter Attenuator SIPO PRBS Pattern Generator / Detector REFCLK C1FPOUT ADATA[7:0] ADP APL AV5 AACTIVE AC1FP ADATA[7:0] ALINKRATE[5:0] APARITY AALARM AVALID ASYNC RDP[8:1] RDN/RLCV[8:1] RCLK[8:1] LOS TXHIZ/LineLB SBI_EN RSTB Serial Output JTAG uP Interface H/W only Auto-config
TXTIP1[8:1] TXTIP2[8:1] TXRING1[8:1] TXRING2[8:1] XLPG Transmit LIU TJAT Digital Jitter Attenuator
LCODE AMI / B8ZS / HDB3 Line Encoder
XPDE Pulse Density Enforcer
XIBC Inband Loopback Code Generator
PISO
(Diagnostic Digital Loopback)
SBI Extract
RXTIP[8:1] RLPS Receive LIU RXRING[8:1]
CDRC Clk/Data Recovery
SBI TR Insert LIU Octant x 8 CSD XCLK RSYNC Clock Synthesis / Distribution TOPS Timing Options
TDI
ALE
CSB
WRB
RDB
INTB
LOS
TCK
TMS
TDO
SREN
D[7:0]
A[10:0]
SRCLK
SRCDO
SRCEN
LOS_L1
TRSTB
SRDO/PI
SRDI/PO
SRCASC
SRCCLK
SRCODE
LEN8[2:0]
LEN7[2:0]
LEN6[2:0]
LEN5[2:0]
LEN4[2:0]
LEN3[2:0]
LEN2[2:0]
LEN1[2:0]
HW_ONLY
PMC-2030527 (R2)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
(c) Copyright PMC-Sierra, Inc. 2003
PM4325 OCTLIU ST Octal Short Haul T1/E1/J1 Low Latency Transport Line Interface
* Generates E1 pulses compliant to G.703 recommendations. * Provides line outputs that are current limited and may be tristated for protection or use in redundant applications. * Provides a digital phase locked loop for generation of a low jitter transmit clock complying with all jitter attenuation, jitter transfer, and residual jitter specifications of AT&T TR 62411 and ETSI TBR 12 and TBR 13. * Accepts either dual rail or single rail DS-1/E1 signals or parallel data from the SBI/SBI TR interface. * Performs B8ZS or AMI encoding when processing a single rail or SBI/SBI TRsourced DS-1 signal and HDB3 or AMI encoding when processing a single rail or SBI/SBI TR-sourced E1 signal. * Provides a programmable depth FIFO buffer for jitter attenuation, rate conversion, and latency optimization in the transmit path.
GENERAL
* Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring. * Provides a hardware-only (no microprocessor) mode in which configuration data is read from an SPI-compatible serial PROM. The PROM interface can be cascaded such that multiple OCTLIU ST devices can be configured simultaneously from a single PROM. * Supports line and system side diagnostic loopbacks. * Provides an IEEE 1149.1 (JTAG) compliant Test Access Port (TAP) and controller for boundary scan test. * Implemented in low power 3.3 V tolerant 1.8/3.3 V CMOS technology. * Available in a high-density 288-pin Tape-SBGA package with a -40 C to +85 C Industrial temperature operating range.
APPLICATIONS
* * * * * Metro Optical Access Equipment. Edge Router Line Cards. Multi-service ATM Switch Line Cards. 3G Base Wireless Equipment. Digital Private Branch Exchanges (PBX). * Digital Access Cross-Connect Systems (DACS) and Electronic DSX Cross-Connect Systems (EDSX).
TYPICAL APPLICATIONS
T1/E1 FRAMER/TRANCEIVER VOICE GATEWAY
8 T1 Lines
PM4325 OCTLIU ST
Clock and Data
PM6388 TOCTL
Backplane
SBI
PCM Highwway H-MVIP
TE 32
8 E1 Lines
PM4325 OCTLIU ST
Clock and Data
PM6388 EOCTL
Backplane
PM4325 OCTLIU ST T1/E1 Framer/Mapper
DSP
SINGLE MAGNETIC LINE PROTECTON
SBI TR PM4323 PM4323 PM4323 OCTLIU-LT PM4323 OCTLIU-LT PM4323 OCTLIU-LT PM4323 OCTLIU-LT PM4323 OCTLIU-LT PM4323 OCTLIU-LT PM4323 OCTLIU-LT PM4323 OCTLIU-LT PM4325 OCTLIU-LT OCTLIU-LT OCTLIU ST 11 x OCTLIU ST Working Protect
Magnetic Line I/F Card 84 T1 Lines 63 E1 Lines
PM5366 TEMAP 84
T1/E1 Framer/Mapper
Cross-connect
Head Office: PMC-Sierra, Inc. 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: +1.604.415.6000 Fax: +1.604.415.6200
To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator
All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com
PMC-2030527 (R2) (c) Copyright PMC-Sierra, Inc. 2003. All rights reserved. March 2003. For a complete list of PMC-Sierra's trademarks and registered trademarks, visit: http://www.pmc-sierra.com/legal/
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE

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