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Dual 150mA LDO Regulator with Programmable Reset
POWER MANAGEMENT Description
The SC1452 is a state of the art device intended to provide maximum performance and flexibility in battery operated systems. It has been designed specifically to fully support a single Li-Ion battery and its external charger voltages. The SC1452 contains two independently enabled, ultra low dropout voltage regulators (ULDOs). It operates from an input voltage range of 2.25V to 6.5V, and a wide variety of output voltage options are available which are designed to provide an initial tolerance of 1% and 2% over temperature. Each regulator has an associated active-low reset signal which is asserted when the voltage output declines below the preset threshold. Once the output recovers, the reset continues to be asserted (delayed) for a predetermined time, 50ms for reset A and 150ms for reset B. In the case of regulator B, the delay time may be reduced by the addition of an external capacitor. The SC1452 has a bypass pin to enable the user to capacitively decouple the bandgap reference for very low output noise (down to 50Vrms). The devices utilize CMOS technology to achieve very low operating currents (typically 130uA with both outputs supplying 150mA). The dropout voltage is typically 155mV at 150mA, helping to prolong battery life. In addition, the devices are guaranteed to provide 400mA of peak current for applications which require high initial inrush current. They have been designed to be used with low ESR ceramic capacitors to save cost and PCB area. The SC1452 comes in the low profile 10-lead MSOP package.
SC1452
Features
Up to 150mA per regulator output Low quiescent current (130A typical with both outputs at 150mA) Low dropout voltage Wide selection of output voltages Stable operation with ceramic caps Tight load and line regulation Current and thermal limiting Reverse input polarity protection <1A off-mode current Logic controlled enable Active low resets valid for VIN down to 0V Programmable reset Full industrial temperature range 10-Pin MSOP package. Also available in Lead-free, fully WEEE and RoHS compliant
Applications
Cellular telephones Palmtop/Laptop computers Battery-powered equipment Bar code scanners SMPS post regulator/dc to dc modules High efficiency linear power supplies DSP supplies
Typical Application Circuit
U1 3.0V OUT 2.5V OUT 1 2 3 RESET A RESET B 4 5 OUTA OUTB GND RSTA RSTB IN ENA BYP ENB DLYB 10 9 8 7 6 ENABLE OUTPUT B 3.3V IN ENABLE OUTPUT A
SC1452FIMS COUTA 1uF COUTB 1uF CBYP 10nF CDLYB 10nF CIN 1uF
Revision: September 20, 2006
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SC1452
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability.
Parameter Input Supply Voltage Enable Input Voltage Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Thermal Impedance Junction to Ambient Thermal Impedance Junction to Case ESD Rating (Human Body Model)
Symbol VIN V EN TA TJ TSTG J A J C ESD
Maximum -5 to +7 -5 to +VIN -40 to +85 -40 to +125 -60 to +150 113 42 2
Units V V C C C C/W C/W kV
Electrical Characteristics
Unless specified: TA = 25C, VIN = VOUT + 1V, IOUTA = IOUTB = 1mA, CIN = COUT = 1.0 F, VENA = VENB = VIN. Values in bold apply over full operating temperature range.
Parameter IN Input Supply Voltage Quiescent Current
Symbol
Conditions
Min
Typ
Max
Units
VIN IQ VENA = 0V, VENB = VIN, IOUTB = 150mA or VENB = 0V, VENA = VIN, IOUTA = 150mA VENA = VENB = VIN, IOUTA = IOUTB = 150mA
2.25 110
6.5 150 200 130 200 250
V A
A
VIN = 6.5V, VENA = VENB = 0V (OFF)
0.2
1.0 1.5
A
OUTA, OUTB Output Voltage(1) VOUT IOUT = 1mA 0mA IOUT 150mA, VOUT +1V VIN 5.5V Line Regulation(1) REG(LINE) VOUT + 1V VIN 5.5V, IOUT = 1mA -1% -2% 2.5 VOUT +1% +2% 10 12 Load Regulation(1) REG(LOAD) 0.1mA IOUT 150mA -5 -20 -30 mV mV V
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SC1452
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: TA = 25C, VIN = VOUT + 1V, IOUTA = IOUTB = 1mA, CIN = COUT = 1.0 F, VENA = VENB = VIN. Values in bold apply over full operating temperature range.
Parameter Dropout Voltage(1)(2)
Symbol VD
Conditions IOUT = 1mA IOUT = 50mA
Min
Typ 1 52
Max
Units mV
70 90
mV
IOUT = 150mA
155
210 270
mV
Current Limit Ripple Rejection Output Voltage Noise
ILIM PSRR en f = 120Hz, CBYP = 10nF f = 10Hz to 100kHz, IOUT = 50mA, CBYP = 10nF, COUT = 2.2F, 1.8V output f = 10Hz to 100kHz, IOUT = 50mA, CBYP = 10nF, COUT = 2.2F, 3.3V output
400 59 27 55
mA dB VRMS
BYP Start-up Rise Time ENA, ENB Enable Input Threshold VIH VIL Enable Input Bias Current(3) RSTA, RSTB Reset Threshold VTH(RST) VOUT falling VOUT rising Reset A Delay Reset B Delay tRSTA tRSTB VDLYB= 0V CDLYB= 10nF Reset A, B Output Voltage (4) VOH VOL DLYB Delay Voltage Threshold Delay Source Current VTH(DLYB) IDLYB VOUTB < VTH 2.1 1.250 3.0 3.9 V A ISOURCE= 0.5mA ISINK= 1.2mA 90 88 90 30 90 90 92 50 150 4 98 0.02 0.10 %VOUT V 92 94 70 210 ms ms %VOUT IENA/B 0V VENA/B VIN -0.5 1.6 0.4 +0.5 A V tr CBYP = 10nF 1.25 ms
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SC1452
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: TA = 25C, VIN = VOUT + 1V, IOUTA = IOUTB = 1mA, CIN = COUT = 1.0 F, VENA = VENB = VIN. Values in bold apply over full operating temperature range.
Parameter Over Temperature Protection High Trip Level Hysteresis
Symbol
Conditions
Min
Typ
Max
Units
THI THYST
150 20
C C
NOTES: (1) Low duty cycle pulse testing with Kelvin connections required. (2) Defined as the input to output differential at which the output drops 100mV below the value measured at a differential of 1V. Not measurable on 1.5V and 1.8V outputs due to minimum VIN constraints. (3) Guaranteed by design. (4) VOHA will be a percentage of VOUTA, and VOHB will be a percentage of VOUTB.
Timing Diagrams
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SC1452
POWER MANAGEMENT Pin Configuration
(Top View)
Voltage Options
Replace X in the part number (SC1452XIMS) by the letter shown below for the corresponding voltage option:
X A B VOUTA (V) 1.8 2.5 2.8 3.0 3.3 3.0 3.0 3.0 3.3 3.3 VOUTB (V) 1.8 2.5 2.8 3.0 3.3 2.5 1.8 2.8 2.5 2.8
MSOP-10
C D E
Ordering Information
Part Numbers SC1452XIMSTR
(1)(2)
P ackag e MSOP-10
F G H J K
SC1452XIMSTRT (1)(2)(3)
Notes: (1) Where X denotes voltage options - see Voltage Options table. (2) Only available in tape and reel packaging. A reel contains 2500 devices. (3) Lead-free product. This product is fully WEEE and RoHS compliant.
Pin Descriptions
Pin # 1 2 3 4 5 Pin Name OUTA OUTB GND RSTA RSTB Pin Function Regulator A output. Regulator B output. Ground pin. Power on reset for output A. Active low when OUTA is below the reset threshold. RSTA goes high 50ms (typical) after OUTA rises above the reset threshold. Power on reset for output B. Active low when OUTB is below the reset threshold. RSTB goes high 150ms (typical - can be adjusted using C DLYB) after OUTB rises above the reset threshold. Programmable delay for RESETB. Delay time can be set by connecting a capacitor, CDLYB, between this pin and ground. Ground this pin if using the default delay time. Active high enable pin for output B. CMOS compatible input. Connect to IN if not being used. Bypass pin for bandgap reference. Connect a 10nF capacitor, CBYP, between this pin and ground for low noise operation. Active high enable pin for output A. CMOS compatible input. Connect to IN if not being used. Input pin for both regulators.
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DLYB ENB BYP ENA IN
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SC1452
POWER MANAGEMENT Block Diagram
Marking Information
# = Voltage options (Example: 452F) yyww = Datecode (Example: 0008) XXXX = Lot Number (Example: E01102)
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SC1452
POWER MANAGEMENT Applications Information
Theory Of Operation The SC1452 is intended for applications where very low dropout voltage, low supply current and low output noise are critical. Furthermore, the SC1452, by combining two ultra low dropout (ULDO) regulators, along with enable PIN Descriptions controls and power-on resets (which function is usually served by external devices), provides a very space efficient solution for multiple supply requirements. The SC1452 contains two ULDOs, both of which are supplied by one input supply, between IN and GND. Each ULDO has its own active high enable pin (ENA/ENB). Pulling this pin low causes that specific ULDO to enter a very low power shutdown state. Each ULDO also has its own power on reset pin (RSTA/ RSTB), which asserts low whenever the output voltage is below the reset threshold for that output. Each reset remains asserted low until a specific delay time after the output rises back above the reset threshold. For output A, this delay time is typically 50ms. Output B has a programmable reset delay. If DLYB is grounded, the reset delay will be controlled by an internal timer to 150ms. If a capacitor is connected between DLYB and GND, a constant current, IDLYB, charges this capacitor until the delay threshold, VTH(DLYB), is reached, or the internal timer times out. See "Adjusting RSTB Delay Time". One advantage of on-board resets is that they remain asserted low all the way down to V IN = 0V, whereas external devices may require pull-down resistors. A bypass pin (BYP) is provided to decouple the bandgap reference to reduce output noise (on both outputs) and also to improve power supply rejection. The SC1452 contains an internal bandgap reference which is fed into the inverting input of two error amplifiers, one for each output. The output voltage of each regulator is divided down internally using a resistor divider and compared to the bandgap voltage. The error amplifier drives the gate of a low RDS(ON) P-channel MOSFET pass device. Each regulator has its own current limit circuitry to ensure that the output current will not damage the device during output short, overload or start-up. The current limit is guaranteed to be greater than 400mA to allow fast charging of the output capacitor and high
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initial currents for DSP initialization. The SC1452 has a fast start-up circuit to speed up the initial charging time of the bypass capacitor to enable the output voltage to come up quicker. The SC1452 includes thermal shutdown circuitry to turn off the device if T J exceeds 150C (typical), with the device remaining off until TJ drops by 20C (typical). Reverse battery protection circuitry ensures that the device cannot be damaged if the input supply is accidentally reversed, limiting the reverse current to less than 1.5mA. Adjusting RSTB Delay Time The power on reset delay for regulator B, tRSTB, can be reduced externally by connecting a capacitor to the delay time set pin DLYB. If DLYB is connected to ground, the internally controlled delay time of 150ms (typ.) will apply. Referring to the block diagram, as the output of regulator B (VOUTB) rises and reaches the reset threshold voltage (92% VOUTB(NOM)), two things happen: 1) the internal 150ms timer starts; 2) the 3A current source turns on, charging CDLYB (if connected). If DLYB is connected to ground, RSTB goes high 150ms after VOUTB crosses the threshold voltage. If a capacitor is connected between DLYB and ground, the voltage at DLYB can be described by the following equation:
VDLYB = 3 * 10 -6 * t C DLYB
An internal comparator compares this voltage to a 1.25V reference, and triggers the reset high once this voltage is reached. The delay time can be calculated by rearranging the above equation, solving for t:
t RSTB = C DLYB * 1 . 25 = 416 ,667 * C DLYB 3 * 10 - 6
Note that the maximum delay time is 150ms, as RSTB goes high when either the internal timer or externally set timer times out, so if tRSTB is set externally for 200ms, the reset delay will still be 150ms. Thus for a 150ms delay, DLYB should be grounded, and for a delay time
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SC1452
POWER MANAGEMENT Applications Information (Cont.)
less than 150ms, C DLYB can be calculated using the equation above, or read from the chart below.
1000 tRSTB = 150ms max.
For all practical purposes, equation (1) can be reduced to the following expression:
PD (MAX ) = (VIN (MAX ) - VOUTA (MIN ) )* IOUTA ( MAX ) + (VIN ( MAX ) - VOUTB ( MIN ) )* IOUTB (MAX )
(2)
100
tRSTB (ms)
10
1
0.1
Looking at a typical application: VIN(MAX) = 4.2V VOUTA = 3V - 2% (worst case) = 2.94V VOUTB = 3.3V - 2% (worst case) = 3.234V IOUTA = IOUTB = 150mA TA = 85C Inserting these values into equation (2) above gives us:
0.1 1 10 CDLYB (nF) 100 1000
0.01
PD(MAX ) = (4.2 - 2.94 ) * 0.15 + (4.2 - 3.234 ) * 0.15 = 0.189 + 0.145 = 0.334 W
Component Selection Output capacitor - Semtech recommends a minimum capacitance of 1F at the output with an equivalent series resistance (ESR) of < 1 over temperature. The SC1452 has been designed to be used with ceramic capacitors, but does not have to be used with ceramic capacitors, allowing the designer a choice. Increasing the bulk capacitance will further reduce output noise and improve the overall transient response. Input capacitor - Semtech recommends the use of a 1F ceramic capacitor at the input. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving overall load transient response. Bypass capacitor - Semtech recommends the use of a 10nF ceramic capacitor to bypass the bandgap reference. Increasing this capacitor to 100nF will further improve power supply rejection. CBYP may be omitted if low noise operation is not required. Thermal Considerations The worst-case power dissipation for this part is given by:
PD(MAX ) = (VIN (MAX ) - VOUTA (MIN ) )* IOUTA (MAX ) + VIN (MAX ) * IQ (MAX ) + (VIN (MAX ) - VOUTB (MIN ) )* IOUTB (MAX )
Using this figure, we can calculate the maximum thermal impedance allowable to maintain TJ 125C:
JA (MAX ) = =
(T
J( MAX )
- TA (MAX ) )
(125 - 85)
PD(MAX )
0.334 = 120C / W
With the standard MSOP-10 Land Pattern shown at the end of this datasheet, and minimum trace widths, the thermal impedance junction to ambient for SC1452 is 113C/W. Thus no additional heatsinking is required for the above conditions. The junction temperature can be further reduced by using larger trace widths and connecting pcb copper area to the GND pin (pin 3), which connects directly to the device substrate. Lower junction temperatures improve overall output voltage accuracy. Layout Considerations While layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. 1) Attaching the part to a larger copper footprint will enable better heat transfer from the device, especially on PCBs where there are internal ground and power planes. 2) Place the input, output and bypass capacitors close to the device for optimal transient response and device behaviour.
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(1)
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SC1452
POWER MANAGEMENT Applications Information (Cont.)
3) Connect all ground connections directly to the ground plane. If there is no ground plane, connect to a common local ground point before connecting to board ground. Enable Input Voltage vs. Junction Temperature vs. Input Voltage
1.6 VIH @ VIN = 6.5V 1.4 1.2 VEN (V) 1.0 0.8 0.6 0.4 VIH @ VIN = 4V
VIL @ VIN = 6.5V
VIL @ VIN = 4V
Typical Characteristics
Output Voltage vs. Output Current vs. Junction Temperature
0 -2 VOUT Deviation (mV) -4 -6 -8 -10 VIN = VOUT + 1V -12 0 25 50 75 IOUT (mA) 100 125 150 TJ = 25C VOUT Deviation (mV)
-50
-25
0
25 TJ (C)
50
75
100
125
Output Voltage vs. Junction Temperature vs. Output Current
0 -2 -4 -6 -8 -10 VIN = VOUT + 1V -12 -50 -25 0 25 TJ (C) 50 75 100 125 Top to bottom: IOUT = 1mA IOUT = 50mA IOUT = 100mA IOUT = 150mA
TJ = -40C
TJ = 125C
Dropout Voltage vs. Output Current vs. Junction Temperature
200 175 150 125 VD (mV) 100 75 50 25 0 0 25 50 75 IOUT (mA) 100 125 150 Top to bottom: TJ = 125C TJ = 25C TJ = -40C VD (mV) 200 175 150 125 100 75 50 25 0
Dropout Voltage vs. Junction Temperature vs. Output Current
IOUT = 150mA
IOUT = 50mA
-50
-25
0
25 TJ (C)
50
75
100
125
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SC1452
POWER MANAGEMENT Typical Characteristics (Cont.)
Line Regulation vs. Junction Temperature
10 9 8 7 REG(LINE) (mV) 6 5 4 3 2 1 0 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = VOUT + 1V to 5.5V IOUT = 1mA 10 9 VIN = VOUT + 1V to 6.5V REG(LOAD) mV 8 7 6 5 4 3 2 1 0 -50 -25 0 25 TJ (C) 50 75 100 125
Load Regulation vs. Junction Temperature
VIN = VOUT + 1V IOUT = 0.1mA to 150mA
Current Limit vs. Junction Temperature vs. Input Voltage
0.80 0.75 0.70 ILIM (mA) 0.65 0.60 0.55 0.50 0.45 0.40 -50 -25 0 25 TJ (C) 50 75 100 125 IQ (nA) VIN = 4V VIN = 6.5V 400 350 300 250 200 150 100 50 0 -50
Off-State Quiescent Current vs. Junction Temperature
VIN = 6.5V VENA = VENB = 0V
-25
0
25 TJ (C)
50
75
100
125
Quiescent Current vs. Junction Temperature vs. Output Current
200 175 150 125 IQ (A) 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 IQ (A) IOUTA or IOUTB = 150mA VIN = 6.5V IOUTA = IOUTB = 150mA
Quiescent Current vs. Junction Temperature vs. Input Voltage
200 175 150 125 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 Top to bottom: VIN = 6.5V VIN = 5V VIN = 4V IOUTA = IOUTB = 150mA
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SC1452
POWER MANAGEMENT Typical Characteristics (Cont.)
Bypass Start-up Rise Time vs. Junction Temperature vs. Input Voltage
2.00 1.75 1.50 1.25 tr (ms) 1.00 0.75 0.50 0.25 0.00 -50 -25 0 25 TJ (C) 50 75 100 125 89 88 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = 6.5V VIN = 4V CBYP = 10nF 94 93 VTH(RST) (%VOUT) 92 91 90 VOUT rising
Reset Threshold Voltage vs. Junction Temperature
VOUT falling
Reset Delay Times vs. Junction Temperature
200 175 150 IDLYB (A) tRST (ms) 125 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 tRSTB, CDLYB = 10nF tRSTA VOUT + 1V VIN 6.5V tRSTB, DLYB = 0V
Delay Source Current and Voltage Threshold vs. Junction Temperature
4.0 3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 -50 -25 0 25 50 75 100 TJ (C) VTH(DLYB) VOUT + 1V VIN 6.5V IDLYB 1.275 1.270 1.265 1.260 1.255 1.250 1.245 1.240 1.235 1.230 1.225 125 VTH(DLYB) (V)
Output Spectral Noise Density vs. Frequency vs. Output Voltage
10 Top to bottom: VOUT = 3.3V VOUT = 3.0V VOUT = 2.8V VOUT = 2.5V VOUT = 1.8V
Output Spectral Noise Density vs. Frequency vs. Output Capacitance
10
1 en (V/Hz)
1 en (V/Hz)
0.1 VOUT = 3V VIN = 4V IOUT = 50mA CBYP = 10nF CIN = 1F TJ = 25C 0.1 1 f (kHz) Left to right: COUT = 44F COUT = 22F COUT = 10F COUT = 2.2F 10 100 1000
0.1
VIN = VOUT + 1V IOUT = 50mA CIN = 1F CBYP = 10nF COUT = 2.2F TJ = 25C 0.1 1 f (kHz) 10 100 1000
0.01
0.01 0.01
0.001 0.01
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SC1452
POWER MANAGEMENT Typical Characteristics (Cont.)
Output Spectral Noise Density vs. Frequency vs. Bypass Capacitance
10 VOUT = 1.8V VIN = 2.8V IOUT = 50mA CIN = 1F COUT = 2.2F TJ = 25C 10
Output Spectral Noise Density vs. Frequency vs. Output Current
Top to bottom: IOUT = 150mA IOUT = 100mA IOUT = 50mA IOUT = 1mA
1 en (V/Hz)
1 en (V/Hz)
0.1 VOUT = 1.8V VIN = 2.8V CIN = 1F CBYP = 10nF COUT = 2.2F TJ = 25C 0.1 1 f (kHz) 10 100 1000
0.1
CBYP = 100pF CBYP = 1nF CBYP = 10nF CBYP = 100nF CBYP = 1F 0.1 1 f (kHz) 10 100 1000
0.01
0.01 0.01
0.001 0.01
PSRR vs. Frequency vs. Output Voltage (CBYP = 10nF)
75 70 65 60 PSRR (dB) PSRR (dB) 55 50 45 40 35 30 VIN = VOUT + 1V CIN = COUT = 1F CBYP = 10nF IOUT = 1mA TJ = 25C 0.1 Top to bottom: VOUT = 1.8V VOUT = 2.5V VOUT = 2.8V VOUT = 3.0V VOUT = 3.3V 75 70 65 60 55 50 45 40 35 30 100 1000
PSRR vs. Frequency vs. Output Voltage (CBYP = 100nF)
VIN = VOUT + 1V CIN = COUT = 1F CBYP = 100nF IOUT = 1mA TJ = 25C 0.1
Top to bottom: VOUT = 1.8V VOUT = 2.5V VOUT = 2.8V VOUT = 3.0V VOUT = 3.3V
25 0.01
1 f (kHz)
10
25 0.01
1 f (kHz)
10
100
1000
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SC1452
POWER MANAGEMENT Evaluation Board Schematic
J1 ENA JP1 J3 RIPPLE A 12345 J4 RIPPLE B 12345 1 2 3 OUTA ENABLE J6 1 OUTA J7 OUTB J8 RSTA J9 RSTB 2 3 4 5 R3 Open R4 Open U1 OUTA OUTB GND RSTA RSTB IN ENA BYP ENB DLYB 10 9 8 7 6 R2 10k + C1 220uF R1 10k J2 ENB JP2 1 2 3 OUTB ENABLE J5 VIN
SC1452xIMS C2 2.2uF C3 2.2uF JP3 1 2 IQ MON C4 1uF C5 10nF C6 10nF
JP4 150mA Short 1 2 3 R5 (1) R6 (1)
JP5 1 2 3 OUTB LOAD
150mA Short
OUTA LOAD
J10 OUTB LOAD DRV U2 8 7 6 5 D D D D Si4410 S S S G 1 2 3 4 JP6 1 2 3 NOTE: (1) See table below for resistor values EN Output Voltage 1.8 2.5 2.8 3.0 3.3 R (Ohms) (1W) 12 16 18 20 22
OFF OUTB LOAD
J11 OUTA LOAD DRV U3 8 7 6 5 D D D D Si4410 S S S G 1 2 3 4 JP7 1 2 3 EN J12 GND J13 GND J14 GND J15 GND J16 GND J17 GND J18 GND
OFF OUTA LOAD
Evaluation Board Gerber Plots
Top Copper
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Bottom Copper
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SC1452
POWER MANAGEMENT Evaluation Board Gerber Plots (Cont.)
Top Silk Screen
Evaluation Board Bill of Materials
Quantity 1 2 1 2 2 2 3 2 2 7 6 1 2 2 2 1 2 Reference C1 C 2, C 3 C4 C 5, C 6 J1 , J2 J3 , J4 J5 - J7 J8 , J9 J10, J11 J1 2 - J1 8 JP 1 , JP 2 , JP 4 - JP 7 JP 3 R1, R2 R3, R4 R5, R6 U1 U2, U3 Part/Description 220F, 10V 2.2F ceramic 1F ceramic 10nF ceramic Test pin BNC socket Test pin Test pin Test pin Test pin Header, 3 pin Header, 2 pin 10k, 1/10W Not placed See schematic SC1452xIMS S i 4410 Various Semtech Vishay 1W Vendor Various Murata Murata Various Various Various Various Various Various Various Various Various Various White VOUT ripple monitor Red Yellow Orange Black GRM42-6X7R225K16 GRM42-6X7R105K25 Notes
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SC1452
POWER MANAGEMENT Outline Drawing - MSOP-10
e A N 2X E/2 PIN 1 INDICATOR ccc C 2X N/2 TIPS 12 B E1 E D
DIM
A A1 A2 b c D E1 E e L L1 N 01 aaa bbb ccc
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.043 .000 .006 .030 .037 .007 .011 .003 .009 .114 .118 .122 .114 .118 .122 .193 BSC .020 BSC .016 .024 .032 (.037) 10 8 0 .004 .003 .010 1.10 0.00 0.15 0.75 0.95 0.17 0.27 0.08 0.23 2.90 3.00 3.10 2.90 3.00 3.10 4.90 BSC 0.50 BSC 0.40 0.60 0.80 (.95) 10 0 8 0.10 0.08 0.25
D aaa C SEATING PLANE A2 C A1 bxN bbb C A-B D A GAGE PLANE 0.25 (L1) DETAIL SIDE VIEW SEE DETAIL L H c
01
A
A
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-187, VARIATION BA.
Land Pattern - MSOP-10
X
DIM
(C) G Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.161) .098 .020 .011 .063 .224 (4.10) 2.50 0.50 0.30 1.60 5.70
Y P
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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