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Dual 150mA Ultra Low Dropout, Low Noise Regulator
POWER MANAGEMENT Description
The SC1454 contains two ultra low dropout voltage regulators (ULDOs). It operates from an input voltage range of 2.25V to 6.5V, and a wide variety of output voltage options are available. One ULDO has a fixed output, and the other is either fixed (SETA pin grounded) or adjustable using external resistors. Each ULDO has an independent enable pin. The SC1454 has a bypass pin to enable the user to capacitively decouple the bandgap reference for very low output noise (50VRMS typically). Designed specifically for battery operated systems, the devices utilize CMOS technology to require very low operating currents (typically 130A with both outputs supplying 150mA). In addition, the dropout voltage is typically 155mV at 150mA, helping to prolong battery life further. The devices are designed to provide 400mA of peak current for applications which require high initial inrush current. They have been designed to be used with low ESR ceramic capacitors to save cost and PCB area. The SC1454 is available with a wide variety of voltage options as standard. It comes in the tiny 8 lead MSOP surface mount package.
SC1454
Features
Up to 150mA per regulator output Low quiescent current Low dropout voltage Stable operation with ceramic caps Very low 50VRMS output noise Wide selection of output voltages Tight load and line regulation Current and thermal limiting Reverse input polarity protection <1.5uA off-mode current Logic controlled enable
Applications
Cellular telephones Palmtop/Laptop computers Battery-powered equipment Bar code scanners SMPS post regulator/dc to dc modules High efficiency linear power supplies
Typical Application Circuit
OUTPUT A: 3.0V OUTPUT B: 3.0V 1 2 3 4 C1 1uF C2 1uF U1 SC1454DIMS OUTA OUTB GND SETA IN ENA BYP ENB 8 7 6 5 C3 10nF ENABLE OUTPUT B C4 1uF VIN ENABLE OUTPUT A
OUTPUT A: 2.5V OUTPUT B: 2.8V R1 100k
1 2 3 4
U1
SC1454CIMS IN ENA BYP ENB
OUTA OUTB GND SETA
8 7 6 5
VIN ENABLE OUTPUT A
ENABLE OUTPUT B
C1 1uF
C2 1uF
R2 100k
C3 10nF
C4 1uF
Revision: May 4, 2005
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SC1454
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability.
Parameter Input Supply Voltage Enable Input Voltage Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Thermal Impedance Junction to Ambient(1) Thermal Impedance Junction to Ambient(2) Thermal Impedance Junction to Case ESD Rating (Human Body Model)
Symbol VIN V EN TA TJ TSTG JA JA J C ESD
Maximum -5 to +7 -5 to +VIN -40 to +85 -40 to +125 -60 to +150 206 95 39 2
Units V V C C C C/W C/W C/W kV
Notes: (1) Minimum pad size. (2) 1 square inch of FR-4, double sided, 1oz. minimum copper weight.
Electrical Characteristics
Unless specified: TA = 25C, VIN = VOUT + 1V, IOUTA = IOUTB = 1mA, CIN = COUT = 1.0 F, VENA = VENB = VIN. Values in bold apply over full operating temperature range.
Parameter IN Input Supply Voltage Quiescent Current
Symbol
Conditions
Min
Typ
Max
Units
VIN IQ VENA = 0V, VENB = VIN, IOUTB = 150mA or VENB = 0V, VENA = VIN, IOUTA = 150mA VENA = VENB = VIN, IOUTA = IOUTB = 150mA
2.25 100
6.50 150 200 130 200 250
V A
A
VIN = 6.5V, VENA = VENB = 0V (OFF)
0.2
1.0 1.5
A
OUTA, OUTB Output Voltage(1) VOUT IOUT = 1mA 0mA IOUT 150mA, VOUT + 1V VIN 5.5V Line Regulation(1) REG(LINE) VOUT + 1V VIN 5.5V, IOUT = 1mA -1% -2% 2.5 VOUT +1% +2% 10 12 Load Regulation(1) REG(LOAD) 0.1mA IOUT 150mA
2
V
mV
-5
-20 -30
mV
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SC1454
POWER MANAGEMENT Electrical Characteristics
Unless specified: TA = 25C, VIN = VOUT + 1V, IOUTA = IOUTB = 1mA, CIN = COUT = 1.0 F, VENA = VENB = VIN. Values in bold apply over full operating temperature range.
Parameter OUTA, OUTB (Cont.) Dropout Voltage(1)(2)
Symbol
Conditions
Min
Typ
Max
Units
VD
IOUT = 1mA IOUT = 50mA
1 52 70 90
mV
IOUT = 150mA
155
210 270
Current Limit Ripple Rejection Output Voltage Noise
ILIM PSRR en f = 120Hz, CBYP = 10nF f = 10Hz to 100kHz, IOUT =50mA, CBYP = 10nF, COUT = 2.2F, 1.8V output f = 10Hz to 100kHz, IOUT =50mA, CBYP = 10nF, COUT = 2.2F, 3.3V output
400 61 27 55
mA dB VRMS
ENA, ENB Enable Input Threshold VIH VIL Enable Input Bias Current(3) BYP Start-Up Rise Time SETA Sense/Select Threshold SETA Reference Voltage VTH VSETA VIN = 2.5V, IOUT = 1mA 0mA IOUT 150mA, 2.5V VIN 5.5V SETA Input Leakage Current(3) Over Temperature Protection High Trip Level Hysteresis THI THYST 150 20 C C ISETA VSETA = 1.3V 20 -1% -2% 0.015 40 1.250 80 +1% +2% 50 nA mV V tr CBYP = 10nF 1.25 ms IEN 0V VENA/B VIN -0.5 1.6 0.4 0.5 A V
NOTES: (1) Low duty cycle pulse testing with Kelvin connections required. (2) Defined as the input to output differential at which the output drops 100mV below the value measured at a differential of 1V. Not measurable on outputs less than 2.25V due to minimum VIN constraints. (3) Guaranteed by design.
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SC1454
POWER MANAGEMENT Pin Configuration
TOP VIEW
OUTA OUTB GND SETA 1 2 3 4 8 7 6 5 IN ENA BYP ENB
Voltage Options
Replace X in the part number (SC1454XIMS) by the letter shown below for the corresponding voltage option:
X A B C VOUTA (V) 1.8 2.5 2.8 3.0 3.3 3.0 3.0 3.0 3.3 3.3 VOUTB (V) 1.8 2.5 2.8 3.0 3.3 2.5 1.8 2.8 2.5 2.8
(MSOP-8)
D E
Ordering Information
Part Numbers SC1454XIMSTR(1)(2) SC1454XIMSTRT(1)(2)(3) MSOP-8 P ackag e
F G H J K
Notes: (1) Where X denotes voltage options - see Voltage Options table. (2) Only available in tape and reel packaging. A reel contains 2500 devices. (3) Lead free product. This product is fully WEEE and RoHS compliant.
Pin Descriptions
Pin # 1 2 3 4 Pin Name OUTA OUTB GND SETA Regulator A output. Regulator B output. Ground pin. Connecting this pin to ground results in the internally preset value for VOUT. Connecting to an external resistor divider changes VOUTA to:
R1 VOUTA = 1 .250 * 1 + R2
Pin Function
5 6 7 8
ENB BYP ENA IN
Active high enable pin for output B. CMOS compatible input. Connect to IN if not being used. Bypass pin for bandgap reference. Connect a 10nF capacitor, CBYP, between this pin and ground for low noise operation. Active high enable pin for output A. CMOS compatible input. Connect to IN if not being used. Input pin for both regulators.
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SC1454
POWER MANAGEMENT Block Diagram
Marking Information
# = Voltage option (Example: 454F) yyww = Datecode (Example: 0008) XXXX = Lot number (Example: E90101-1)
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SC1454
POWER MANAGEMENT Applications Information
Theory Of Operation The SC1454 is intended for applications where very low dropout voltage, low supply current and low output noise are critical. Furthermore, the SC1454, by combining two ultra low dropout (ULDO) regulators, along with enable PIN Descriptions controls and output voltage adjustability for one output, provides a very space efficient solution for multiple supply requirements. The SC1454 contains two ULDOs, both of which are supplied by one input supply, between IN and GND. Each ULDO has its own active high enable pin (ENA/ENB). Pulling this pin low causes that specific ULDO to enter a very low power shutdown state. The SC1454 contains an internal bandgap reference which is fed into the inverting input of two error amplifiers, one for each output. The output voltage of each regulator is divided down internally using a resistor divider and compared to the bandgap voltage. The error amplifier drives the gate of a low R DS(ON) P-channel MOSFET pass device. Output A has both a fixed and adjustable output voltage mode. Grounding the SETA pin (pulling it below the Sense/ Select threshold of 40mV) will connect the internal resistor divider to the error amplifier resulting with the internally preset output voltage. If SETA is pulled above this threshold, then the Sense/Select switch will connect the SETA pin to the error amplifier. Output A will then be regulated such that the voltage at SETA will equal VSETA, the SETA reference voltage (typically 1.250V). A bypass pin (BYP) is provided to decouple the bandgap reference to reduce output noise (on both outputs) and also to improve power supply rejection. Each regulator has its own current limit circuitry to ensure that the output current will not damage the device during output short, overload or start-up. The current limit is guaranteed to be greater than 400mA to allow fast charging of the output capacitor and high initial currents for DSP initialization. The SC1454 has a fast start-up circuit to speed up the initial charging time of the bypass capacitor to enable the output voltage to come up quicker.
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The SC1454 includes thermal shutdown circuitry to turn off the device if T J exceeds 150C (typical), with the device remaining off until TJ drops by 20C (typical). Reverse battery protection circuitry ensures that the device cannot be damaged if the input supply is accidentally reversed, limiting the reverse current to less than 1.5mA. Component Selection - General Output capacitor - Semtech recommends a minimum capacitance of 1F at the output with an equivalent series resistance (ESR) of < 1 over temperature. While the SC1454 has been designed to be used with ceramic capacitors, it does not have to be used with ceramic capacitors, allowing the designer a choice. Increasing the bulk capacitance will further reduce output noise and improve the overall transient response. Input capacitor - Semtech recommends the use of a 1F ceramic capacitor at the input. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving overall load transient response. Bypass capacitor - Semtech recommends the use of a 10nF ceramic capacitor to bypass the bandgap reference. Increasing this capacitor to 100nF will further improve power supply rejection. Reducing this capacitor below 1nF may result in output overshoot at turn-on. Component Selection - Externally Setting Output
OUTPUT A: 2.5V OUTPUT B: 2.8V R1 100k 1 2 3 4 U1 SC1454CIMS OUTA OUTB GND SETA IN ENA BYP ENB 8 7 6 5 ENABLE OUTPUT B VIN ENABLE OUTPUT A
C1 1uF
C2 1uF
R2 100k
C3 10nF
C4 1uF
Referring to the circuit above, the output voltage of output A can be externally adjusted anywhere within the range from 1.25V to (VIN(MAX) - VD(MAX)). The output voltage will be in accordance with the following equation:
R1 VOUTA = 1.250 * 1 + R2
1% tolerance resistors are recommended. The values of
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SC1454
POWER MANAGEMENT Applications Information (Cont.)
R1 and R2 should be selected such that the current flowing through them is 10A (thus R2 120k). Thermal Considerations The worst-case power dissipation for this part is given by:
PD(MAX ) = (VIN (MAX ) - VOUTA (MIN ) )* IOUTA (MAX ) + VIN (MAX ) * IQ (MAX ) + (VIN (MAX ) - VOUTB (MIN ) )* IOUTB (MAX )
impedance allowable to maintain TJ 125C:
JA (MAX ) = =
(T
J( MAX )
- TA (MAX ) )
(125 - 85)
PD(MAX )
0.334 = 120C / W
(1)
For all practical purposes, equation (1) can be reduced to the following expression:
PD (MAX ) = (VIN (MAX ) - VOUTA (MIN ) )* IOUTA ( MAX ) + (VIN ( MAX ) - VOUTB ( MIN ) )* IOUTB (MAX )
This target value can be achieved by using one square inch of board copper connected to the GND pin (pin 3), which connects directly to the device substrate. Increasing this area or the use of multi layer boards will lower the junction temperature and improve overall output voltage accuracy. Layout Considerations While layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. 1) Attaching the part to a larger copper footprint will enable better heat transfer from the device, especially on PCBs where there are internal ground and power planes. 2) Place the input, output and bypass capacitors close to the device for optimal transient response and device behaviour. 3) Connect all ground connections directly to the ground plane. If there is no ground plane, connect to a common local ground point before connecting to board ground.
(2)
Looking at a typical application: VIN(MAX) = 4.2V VOUTA = 3V - 2% (worst case) = 2.94V VOUTB = 3.3V - 2% (worst case) = 3.234V IOUTA = IOUTB = 150mA TA = 85C Inserting these values into equation (2) above gives us:
PD(MAX ) = (4.2 - 2.94 ) * 0.15 + (4.2 - 3.234 ) * 0.15 = 0.189 + 0.145 = 0.334 W
Using this figure, we can calculate the maximum thermal
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SC1454
POWER MANAGEMENT Typical Characteristics
Output Voltage vs. Output Current vs. Junction Temperature, VOUT = 2.8V
10.0 7.5 VOUT Deviation (mV) 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 0 25 50 75 IOUT (mA) 100 125 150 Top to bottom: TA = 125C TA = 25C TA = -40C VIN = 3.8V VOUT = 2.8V VOUT Deviation (mV) 10.0 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 -50 -25 0 25 TJ (C) 50 75 100 125
Output Voltage vs. Junction Temperature vs. Output Current, VOUT = 2.8V
VIN = 3.8V VOUT = 2.8V Top to bottom: IOUT = 1mA IOUT = 50mA IOUT = 100mA IOUT = 150mA
Output Voltage vs. Junction Temperature vs. Output Current, VOUT = 1.5V
10.0 7.5 5.0 2.5 VOUT (V) 0.0 -2.5 -5.0 -7.5 -10.0 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 150mA IOUT = 1mA VIN = 2.5V VOUT = 1.5V 40 30 20 10 VOUT (V) 0 -10 -20 -30 -40
Output Voltage vs. Junction Temperature vs. Output Current, VOUT = 5.5V
VIN = 6.5V VOUT = 5.5V
IOUT = 1mA
IOUT = 150mA
-50
-25
0
25 TJ (C)
50
75
100
125
SETA Reference Voltage vs. Junction Temperature vs. Output Current, VIN = 2.5V
1.275 1.270 1.265 1.260 VSET (V) 1.255 1.250 1.245 1.240 1.235 1.230 1.225 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 150mA IOUT = 1mA VIN = 2.5V
SETA Reference Voltage vs. Junction Temperature vs. Output Current, VIN = 6.5V
1.275 1.270 1.265 1.260 VSET (V) 1.255 1.250 1.245 1.240 1.235 1.230 1.225 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 1mA VIN = 6.5V
IOUT = 150mA
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SC1454
POWER MANAGEMENT Typical Characteristics (Cont.)
Dropout Voltage vs. Output Current vs. Junction Temperature
200 175 150 125 VD (mV) 100 75 50 25 0 0 25 50 75 IOUT (mA) 100 125 150 Top to bottom: TJ = 125C TJ = 25C TJ = -40C VD (mV) 200 175 150 125 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 50mA IOUT = 150mA
Dropout Voltage vs. Junction Temperature vs. Output Current
Line Regulation vs. Junction Temperature
10 9 8 7 REG(LINE) (mV) 6 5 4 3 2 1 0 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = VOUT + 1V to 5.5V IOUT = 1mA 10 9 VIN = VOUT + 1V to 6.5V REG(LOAD) (mV) 8 7 6 5 4 3 2 1 0 -50 -25
Load Regulation vs. Junction Temperature
VIN = VOUT + 1V IOUT = 0.1mA to 150mA
0
25 TJ (C)
50
75
100
125
Current Limit vs. Junction Temperature vs. Input Voltage
800 750 VIN = 6.5V 700 ILIM (mA) 650 600 550 VIN = 3.8V 500 450 400 -50 -25 0 25 TJ (C) 50 75 100 125 100 50 0 -50 IQ (nA) 300 250 200 150 400 350
Off-State Quiescent Current vs. Junction Temperature
VIN = 6.5V VENA = VENB = 0V
-25
0
25 TJ (C)
50
75
100
125
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SC1454
POWER MANAGEMENT Typical Characteristics (Cont.)
Quiescent Current vs. Junction Temperature vs. Output Current
200 175 150 125 IQ (A) 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 IQ (A) IOUTA or IOUTB = 150mA VIN = 6.5V IOUTA = IOUTB = 150mA 200 175 150 125 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 Top to bottom: VIN = 6.5V VIN = 5V VIN = 3.8V
Quiescent Current vs. Junction Temperature vs. Input Voltage
IOUTA = IOUTB = 150mA
Enable Input Voltage vs. Junction Temperature vs. Input Voltage
1.6 VIH @ VIN = 6.5V 1.4 1.2 VEN (V) 1.0 0.8 0.6 0.4 -50 -25 0 25 TJ (C) 50 75 100 125 VIH @ VIN = 4V VTH (mV) 80 70 60 50 40 30 20 10 0 -50
Sense/Select Threshold Voltage vs. Junction Temperature vs. Input Voltage
VIN = 6.5V
VIL @ VIN = 6.5V
VIN = 3.8V
VIL @ VIN = 4V
-25
0
25 TJ (C)
50
75
100
125
Bypass Start-up Rise Time vs. Junction Temperature vs. Input Voltage
2.00 1.75 1.50 1.25 tr (ms) 1.00 VIN = 6.5V 0.75 0.50 0.25 0.00 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = 3.8V en (V/Hz) CBYP = 10nF
Output Spectral Noise Density vs. Frequency vs. Output Voltage
10 Top to bottom: VOUT = 3.3V VOUT = 3.0V VOUT = 2.8V VOUT = 2.5V VOUT = 1.8V
1
0.1
VIN = VOUT + 1V IOUT = 50mA CIN = 1F CBYP = 10nF COUT = 2.2F TJ = 25C 0.1 1 f (kHz) 10 100 1000
0.01 0.01
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SC1454
POWER MANAGEMENT Typical Characteristics (Cont.)
Output Spectral Noise Density vs. Frequency vs. Output Capacitance
10 10 VOUT = 1.8V VIN = 2.8V IOUT = 50mA CIN = 1F COUT = 2.2F TJ = 25C
Output Spectral Noise Density vs. Frequency vs. Bypass Capacitance
1 1 en (V/Hz) 0.1 VOUT = 1.8V VIN = 2.8V IOUT = 50mA CBYP = 10nF CIN = 1F TJ = 25C 0.1 1 f (kHz) Left to right: COUT = 44F COUT = 22F COUT = 10F COUT = 2.2F 10 100 1000 en (V/Hz)
0.1
0.01
CBYP = 100pF CBYP = 1nF CBYP = 10nF CBYP = 100nF CBYP = 1F 0.1 1 f (kHz) 10 100 1000
0.001 0.01
0.01 0.01
Output Spectral Noise Density vs. Frequency vs. Output Current
10.000 Top to bottom: IOUT = 150mA IOUT = 100mA IOUT = 50mA IOUT = 1mA PSRR (dB) 100 90 80 70 60 50 40 30 20 10 1 f (kHz) 10 100 1000
PSRR vs. Frequency vs. Output Voltage (CBYP = 10nF)
1.000 en (V/Hz)
0.100 VOUT = 1.8V VIN = 2.8V CIN = 1F CBYP = 10nF COUT = 2.2F TJ = 25C 0.1
0.010
VIN = VOUT + 1V CIN = COUT = 1F CBYP = 10nF IOUT = 1mA TJ = 25C 0.1
Top to bottom: VOUT = 1.8V VOUT = 2.5V VOUT = 2.8V VOUT = 3.0V VOUT = 3.3V 1 f (kHz) 10 100 1000
0.001 0.01
0 0.01
PSRR vs. Frequency vs. Output Voltage (CBYP = 100nF)
100 90 80 70 PSRR (dB) 60 50 40 30 20 10 VIN = VOUT + 1V CIN = COUT = 1F CBYP = 100nF IOUT = 1mA TJ = 25C 0.1 Top to bottom: VOUT = 1.8V VOUT = 2.5V VOUT = 2.8V VOUT = 3.0V VOUT = 3.3V 1 f (kHz) 10 100 1000
0 0.01
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SC1454
POWER MANAGEMENT Evaluation Board Schematic
J1 ENA J4 RIPPLE A 12345 J5 RIPPLE B 12345 JP1 1 2 3 ON J2 ENB JP2 1 2 3 ON J3 VIN
J6 1 2 OUTA J7 1 R2 OUTB 3 C1 C2 R4 2 3 4
U1 SC1454xIMS OUTA OUTB GND SETA JP3 1 2 IQ MON IN ENA BYP ENB
OFF OUTA ENABLE 8 7 6 5 R1
OFF OUTB ENABLE
R3
C3
C4
+
C5 220uF
JP4 EXT INT 1 2 3 OUTA SET
R5
R6 J8 OUTB LOAD DRV U2 8 7 6 5 D D D D Si4410 S S S G 1 2 3 4 JP5 1 2 3 EN
OFF OUTB LOAD J9 OUTA LOAD DRV
U3 8 7 6 5 D D D D Si4410 S S S G 1 2 3 4 JP6 1 2 3 EN
OFF OUTA LOAD
J10 GND
J11 GND
J12 GND
J13 GND
J14 GND
J15 GND
Evaluation Board Gerber Plots
Top Copper
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Bottom Copper
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SC1454
POWER MANAGEMENT Evaluation Board Gerber Plots (Cont.)
Top Assembly
Evaluation Board Bill Of Materials
Quantity 2 1 1 1 2 3 2 2 6 5 1 2 1 1 2 1 2 Reference C 1, C 2 C3 C4 C5 J1 , J2 J3 , J6 , J7 J4 , J5 J8 , J9 J1 0 - J1 5 JP 1 , JP 2 , JP 4 - JP 6 JP 3 R1, R3 R2 R4 R5, R6 U1 U2, U3 Part/Description 2.2F ceramic 10nF ceramic 1F ceramic 220F, 10V Test pin Test pin BNC socket Test pin Test pin Header, 3 pin Header, 2 pin 10k, 1/10W 250k, 25T 62k, 1/10W 150mA load SC1454xIMS S i 4410 Vendor Murata Various Murata Various Various Various Various Various Various Various Various Various Bourns Various Various Semtech Vishay 1W, may not be same value Trimmer potentiometer White Red VOUT ripple monitor Orange Black GRM42-6X7R105K25 Notes GRM42-6X7R225K16
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SC1454
POWER MANAGEMENT Outline Drawing - MSOP-8
e/2 A N 2X E/2 PIN 1 INDICATOR ccc C 2X N/2 TIPS 12 e B E1 E D
DIM
A A1 A2 b c D E1 E e L L1 N 01 aaa bbb ccc
DIMENSIONS MILLIMETERS INCHES MIN NOM MAX MIN NOM MAX
.043 .000 .006 .030 .037 .009 .015 .009 .003 .114 .118 .122 .114 .118 .122 .193 BSC .026 BSC .016 .024 .032 (.037) 8 0 8 .004 .005 .010 1.10 0.00 0.15 0.75 0.95 0.22 0.38 0.08 0.23 2.90 3.00 3.10 2.90 3.00 3.10 4.90 BSC 0.65 BSC 0.40 0.60 0.80 (.95) 8 0 8 0.10 0.13 0.25
aaa C SEATING PLANE
D A2 A GAGE PLANE 0.25
H c
C
A1 bxN bbb C A-B D
L (L1) DETAIL
01
A
SIDE VIEW
SEE DETAIL
A
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-187, VARIATION AA.
Land Pattern - MSOP-8
X
DIM
(C) G Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.161) .098 .026 .016 .063 .224 (4.10) 2.50 0.65 0.40 1.60 5.70
Y P
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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