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 PD - 95394A
DIGITAL AUDIO MOSFET
Features
Advanced Process Technology Key Parameters Optimized for Class-D Audio Amplifier Applications l Low RDSON for Improved Efficiency l Low Qg and Qsw for Better THD and Improved Efficiency l Low Qrr for Better THD and Lower EMI l 175C Operating Junction Temperature for Ruggedness l Repetitive Avalanche Capability for Robustness and Reliability l Multiple Package Options l Lead-Free
l l
IRLR4343PbF IRLU4343PBF IRLU4343-701PbF
Key Parameters
55 42 57 28 175 V m: m: nC C
VDS RDS(ON) typ. @ VGS = 10V RDS(ON) typ. @ VGS = 4.5V Qg typ. TJ max
D
G S
I-Pak IRLU4343 I-Pak Leadform 701 IRLU4343-701 Refer to page 10 for package outline
D-Pak IRLR4343
Description
This Digital Audio HEXFET(R) is specifically designed for Class-D audio amplifier applications. This MosFET utilizes the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD and EMI. Additional features of this MosFET are 175C operating junction temperature and repetitive avalanche capability. These features combine to make this MosFET a highly efficient, robust and reliable device for Class-D audio amplifier applications.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C PD @TC = 100C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation
Max.
55 20 26 19 80 79 39 0.53 -40 to + 175 ---
Units
V A
c
W W/C C N
Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Clamping Pressure
h
Thermal Resistance
RJC RJA RJA Junction-to-Case
g
Parameter
Typ.
Max.
1.9 50 110
Units
C/W
Junction-to-Ambient (PCB Mounted) Junction-to-Ambient (free air)
g
gj
--- --- ---
Notes through are on page 10
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1
12/8/04
IRLR/U4343PbF & IRLU4343-701PbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs Qgd Qgodr td(on) tr td(off) tf Ciss Coss Crss Coss LD LS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance Internal Drain Inductance Internal Source Inductance
Min.
55 --- --- --- 1.0 --- --- --- --- --- 8.8 --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units
--- 15 42 57 --- -4.4 --- --- --- --- --- 28 3.5 9.5 15 5.7 19 23 5.3 740 150 59 250 4.5 7.5 --- --- 50 65 --- --- 2.0 25 100 -100 --- 42 --- --- --- --- --- --- --- --- --- --- --- --- nH --- ns
Conditions
V VGS = 0V, ID = 250A mV/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 4.7A VGS = 4.5V, ID = 3.8A
e e
V
VDS = VGS, ID = 250A
mV/C A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125C nA S VGS = 20V VGS = -20V VDS = 25V, ID = 19A VDS = 44V VGS = 10V ID = 19A See Fig. 6 and 19 VDD = 28V, VGS = 10VAe ID = 19A RG = 2.5 VGS = 0V pF VDS = 50V = 1.0MHz, See Fig.5 VGS = 0V, VDS = 0V to -44V Between lead, 6mm (0.25in.) from package and center of die contact
G
D
f
Units mJ A mJ
S
Avalanche Characteristics
Parameter Typ. Max.
EAS IAR EAR
Single Pulse Avalanche Energyd Avalanche CurrentAi Repetitive Avalanche Energy
---
160
i
Min.
--- --- --- --- ---
See Fig. 14, 15, 17a, 17b
Diode Characteristics
Parameter
IS @ TC = 25C Continuous Source Current ISM VSD trr Qrr (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
Typ. Max. Units
--- --- --- 52 100 26 A 80 1.2 78 150 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 19A, VGS = 0V TJ = 25C, IF = 19A di/dt = 100A/s
e
e
2
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IRLR/U4343PbF & IRLU4343-701PbF
1000
TOP VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.5V 2.3V
1000
TOP VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.5V 2.3V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
2.3V
1
1
2.3V 60s PULSE WIDTH Tj = 25C
60s PULSE WIDTH Tj = 175C
0.1 0.1 1 10 100
0.1 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1000.0
Fig 2. Typical Output Characteristics
2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current ()
ID = 19A VGS = 10V
2.0
100.0
TJ = 25C T J = 175C
10.0
1.5
1.0
1.0
VDS = 30V 60s PULSE WIDTH
0.1 0 2 4 6 8 10
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
T J , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
20
10000
VGS, Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
ID= 19A VDS= 44V VDS= 28V VDS= 11V
16
C, Capacitance (pF)
1000
Ciss Coss Crss
12
8
100
4
FOR TEST CIRCUIT SEE FIGURE 19
10 1 10 100
0 0 10 20 30 40 QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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3
IRLR/U4343PbF & IRLU4343-701PbF
1000.0
1000
OPERATION IN THIS AREA LIMITED BY R DS(on)
100.0
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
TJ = 175C
10.0
100
100sec
10
1.0
TJ = 25C VGS = 0V
Tc = 25C Tj = 175C Single Pulse
1 0 1 10
1msec 10msec
100 1000
0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VSD, Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
30 2.0
Fig 8. Maximum Safe Operating Area
25
20
VGS(th) Gate threshold Voltage (V)
ID , Drain Current (A)
1.5
ID = 250A
15
10
1.0
5
0 25 50 75 100 125 150 175
0.5 -75 -50 -25 0 25 50 75 100 125 150 175
T J , Junction Temperature (C)
T J , Temperature ( C )
Fig 9. Maximum Drain Current vs. Case Temperature
10
Fig 10. Threshold Voltage vs. Temperature
Thermal Response ( Z thJC )
1
D = 0.50 0.20 0.10
0.1
0.05 0.02 0.01
J
R1 R1 J 1 2
R2 R2 C
Ri (C/W) 1.359 0.5409
i (sec) 0.00135 0.003643
1
2
0.01
Ci= i/Ri Ci= i/Ri
SINGLE PULSE ( THERMAL RESPONSE )
0.001 1E-006 1E-005 0.0001 0.001
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
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IRLR/U4343PbF & IRLU4343-701PbF
RDS(on), Drain-to -Source On Resistance ( m) EAS, Single Pulse Avalanche Energy (mJ)
200 700
ID = 19A
150
600 500 400 300 200 100 0 25 50 75 100
ID 2.4A 3.3A BOTTOM 19A
TOP
100
T J = 125C
50
T J = 25C
0 2.0 4.0 6.0 8.0 10.0
125
150
175
VGS, Gate-to-Source Voltage (V)
Starting T J, Junction Temperature (C)
Fig 12. On-Resistance Vs. Gate Voltage
1000
Fig 13. Maximum Avalanche Energy Vs. Drain Current
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
10
0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
1
0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
180 160
EAR , Avalanche Energy (mJ)
140 120 100 80 60 40 20 0 25 50
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 19A
75
100
125
150
175
Starting T J , Junction Temperature (C)
Fig 15. Maximum Avalanche Energy Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 17a, 17b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). t av = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
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5
IRLR/U4343PbF & IRLU4343-701PbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Inductor Curent Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
15V
LD VDS
VDS L
DRIVER
+
VDD -
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
D.U.T VGS Pulse Width < 1s Duty Factor < 0.1%
0.01
Fig 17a. Unclamped Inductive Test Circuit
V(BR)DSS tp
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
I AS
td(on)
tr
td(off)
tf
Fig 17b. Unclamped Inductive Waveforms
Fig 18b. Switching Time Waveforms
Id Vds Vgs
L VCC
0
DUT 1K
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 19a. Gate Charge Test Circuit
Fig 19b Gate Charge Waveform
6
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IRLR/U4343PbF & IRLU4343-701PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF R120 WIT H AS S EMBLY LOT CODE 1234 AS S EMB LED ON WW 16, 1999 IN T HE AS S EMBLY LINE "A" Note: "P" in as s embly line pos ition indicates "Lead-F ree" PART NUMBER INT ERNAT IONAL RECT IF IER LOGO
IRF U120 12 916A 34
AS S EMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
OR
PART NUMBER INT ERNAT IONAL RE CT IF IER LOGO
IRF U120 12 34
DAT E CODE P = DES IGNAT ES LEAD-F REE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 16 A = AS S EMBLY S ITE CODE
AS S EMBLY LOT CODE
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IRLR/U4343PbF & IRLU4343-701PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120 WIT H AS S EMBLY LOT CODE 5678 AS S EMB LE D ON WW 19, 1999 IN T HE AS S EMBLY LINE "A" Note: "P" in as s embly line pos ition indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO PART NUMBER
IRFU120 919A 56 78
AS S EMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
OR
INT E RNAT IONAL RE CT IF IER LOGO PART NUMBER
IRFU120 56 78
AS S EMBLY L OT CODE
DAT E CODE P = DES IGNAT E S LEAD-FREE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEE K 19 A = AS S EMB LY S IT E CODE
8
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IRLR/U4343PbF & IRLU4343-701PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
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9
IRLR/U4343PbF & IRLU4343-701PbF
I-Pak Leadform Option 701 Package Outline
Dimensions are shown in millimeters (inches)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. Starting TJ = 25C, L = 0.93mH, RG = 25, IAS = 19A. Pulse width 400s; duty cycle 2%. This only applies for I-Pak, LS of D-Pak is measured between lead and center of die contact R is measured at TJ of approximately 90C.
Contact factory for mounting information Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information When D-Pak mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to application note #AN-994 Refer to D-Pak package for Part Marking, Tape and Reel information.
Data and specifications subject to change without notice. This product has been designed for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04
10
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/


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