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(R) VN920D-B5 / VN920DSO HIGH SIDE DRIVER TYPE VN920D-B5 VN920DSO RDS(on) 18 m IOUT 30 A VCC 36 V CMOS COMPATIBLE INPUT s ON STATE OPEN LOAD DETECTION s OFF STATE OPEN LOAD DETECTION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT s s P2PAK SO-16L ORDER CODES PACKAGE TUBE T&R SO-16L P2PAK VN920DSO VN920DSO13TR VN920D-B5 VN920D-B513TR REVERSE BATTERY PROTECTION (*) transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device detects open load condition both is on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. DESCRIPTION The VN920D-B5, VN920DSO are monolithic devices made by using STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 BLOCK DIAGRAM VCC VCC CLAMP OVERVOLTAGE DETECTION UNDERVOLTAGE DETECTION GND Power CLAMP INPUT LOGIC DRIVER OUTPUT CURRENT LIMITER STATUS ON STATE OPENLOAD DETECTION OVERTEMPERATURE DETECTION OFF STATE OPENLOAD AND OUTPUT SHORTED TO VCC DETECTION (*) See application schematic at page 8 Rev. 1 1/22 July 2004 VN920D-B5 / VN920DSO ABSOLUTE MAXIMUM RATING Symbol VCC - VCC - IGND IOUT - IOUT IIN ISTAT Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) - INPUT VESD - CURRENT SENSE - OUTPUT - VCC Maximum Switching Energy (L=0.25mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=45A) Power Dissipation TC=25C Junction Operating Temperature Case Operating Temperature Storage Temperature Value P2PAK SO-16L 41 - 0.3 - 200 Internally Limited - 25 +/- 10 +/- 10 4000 4000 5000 5000 364 352 Unit V V mA A A mA mA V V V V mJ W C C C EMAX Ptot Tj Tc Tstg 96.1 8.3 Internally Limited - 40 to 150 - 55 to 150 CONNECTION DIAGRAM (TOP VIEW) VCC N.C. GND INPUT STATUS N.C. N.C. VCC 8 9 1 16 VCC OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT VCC Connection / Pin Floating To Ground Status X N.C. X X Output X Input X Through 10K resistor 5 4 3 2 1 OUTPUT STATUS VCC INPUT GND P PAK 2 SO-16L CURRENT AND VOLTAGE CONVENTIONS IS IIN INPUT ISTAT STATUS VCC IOUT OUTPUT GND VCC VIN VSTAT IGND VOUT 2/22 VN920D-B5 / VN920DSO THERMAL DATA Symbol Rthj-case Rthj-lead Rthj-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-lead Thermal Resistance Junction-ambient Max Max Max Value P2PAK 1.3 51.3 (*) SO-16L 15 65 (**) Unit C/W C/W C/W (*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). (**) When mounted on FR4 printed circuit board with 0.5cm 2 of Cu (at least 35 thick) connected to all V CC pins. ELECTRICAL CHARACTERISTICS (8V Tj=25C On State; VCC=13V; VIN=5V; IOUT=0A IL(off1) IL(off2) IL(off3) IL(off4) Off Off Off Off State State State State Output Current Output Current Output Current Output Current VIN=VOUT=0V VIN=0V; VOUT =3.5V VIN=VOUT=0V; VCC=13V; Tj =125C VIN=VOUT=0V; VCC=13V; Tj =25C SWITCHING (V CC=13V) Symbol td(on) td(off) dVOUT/ dt(on) dVOUT/ dt(off) Parameter Turn-on Delay Time Turn-off Delay Time Turn-on Voltage Slope Test Conditions RL=1.3 RL=1.3 RL=1.3 Min Typ 50 50 See relative diagram See relative diagram Max Unit s s V/s Turn-off Voltage Slope RL=1.3 V/s INPUT PIN Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN=1.25V VIN=3.25V IIN=1mA IIN=-1mA 0.5 6 6.8 -0.7 Min 1 3.25 10 8 Typ Max 1.25 Unit V A V A V V V 3/22 1 VN920D-B5 / VN920DSO ELECTRICAL CHARACTERISTICS (continued) VCC - OUTPUT DIODE Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=5.5A; Tj=150C Min Typ Max 0.7 Unit V STATUS PIN Symbol VSTAT ILSTAT CSTAT VSCL Parameter Status Low Output Voltage Status Leakage Current Status Pin Input Capacitance Status Clamp Voltage Test Conditions ISTAT =1.6mA Normal Operation VSTAT=5V Normal Operation VSTAT=5V ISTAT =1mA ISTAT =-1mA 6 6.8 -0.7 Min Typ Max 0.5 10 100 8 Unit V A pF V V PROTECTIONS Symbol TTSD TR Thyst tSDL Ilim Vdemag Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status delay in overload condition Current limitation Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 15 20 30 5.5V OPENLOAD DETECTION Symbol IOL tDOL(on) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions VIN=5V IOUT =0A Min 300 Typ 500 Max 700 250 Unit mA s VOL tDOL(off) VIN=0V 1.5 2.5 3.5 V s 1000 OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT > VOL VIN VIN OVERTEMP STATUS TIMING Tj > TTSD VSTAT VSTAT tDOL(off) tDOL(on) tSDL tSDL 4/22 2 VN920D-B5 / VN920DSO Switching time Waveforms VOUT 90% 80% dVOUT/dt(on) dVOUT/dt(off) 10% t VIN td(on) td(off) t TRUTH TABLE CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L 5/22 VN920D-B5 / VN920DSO ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2 I C C C C C C IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. 6/22 VN920D-B5 / VN920DSO Figure 1: Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VCC VUSD INPUT LOAD VOLTAGE STATUS undefined VUSDhyst OVERVOLTAGE VCC OPEN LOAD without external pull-up INPUT LOAD VOLTAGE STATUS Tj INPUT LOAD CURRENT STATUS TTSD TR OVERTEMPERATURE 7/22 VN920D-B5 / VN920DSO APPLICATION SCHEMATIC +5V +5V Rprot STATUS VCC Dld C Rprot INPUT OUTPUT GND VGND RGND DGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. C I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k. 8/22 1 VN920D-B5 / VN920DSO Off State Output Current IL(off1) (uA) 9 8 7 6 5 2.5 4 2 3 2 1 0 -50 -25 0 25 50 75 100 125 150 175 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 High Level Input Current Iih (uA) 5 4.5 Vin=3.25V 4 3.5 3 Tc (C) Tc (C) Input Clamp Voltage Vicl (V) 8 7.8 Input High Level Vih (V) 3.6 3.4 3.2 Iin=1mA 7.6 7.4 7.2 7 6.8 6.6 3 2.8 2.6 2.4 6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 2.2 2 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Input Low Level Vil (V) 2.6 2.4 2.2 Input Hysteresis Voltage Vhyst (V) 1.5 1.4 1.3 1.2 2 1.8 1.6 1.4 1.1 1 0.9 0.8 0.7 1.2 1 -50 -25 0 25 50 75 100 125 150 175 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) 9/22 1 VN920D-B5 / VN920DSO Overvoltage Shutdown Vov (V) 50 48 46 44 42 40 38 36 34 32 30 -50 -25 0 25 50 75 100 125 150 175 ILIM Vs. Tcase Ilim (A) 100 90 Vcc=13V 80 70 60 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Turn-on Voltage Slope dVout/dt(on) (V/ms) 700 650 600 550 500 450 400 350 Turn-off Voltage Slope dVout/dt(off) (V/ms) 550 500 Vcc=13V Rl=1.3Ohm 450 400 350 300 250 200 150 100 Vcc=13V Rl=1.3Ohm 300 250 -50 -25 0 25 50 75 100 125 150 175 50 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) On State Resistance Vs. Tcase Ron (mOhm) 50 45 40 35 30 25 20 15 10 5 0 -50 -25 0 25 50 75 100 125 150 175 On State Resistance Vs. VCC Ron (mOhm) 50 45 Iout=10A Vcc=8V; 36V Iout=10A 40 35 30 25 20 15 10 5 0 5 10 15 20 25 30 35 40 Tc=150C Tc=25C Tc= -40C Tc (C) Vcc (V) 10/22 VN920D-B5 / VN920DSO Status Leakage Current Ilstat(A) 0.05 0.045 Status Clamp Voltage Vscl (V) 8 7.8 Vstat=5V 0.04 0.035 0.03 0.025 0.02 0.015 0.01 0.005 0 -50 -25 0 25 50 75 100 125 150 175 7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 -50 Istat=1mA -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Status Low Output Voltage Vstat (V) 0.8 0.7 Istat=1.6mA 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 11/22 VN920D-B5 / VN920DSO P2PAK Maximum turn off current versus load inductance ILMAX (A) 100 A B C 10 1 0.01 0.1 1 L(mH) A = Single Pulse at TJstart=150C B= Repetitive pulse at T Jstart=100C C= Repetitive Pulse at T Jstart=125C Conditions: VCC=13.5V Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization 10 100 t 12/22 VN920D-B5 / VN920DSO SO-16L Maximum turn off current versus load inductance ILMAX (A) 100 A B 10 C 1 0.01 0.1 1 L(mH) 10 100 A = Single Pulse at TJstart=150C B= Repetitive pulse at T Jstart=100C C= Repetitive Pulse at T Jstart=125C Conditions: VCC=13.5V Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 13/22 VN920D-B5 / VN920DSO P2PAK THERMAL DATA P2PAK PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.97cm2, 8cm2). Rthj-amb Vs. PCB copper area in open box free air condition RTHj_amb (C/W) 55 Tj-Tamb=50C 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 14/22 VN920D-B5 / VN920DSO SO-16L THERMAL DATA SO-16L PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 41mm x 48mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.5cm2, 6cm2). Rthj-amb Vs. PCB copper area in open box free air condition 70 65 60 55 50 45 40 RTH j-amb (C/W) 0 1 2 3 4 5 6 7 PCB Cu heatsink area (cm^2) 15/22 VN920D-B5 / VN920DSO SO-16L Thermal Impedance Junction Ambient Single Pulse ZTH (C/W) 100 Footprint 6 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Thermal fitting model of a single channel HSD in SO-16L Pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Footprint 0.02 0.1 2.2 12 15 35 0.0015 7.00E-03 1.50E-02 0.14 1 5 6 Thermal Parameter Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd 20 T_amb 8 16/22 VN920D-B5 / VN920DSO P2PAK Thermal Impedance Junction Ambient Single Pulse ZT H (C/W) 1000 100 Footprint 6 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000 Thermal fitting model of a single channel HSD in P 2PAK Pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Footprint 0.02 0.1 0.22 4 9 37 0.0015 0.007 0.015 0.4 2 3 6 Thermal Parameter Area/island (cm2) R1 (C/W) R2 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd 22 T_amb 5 17/22 VN920D-B5 / VN920DSO P2PAK MECHANICAL DATA DIM. A A1 A2 b c c2 D D2 E E1 e e1 L L2 L3 L5 R V2 Package Weight 0 1.40 Gr (typ) 3.20 6.60 13.70 1.25 0.90 1.55 0.40 8 10.00 8.50 3.60 7.00 14.50 1.40 1.70 2.40 mm. MIN. 4.30 2.40 0.03 0.80 0.45 1.17 8.95 8.00 10.40 TYP MAX. 4.80 2.80 0.23 1.05 0.60 1.37 9.35 P010R 18/22 VN920D-B5 / VN920DSO SO-16L MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F L M S 7.4 0.5 10.1 10.0 1.27 8.89 7.6 1.27 0.75 8 (max.) 0.291 0.020 10.5 10.65 0.35 0.23 0.5 45 (typ.) 0.397 0.393 0.050 0.350 0.300 0.050 0.029 0.413 0.419 0.1 mm. MIN. TYP MAX. 2.65 0.2 2.45 0.49 0.32 0.014 0.009 0.020 0.004 MIN. inch TYP. MAX. 0.104 0.008 0.096 0.019 0.012 19/22 1 1 VN920D-B5 / VN920DSO P2PAK SUGGESTED PAD LAYOUT P2PAK TUBE SHIPMENT (no suffix) B 9.4 16.15 4.6 C Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. 50 1000 532 18 33.1 1 0.6 10.8 1.1 All dimensions are in mm. 7.9 A TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 16 1.5 1.5 11.5 6.5 2 End All dimensions are in mm. Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components 20/22 1 VN920D-B5 / VN920DSO SO-16L TUBE SHIPMENT (no suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. A C B 50 1000 532 3.5 13.8 0.6 TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 16.4 60 22.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 12 1.5 1.5 7.5 6.5 2 End All dimensions are in mm. Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components 21/22 1 VN920D-B5 / VN920DSO Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. 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