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0.58 CMOS, 2.3 V to 5.5 V, Quad SPDT/2:1 Mux in Mini LFCSP ADG858
FEATURES
0.58 typical on resistance 0.82 maximum on resistance at 85C 2.3 V to 5.5 V single supply High current carrying capability: 250 mA continuous Rail-to-rail switching operation Fast-switching times: <20 ns Typical power consumption: <0.1 W 2.1 mm x 2.1 mm mini LFCSP
FUNCTIONAL BLOCK DIAGRAM
ADG858
S1A D1 S1B S2A D2 S2B IN1 S3A D3 S3B S4A D4 S4B IN2 SWITCHES SHOWN FOR A LOGIC 1 INPUT
07090-001
APPLICATIONS
Cellular phones PDAs MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communication systems
Figure 1.
GENERAL DESCRIPTION
The ADG858 is a low voltage CMOS device containing four single-pole, double-throw (SPDT) switches. This device offers ultralow on resistance of less than 0.82 over the full temperature range. The ADG858 is fully specified for 4.2 V to 5.5 V and 2.7 V to 3.6 V supply operation. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The ADG858 exhibits break-before-make switching action. The ADG858 is available in a 2.1 mm x 2.1 mm, 16-lead mini LFCSP. This tiny package makes the part ideal for spaceconstrained applications, such as handsets, PDAs, and MP3s.
PRODUCT HIGHLIGHTS
1. 2. 3. 4. 5. 6. <0.82 over the full temperature range of -40C to +85C. Single 2.3 V to 5.5 V operation. Compatible with 1.8 V CMOS logic. High current handling capability (250 mA continuous current per channel). Low THD + N: 0.06% typical. 2.1 mm x 2.1 mm, 16-lead mini LFCSP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved.
ADG858 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution...................................................................................5 Pin Configuration and Function Descriptions..............................6 Typical Performance Characteristics ..............................................7 Test Circuits ..................................................................................... 10 Terminology .................................................................................... 12 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13
REVISION HISTORY
8/08--Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADG858 SPECIFICATIONS
VDD = 4.2 V to 5.5 V, GND = 0 V, unless otherwise noted. Table 1.
Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, RON On-Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk +25C -40C to +85C 0 to VDD 0.58 0.72 0.04 0.12 0.26 10 10 2.0 0.8 0.004 0.05 2 20 27 8 12 14 45 -67 -85 -67 Total Harmonic Distortion, THD + N Insertion Loss -3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD 0.06 -0.05 70 25 75 0.003 1
1
Unit V typ max typ max typ max pA typ pA typ V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ % dB typ MHz typ pF typ pF typ A typ A max
Test Conditions/Comments
VDD = 4.2 V, VS = 0 V to VDD, IS = 100 mA, see Figure 16 VDD = 4.2 V, VS = 2 V, IS = 100 mA VDD = 4.2 V, VS = 0 V to VDD IS = 100 mA VDD = 5.5 V VS = 0.6 V/4.2 V, VD = 4.2 V/0.6 V, see Figure 17 VS = VD = 0.6 V or 4.2 V, see Figure 18
0.82 0.14
VIN = VGND or VDD
36 13 9
RL = 50 , CL = 35 pF VS = 3 V/0 V, see Figure 19 RL = 50 , CL = 35 pF VS = 3 V, see Figure 19 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V, see Figure 20 VS = 1.5 V, RS = 0 , CL = 1 nF, see Figure 21 RL = 50 , CL = 5 pF, f = 100 kHz, see Figure 22 S1A to S2A/S1B to S2B/S3A to S4A/S3B to S4B, RL = 50 , CL = 5 pF, f = 100 kHz, see Figure 25 S1A to S1B/S2A to S2B/S3A to S3B/S4A to S4B, RL = 50 , CL = 5 pF, f = 100 kHz, see Figure 24 RL = 32 , f = 20 Hz to 20 kHz, VS = 2 V p-p RL = 50 , CL = 5 pF, see Figure 23 RL = 50 , CL = 5 pF, see Figure 23
VDD = 5.5 V Digital inputs = 0 V or 5.5 V
Guaranteed by design, not subject to production test.
Rev. 0 | Page 3 of 16
ADG858
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Table 2.
Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON +25C -40C to +85C 0 to VDD 1.5 0.15 On-Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage IS (Off ) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk 0.35 0.79 10 10 1.35 0.8 0.004 0.05 2 30 50 9 14 25 35 -67 -85 -67 Total Harmonic Distortion, THD + N Insertion Loss -3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD 0.1 -0.06 70 25 75 0.003 1
1
Unit V typ max typ max typ max pA typ pA typ V min V max
Test Conditions/Comments
1 1.35 On-Resistance Match Between Channels, RON 0.05
VDD = 2.7 V, VS = 0 V to VDD, IS = 100 mA, see Figure 16 VDD = 2.7 V, VS = 0.7 V, IS = 100 mA VDD = 2.7 V, VS = 0 V to VDD, IS = 100 mA VDD = 3.6 V VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V, see Figure 17 VS = VD = 0.6 V or 3.3 V, see Figure 18
A typ VIN = VGND or VDD A max pF typ RL = 50 , CL = 35 pF VS = 1.5 V/0 V, see Figure 19 RL = 50 , CL = 35 pF VS = 1.5 V, see Figure 19 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V, see Figure 20 VS = 1.5 V, RS = 0 , CL = 1 nF, see Figure 21 RL = 50 , CL = 5 pF, f = 100 kHz, see Figure 22 S1A to S2A/S1B to S2B/S3A to S4A/S3B to S4B, RL = 50 , CL = 5 pF, f = 100 kHz, see Figure 25 dB typ S1A to S1B/S2A to S2B/S3A to S3B/S4A to S4B, RL = 50 , CL = 5 pF, f = 100 kHz, see Figure 24 % RL = 32 , f = 20 Hz to 20 kHz, VS = 1.5 V p-p dB typ RL = 50 , CL = 5 pF, see Figure 23 MHz typ RL = 50 , CL = 5 pF, see Figure 23 pF typ pF typ VDD = 3.6 V A typ Digital inputs = 0 V or 3.6 V A max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ
59 15 11
Guaranteed by design, not subject to production test.
Rev. 0 | Page 4 of 16
ADG858 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 3.
Parameter VDD to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D Operating Temperature Range Storage Temperature Range Junction Temperature 16-Lead Mini LFCSP JA Thermal Impedance, 3-Layer Board Reflow Soldering, Pb-Free Peak Temperature Time at Peak Temperature
1
Rating -0.3 V to +6 V -0.3 V to VDD + 0.3 V -0.3 V to VDD or 10 mA, whichever occurs first 500 mA (pulsed at 1 ms, 10% duty cycle max) 250 mA -40C to +85C -65C to +150C 150C 84.9C/W 260(+0/-5)C 10 sec to 40 sec
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating can be applied at any one time.
ESD CAUTION
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given.
Rev. 0 | Page 5 of 16
ADG858 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
15 VDD 16 IN1 14 IN2
13 S4B 12 D4 11 S4A 10 S3B 9 D3
07090-002
S1A 1 D1 2 S1B 3 S2A 4 D2 5
ADG858
TOP VIEW (Not to Scale)
S2B 6
GND 7
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 1, 3, 4, 6, 8, 10, 11, 13 2, 5, 9, 12 7 14, 16 15 Mnemonic S1A, S1B, S2A, S2B, S3A, S3B, S4A, S4B D1, D2, D3, D4 GND IN1, IN2 VDD Description Source Terminal. Can be an input or output. Drain Terminal. Can be an input or output. Ground (0 V) Reference. Logic Control Input. Most Positive Power Supply Potential.
Table 5. ADG858 Truth Table
Logic (IN1/IN2) 0 1 Switch A (S1A/S2A/S3A/S4A) Off On Switch B (S1B/S2B/S3B/S4B) On Off
Rev. 0 | Page 6 of 16
S3A 8
ADG858 TYPICAL PERFORMANCE CHARACTERISTICS
0.6 TA = 25C 0.8 0.7 0.6 VDD = 3.3V 0.5
ON RESISTANCE ()
0.4
ON RESISTANCE ()
0.5 0.4 0.3 0.2 TA = +85C TA = +25C TA = -40C
07090-006
0.3 VDD VDD VDD VDD = 4.2V = 4.5V = 5.0V = 5.5V
0.2
0.1
07090-003
0.1 0
0
0
1
2
3 VD, VS (V)
4
5
6
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VD, VS (V)
Figure 3. On Resistance vs. VD (VS), VDD = 4.2 V to 5.5 V
1.0 0.9 0.8 TA = 25C
Figure 6. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V
7 6 5 4 3 2 1 0
07090-007
ON RESISTANCE ()
0.7 0.6 0.5 0.4 0.3 0.2
07090-004
VDD VDD VDD VDD
= 2.7V = 3.0V = 3.3V = 3.6V
LEAKAGE CURRENT (nA)
IS (OFF)+- IS (OFF)-+ ID,IS (ON)++ ID,IS (ON)--
0.1 0 0 0.5 1.0 1.5 2.0 VD, VS (V) 2.5 3.0 3.5
-1 -2 0 25 50 75 100
4.0
125
TEMPERATURE (C)
Figure 4. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V
0.6
7
Figure 7. Leakage Current vs. Temperature, VDD = 5 V
VDD = 5V
6
0.5
0.4
LEAKAGE CURRENT (nA)
5 4 3 2 1
IS (OFF)+- IS (OFF)-+ ID,IS (ON)++ ID,IS (ON)- -
ON RESISTANCE ()
0.3 TA = +85C TA = +25C TA = -40C
0.2
07090-005
0
0
1
2
3 VD, VS (V)
4
5
6
-1
0
25
50
75
100
125
TEMPERATURE (C)
Figure 5. On Resistance vs. VD (VS) for Different Temperatures, VDD = 5 V
Figure 8. Leakage Current vs. Temperature, VDD = 3.3 V
Rev. 0 | Page 7 of 16
07090-008
0.1
0
ADG858
160 140 CHARGE INJECTION (pC) 120
INSERTION LOSS (dB)
TA = 25C
0 -2 -4 -6 -8 -10 -12 -14 -16 -18
07090-009
TA = 25C VDD = 5V, 3.3V
100 80 60 40 20 0 VDD = 3V VDD = 5V
-20 -22 0.1 1 10 FREQUENCY (MHz) 100 1k
07090-011 07090-012
0
1
2
3
4
5
6
SOURCE VOLTAGE (V)
Figure 9. Charge Injection vs. Source Voltage
40 35 30 25
Figure 11. Bandwidth
0 -10 -20
TA = 25C VDD = 5V, 3.3V
tON (3.3V)
ATTENUATION (dB)
-30 -40 -50 -60 -70
TIME (ns)
20
tON (5V)
15 10 5 0 -60
tOFF (5V)
07090-010
tOFF (3.3V)
-40 -20 0 20 40 60 80
-80 -90 0.1 1 10 FREQUENCY (MHz) 100 1k
100
TEMPERATURE (C)
Figure 10. tON/tOFF Times vs. Temperature
Figure 12. Off Isolation vs. Frequency
Rev. 0 | Page 8 of 16
ADG858
0 -10 -20 -30
CROSSTALK (dB) S1A TO S2A TA = 25C VDD = 5V, 3.3V S1A TO S1B
0
TA = 25C VDD = 5V, 3.3V
-20
-40
PSSR (dB)
-40 -50 -60 -70 -80 -90
07090-013
-60
-80
-100
-100 0.1
1
10 FREQUENCY (MHz)
100
1k
-120 100
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
1G
Figure 13. Crosstalk vs. Frequency
0.14 0.12
VDD = 3.6V
Figure 15. PSSR vs. Frequency
0.10
THD + N (%)
0.08 0.06 0.04 0.02 0 100
07090-014
VDD = 5V
1k 10k FREQUENCY (Hz)
100k
Figure 14. Total Harmonic Distortion + Noise (THD + N) vs. Frequency
Rev. 0 | Page 9 of 16
07090-015
ADG858 TEST CIRCUITS
IDS V1
S
D
NC S D ID (ON) VD
07090-021
VS
RON = V1/IDS
Figure 16. On Resistance
IS (OFF) A VS ID (OFF) A VD
07090-020
07090-019
A
Figure 18. On Leakage
S
D
Figure 17. Off Leakage
VDD 0.1F
VDD VS S1B S1A D RL 50 GND VOUT CL 35pF VOUT 90% 90%
07090-022
VIN
50%
50%
IN
tON
tOFF
Figure 19. Switching Times, tON, tOFF
0.1F VDD
VDD VS S1B S1A D RL IN GND 50 VOUT CL 35pF
VIN VOUT
0V
50%
50%
80%
80%
tBBM
tBBM
07090-023
Figure 20. Break-Before-Make Time Delay, tBBM
VDD SW ON S1B S1A IN GND 1nF VOUT VOUT
07090-024
SW OFF
VIN NC VOUT
VS
D
QINJ = CL x VOUT
Figure 21. Charge Injection
Rev. 0 | Page 10 of 16
ADG858
VDD 0.1F NETWORK ANALYZER 50 VS VOUT
VDD 0.1F NETWORK ANALYZER VOUT S1A RL 50 50 VS GND D
VDD
VDD
NC
S1B D
S1A
50
S1B
RL 50
GND
RL 50
OFF ISOLATION = 20 log
VS
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
VOUT VS
Figure 22. Off Isolation
VDD
Figure 24. Channel-to-Channel Crosstalk (S1A to S1B)
0.1F
VDD
NETWORK ANALYZER 50 VS VOUT
NETWORK ANALYZER VOUT 50 S2A S2B S1A S1B D1 NC 50 D2 NC
S1B
S1A D
50 VS
GND
RL 50
07090-027
VOUT
07090-025
INSERTION LOSS = 20 log
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Figure 23. Bandwidth
07090-026
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
VOUT VS
Figure 25. Channel-to-Channel Crosstalk (S1A to S2A)
Rev. 0 | Page 11 of 16
07090-028
ADG858 TERMINOLOGY
IDD Positive supply current. VD (VS) Analog voltage on Terminal D and Terminal S. RON Ohmic resistance between Terminal D and Terminal S. RFLAT (ON) The difference between the maximum and minimum values of on resistance as measured on the switch. RON On resistance match between any two channels. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. CD (Off) Off switch drain capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. tON Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches when switching from one to another. Charge Injection Measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. Off Isolation Measure of unwanted signal coupling through an off switch. Crosstalk Measure of unwanted signal that is coupled from one channel to another because of parasitic capacitance. -3 dB Bandwidth Frequency at which the output is attenuated by 3 dB. On Response Frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N Ratio of the harmonics amplitude plus noise of a signal to the fundamental.
Rev. 0 | Page 12 of 16
ADG858 OUTLINE DIMENSIONS
0.20 DIA TYP 2.10 SQ 0.35 0.30 0.25
13 1
PIN 1 IDENTIFIER
0.40 BSC 0.60 0.55 0.50 TOP VIEW 0.05 MAX 0.02 NOM 0.25 0.20 0.15
9
5
0.55 0.40 0.30
BOTTOM VIEW
Figure 26. 16-Lead Lead Frame Chip Scale Package [LFCSP_UQ] 2.10 mm x 2.10 mm Body, Ultra Thin Quad (CP-16-15) Dimensions shown in millimeters
ORDERING GUIDE
Model ADG858BCPZ-REEL 1 ADG858BCPZ-REEL71
1
Temperature Range -40C to +85C -40C to +85C
Package Description 16-Lead Lead Frame Chip Scale Package [LFCSP_UQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_UQ]
032807-A
SEATING PLANE
Package Option CP-16-15 CP-16-15
Branding 11 11
Z = RoHS Compliant Part.
Rev. 0 | Page 13 of 16
ADG858 NOTES
Rev. 0 | Page 14 of 16
ADG858 NOTES
Rev. 0 | Page 15 of 16
ADG858 NOTES
(c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07090-0-8/08(0)
Rev. 0 | Page 16 of 16

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