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| HAT2218R Silicon N Channel Power MOS FET with Schottky Barrier Diode High Speed Power Switching REJ03G0396-0300 Rev.3.00 Aug.23.2004 Features * * * * Low on-resistance Capable of 4.5 V gate drive High density mounting Built-in Schottky Barrier Diode Outline SOP-8 78 D1 D1 56 S1/D2 S1/D2 8 2 G1 4 G2 5 76 3 12 4 S1/D2(kelvin) 1 S2 3 MOS1 MOS2 and Schottky Barrier Diode Absolute Maximum Ratings (Ta = 25C) Ratings Item Drain to source voltage Gate to source voltage Drain current Drain peak current Reverse drain current Symbol VDSS VGSS ID ID(pulse)Note1 IDR MOS1 30 20 7.5 60 7.5 MOS2 & SBD 30 12 8.0 64 8.0 Unit V V A A A W Channel dissipation Pch Note2 1.5 1.5 Channel temperature Tch 150 150 Storage temperature Tstg -55 to +150 -55 to +150 Notes: 1. PW 10 s, duty cycle 1 % 2. 1 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s C C Rev.3.00, Aug.23.2004, page 1 of 9 HAT2218R Electrical Characteristics * MOS1 (Ta = 25C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Notes: 3. Pulse test Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 30 -- -- 1.0 -- -- 9 -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- 19 27 15 630 155 57 4.6 2.2 1.2 7 14 36 3.4 0.85 17 Max -- 0.1 1 2.5 24 40 -- -- -- -- -- -- -- -- -- -- -- 1.11 -- Unit V A A V m m S pF pF pF nC nC nC ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = 20 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, I D = 1 mA ID = 3.75 A, VGS = 10 V Note3 ID = 3.75 A, VGS = 4.5 V Note3 ID = 3.75 A, VDS = 10 V Note3 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 7.5 A VGS =10 V, ID = 3.75 A VDD 10 V RL = 2.66 Rg = 4.7 IF = 7.5 A, VGS = 0 Note3 IF =7.5 A, VGS = 0 diF/ dt = 100 A/s * MOS2 & Schottky Barrier Diode (Ta = 25C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Schottky Barrier diode forward voltage Body-drain diode reverse recovery time Notes: 3. Pulse test Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VF trr Min 30 -- -- 1.4 -- -- 15 -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- 17 21 25 1330 230 92 11 3.8 3.2 10 16 43 3.9 0.5 15 Max -- 0.1 1 2.5 22 29 -- -- -- -- -- -- -- -- -- -- -- -- -- Unit V A mA V m m S pF pF pF nC nC nC ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = 12 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, I D =1 mA ID =4 A, VGS = 10 V Note3 ID = 4 A, VGS = 4.5 V Note3 ID = 4 A, VDS = 10 V Note3 VDS = 10 V VGS = 0 f = 1MHz VDD = 10 V VGS = 4.5 V ID = 8 A VGS = 10 V, ID = 4 A VDD 10 V RL = 2.5 Rg = 4.7 IF = 3.5 A, VGS = 0 Note3 IF = 8 A, VGS = 0 diF/ dt = 100 A/s Rev.3.00, Aug.23.2004, page 2 of 9 HAT2218R Main Characteristics * MOS1 Power vs. Temperature Derating 4.0 Pch (W) 1000 Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s Maximum Safe Operation Area ID (A) 3.0 100 10 DC Op era 1 m 100 s s 10 s PW Channel Dissipation Drain Current 2.0 =1 0m 1 s( No tio 1s 1.0 Operation in this area is 0.1 limited by RDS(on) Ta = 25C n( ho PW t) 1 t 0 se 4 ) 0 50 100 150 Ta (C) 200 0.01 1 shot Pulse 0.1 1 10 100 Ambient Temperature Drain to Source Voltage VDS (V) Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics 20 4.5 V 10 V ID (A) Typical Transfer Characteristics 20 VDS = 10 V Pulse Test ID (A) Drain Current 3.6 V Drain Current 10 3.2 V 10 VGS = 2.8 V Pulse Test 0 5 Drain to Source Voltage VDS 10 (V) 0 Tc = 75C 25C -25C 2 4 6 Gate to Source Voltage 8 VGS 10 (V) Drain to Source Voltage VDS(on) (mV) 200 Pulse Test 150 Static Drain to Source on State Resistance RDS(on) (m) Drain to Source Saturation Voltage vs Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 100 VGS = 4.5 V 10 V 10 100 ID = 5 A 50 2A 1A 0 12 4 8 Gate to Source Voltage 16 20 VGS (V) 1 0.1 Pulse Test 1 Drain Current 10 ID (A) 100 Rev.3.00, Aug.23.2004, page 3 of 9 HAT2218R Static Drain to Source on State Resistance vs. Temperature 50 5A Pulse Test ID = 1 A, 2 A 40 VGS = 4.5 V Forward Transfer Admittance vs. Drain Current Static Drain to Source on State Resistance RDS(on) (m) Forward Transfer Admittance |yfs| (S) 100 50 20 10 5 Tc = -25C 30 25C 2 1 0.5 0.2 0.1 0.1 0.2 0.5 1 2 VDS = 10 V Pulse Test 5 10 20 ID (A) 50 100 75C 20 10 V 10 0 -25 1 A, 2 A, 5 A 0 25 50 75 100 125 150 Case Temperature Tc (C) Drain Current Reverse Recovery Time trr (ns) 100 50 Body-Drain Diode Reverse Recovery Time 10000 5000 Typical Capacitance vs. Drain to Source Voltage VGS = 0 f = 1 MHz Capacitance C (pF) 2000 1000 500 200 100 50 20 10 20 10 5 di / dt = 100 A / s VGS = 0, Ta = 25C 0.3 1 3 10 30 100 Reverse Drain Current IDR (A) Dynamic Input Characteristics Ciss Coss Crss 2 1 0.1 0 5 10 15 20 25 30 Drain to Source Voltage VDS (V) Switching Characteristics VDS (V) 50 (V) ID = 7.5 A VDD = 25 V 10 V 5V VGS VDS 20 100 50 Switching Time t (ns) td(off) tr Drain to Source Voltage VGS 40 16 30 12 Gate to Source Voltage 20 10 td(on) 5 tf 2 VGS = 10 V, VDD = 10 V Rg =4.7 , duty 1 % 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 20 8 10 VDD = 25 V 10 V 5V 4 8 12 16 Gate Charge Qg (nC) 4 0 20 0 50 100 Rev.3.00, Aug.23.2004, page 4 of 9 HAT2218R Reverse Drain Current vs. Source to Drain Voltage 20 Reverse Drain Current IDR (A) 10 V 5V 10 VGS = 0V, -5 V Pulse Test 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance s (t) 10 1 D=1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 ch - f(t) = s (t) x ch - f ch - f = 125C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.01 1s 0.001 10 t ho pu lse PDM PW T D= PW T 100 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Rev.3.00, Aug.23.2004, page 5 of 9 HAT2218R * MOS2 & Schottky Barrier Diode Power vs. Temperature Derating 4.0 Pch (W) 1000 Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s Maximum Safe Operation Area ID (A) 3.0 100 10 DC Op era 1m 10 0 s 10 s s Channel Dissipation Drain Current PW 2.0 =1 0m 1 tio s( 1s 1.0 Operation in this area is 0.1 limited by RDS(on) Ta = 25C 0.01 1 shot Pulse n( ho PW t) 1Note 0s 4 ) 0 50 100 150 Ta (C) 200 0.1 1 10 100 Ambient Temperature Drain to Source Voltage VDS (V) Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Transfer Characteristics 20 VDS = 10 V Pulse Test ID (A) Drain Current Typical Output Characteristics 20 4.5 V 10 V ID (A) Pulse Test 3.0 V 2.8 V 10 2.6 V VGS = 2.4 V 0 5 Drain to Source Voltage VDS 10 (V) Drain Current 10 Tc = 75C 25C -25C 0 2 4 6 Gate to Source Voltage 8 VGS 10 (V) Drain to Source Voltage VDS(on) (mV) 200 Pulse Test 150 Static Drain to Source on State Resistance RDS(on) (m) Drain to Source Saturation Voltage vs Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test VGS = 4.5 V 10 V 100 ID = 5 A 10 50 2A 1A 6 2 4 8 10 12 Gate to Source Voltage VGS (V) 0 1 0.1 1 Drain Current 10 ID (A) 100 Rev.3.00, Aug.23.2004, page 6 of 9 HAT2218R Static Drain to Source on State Resistance vs. Temperature 50 Pulse Test 40 ID = 1 A, 2 A 30 VGS = 4.5 V 20 1 A, 2 A, 5 A 10 0 -25 10 V 5A Forward Transfer Admittance vs. Drain Current Tc = -25C Static Drain to Source on State Resistance RDS(on) (m) Forward Transfer Admittance |yfs| (S) 100 50 20 10 5 2 1 0.5 0.2 25C 75C 0 25 50 75 100 125 150 Case Temperature Tc (C) 0.1 0.1 0.2 0.5 1 VDS = 10 V Pulse Test 2 5 10 20 ID (A) 50 100 Drain Current Reverse Recovery Time trr (ns) 100 50 Body-Drain Diode Reverse Recovery Time 10000 5000 Typical Capacitance vs. Drain to Source Voltage VGS = 0 f = 1 MHz Ciss Capacitance C (pF) 2000 1000 500 200 100 50 20 10 20 10 5 di / dt = 100 A / s VGS = 0, Ta = 25C 0.3 1 3 10 30 100 Reverse Drain Current IDR (A) Dynamic Input Characteristics Coss Crss 2 1 0.1 0 5 10 15 20 25 30 Drain to Source Voltage VDS (V) Switching Characteristics VDS (V) 50 (V) ID = 8 A 10 100 50 Switching Time t (ns) td(off) tr Drain to Source Voltage 30 VDS VGS 6 4 Gate to Source Voltage VDD = 25 V 10 V 5V VGS 40 8 20 10 5 tf 2 VGS = 10 V, VDD = 10 V Rg =4.7 , duty 1 % td(on) 20 VDD = 25 V 10 V 5V 4 8 12 16 10 2 0 20 0 Gate Charge Qg (nC) 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 50 100 Rev.3.00, Aug.23.2004, page 7 of 9 HAT2218R Reverse Drain Current vs. Source to Drain Voltage 20 Reverse Drain Current IDR (A) 10 V VGS = 0V, -5 V 5V 10 Pulse Test 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance s (t) 10 1 D=1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 ch - f(t) = s (t) x ch - f ch - f = 125C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.01 1s 0.001 10 h p ot uls e PDM PW T D= PW T 100 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) * Common Switching Time Test Circuit Vin Monitor Rg D.U.T. RL Vin Vin 10 V V DS = 10 V Vout 10% 10% 90% td(on) tr 90% td(off) tf 10% Vout Monitor Switching Time Waveform 90% Rev.3.00, Aug.23.2004, page 8 of 9 HAT2218R Package Dimensions As of January, 2003 Unit: mm 4.90 5.3 Max 5 8 1 4 3.95 *0.22 0.03 0.20 0.03 1.75 Max 0.75 Max 6.10 - 0.30 + 0.10 1.08 0 - 8 + 0.67 0.14 - 0.04 + 0.11 1.27 0.60 - 0.20 *0.42 0.08 0.40 0.06 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms -- 0.085 g Ordering Information Part Name HAT2218R-EL-E Quantity 2500 pcs Taping Shipping Container Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00, Aug.23.2004, page 9 of 9 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. 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