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BUK9609-75A N-channel TrenchMOS logic level FET Rev. 03 -- 22 September 2008 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Low conduction losses due to low on-state resistance Q101 compliant Suitable for logic level gate drive sources Suitable for thermally demanding environments due to 175 C rating 1.3 Applications 12 V, 24 V and 42 V loads Automotive and general purpose power switching Motors, lamps and solenoids 1.4 Quick reference data Table 1. VDS ID Ptot Quick reference Conditions VGS = 5 V; Tj = 25 C; see Figure 3; see Figure 1 Tmb = 25 C; see Figure 2 Min Typ Max 75 75 230 Unit V A W drain-source voltage Tj 25 C; Tj 175 C drain current total power dissipation Symbol Parameter Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Static characteristics RDSon drain-source on-state resistance VGS = 4.5 V; ID = 25 A; Tj = 25 C VGS = 5 V; ID = 25 A; Tj = 25 C; see Figure 12; see Figure 15 7.6 9.95 9 m m ID = 75 A; Vsup 75 V; RGS = 50 ; VGS = 5 V; Tj(init) = 25 C; unclamped 562 mJ NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pin 1 2 3 mb Pinning information Symbol G D S D Description gate drain source mounting base; connected to drain 2 1 3 mb D Simplified outline Graphic symbol G mbb076 S SOT404 (D2PAK) 3. Ordering information Table 3. Ordering information Type number Package Name Description BUK9609-75A D2PAK Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) Version SOT404 4. Limiting values Table 4. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj VGSM Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature peak gate-source voltage source current peak source current pulsed; tp 50 s VGS = 5 V; Tj = 100 C; see Figure 1 VGS = 5 V; Tj = 25 C; see Figure 3; see Figure 1 Tmb = 25 C; tp 10 s; pulsed; see Figure 3 Tmb = 25 C; see Figure 2 Conditions Tj 25 C; Tj 175 C RGS = 20 k Min -10 -55 -55 -15 Max 75 75 10 65 75 440 230 175 175 15 Unit V V V A A A W C C V In accordance with the Absolute Maximum Rating System (IEC 60134). Source-drain diode IS ISM EDS(AL)S Tmb = 25 C tp 10 s; pulsed; Tmb = 25 C 75 440 562 A A mJ Avalanche ruggedness non-repetitive ID = 75 A; Vsup 75 V; RGS = 50 ; VGS = 5 V; drain-source avalanche Tj(init) = 25 C; unclamped energy BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 2 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 120 Ider (%) 80 03aa24 120 Pder (%) 80 03na19 40 40 0 0 50 100 150 Tmb (C) 200 0 0 50 100 150 Tmb (C) 200 Fig 1. Normalized continuous drain current as a function of mounting base temperature 1000 ID (A) RDSon = VDS/ ID Fig 2. Normalized total power dissipation as a function of mounting base temperature 03nb44 tp = 10 us 100 100 us 1 ms 10 P = tp T D.C. 10 ms 100 ms tp T t 1 1 10 VDS (V) 100 Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 3 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 5. Thermal characteristics Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ Max 0.65 Unit K/W thermal resistance from see Figure 4 junction to mounting base thermal resistance from minimum footprint; mounted on a junction to ambient printed-circuit board Rth(j-a) - 50 - K/W 1 Zth(j-mb) (K/W) 03nb45 = 0.05 0.2 0.1 0.1 0.05 0.02 0.01 P = tp T Single Shot tp T t 0.001 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 4 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 6. Characteristics Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 0.25 mA; VGS = 0 V; Tj = 25 C ID = 0.25 mA; VGS = 0 V; Tj = -55 C ID = 1 mA; VDS = VGS; Tj = 25 C; see Figure 6 ID = 1 mA; VDS = VGS; Tj = 175 C; see Figure 6 ID = 1 mA; VDS = VGS; Tj = -55 C; see Figure 6 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 75 V; VGS = 0 V; Tj = 175 C VDS = 75 V; VGS = 0 V; Tj = 25 C VDS = 0 V; VGS = 10 V; Tj = 25 C VDS = 0 V; VGS = -10 V; Tj = 25 C VGS = 4.5 V; ID = 25 A; Tj = 25 C VGS = 5 V; ID = 25 A; Tj = 175 C; see Figure 12; see Figure 15 VGS = 10 V; ID = 25 A; Tj = 25 C VGS = 5 V; ID = 25 A; Tj = 25 C; see Figure 12; see Figure 15 Dynamic characteristics Ciss Coss Crss td(on) tr td(off) tf LD input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance from upper edge of drain mounting base to centre of die; Tj = 25 C from drain lead 6 mm from package to centre of die; Tj = 25 C LS internal source inductance source-drain voltage reverse recovery time recovered charge from source lead to source bond pad; Tj = 25 C IS = 25 A; VGS = 0 V; Tj = 25 C; see Figure 13 IS = 20 A; dIS/dt = -100 A/s; VGS = -10 V; VDS = 30 V; Tj = 25 C VDS = 30 V; RL = 1.2 ; VGS = 5 V; RG(ext) = 10 ; Tj = 25 C VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 C; see Figure 14 6631 905 610 47 185 424 226 2.5 4.5 7.5 8840 1090 840 pF pF pF ns ns ns ns nH nH nH Min 75 70 1 0.5 Typ 1.5 0.05 2 2 7.23 7.6 Max 2 2.3 500 10 100 100 9.95 18.9 8.5 9 Unit V V V V V A A nA nA m m m m Static characteristics Source-drain diode VSD trr Qr 0.85 70.3 213 1.2 V ns nC BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 5 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 10-1 ID (A) 10-2 03aa36 2.5 VGS(th) (V) 2 max 03aa33 10-3 min 10-4 typ max 1.5 typ 1 min 10-5 0.5 10-6 0 1 2 VGS (V) 3 0 -60 0 60 120 Tj (C) 180 Fig 5. Sub-threshold drain current as a function of gate-source voltage 400 ID (A) 350 300 250 200 150 100 50 2.2 0 0 2 4 6 8 10 VDS (V) 03nb41 Fig 6. Gate-source threshold voltage as a function of junction temperature 20 RDSon (m) 18 16 14 12 10 8 6 4 2 3 4 5 6 7 8 VGS (V) 03nb40 8 7 10 6 5 VGS (V) = 4 3 Fig 7. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 8. Drain-source on-state resistance as a function of gate-source voltage; typical values BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 6 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 140 gfs (S) 120 100 03nb38 120 ID (A) 100 03nb39 80 80 60 60 40 Tj = 175 OC Tj = 25 OC 20 40 20 0 0 20 40 60 80 ID (A) 100 0 0.0 1.0 2.0 3.0 VGS (V) 4.0 Fig 9. Forward transconductance as a function of drain current; typical values Fig 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values 20 RDSon (m) 03nb42 VGS 5 (V) 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 50 100 VDD= 14 V 03nb37 VGS (V) = 3 3.2 3.4 4 3.6 VDD= 60 V 15 3.8 10 6 5 QG (nC) 150 0 50 100 150 200 250 300 350 ID (A) Fig 11. Gate-source voltage as a function of gate charge; typical values Fig 12. Drain-source on-state resistance as a function of drain current; typical values BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 7 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 120 IS (A) 100 03nb36 16000 C (pF) 14000 12000 03nb43 80 10000 60 O Tj = 175 C 8000 6000 4000 Ciss 40 20 O Tj = 25 C 2000 0 Coss Crss 0.1 1 10 VDS(V) 100 0 0.0 0.2 0.4 0.6 0.8 1.0 VSD (V) 0.01 Fig 13. Reverse diode current as a function of reverse diode voltage; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 03nb25 2.4 a 1.6 0.8 0 -60 0 60 120 Tj (C) 180 Fig 15. Normalized drain-source on-state resistance factor as a function of junction temperature BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 8 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 7. Package outline Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404 A E A1 mounting base D1 D HD 2 Lp 1 3 b c Q e e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.50 4.10 A1 1.40 1.27 b 0.85 0.60 c 0.64 0.46 D max. 11 D1 1.60 1.20 E 10.30 9.70 e 2.54 Lp 2.90 2.10 HD 15.80 14.80 Q 2.60 2.20 OUTLINE VERSION SOT404 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-02-11 06-03-16 Fig 16. Package outline SOT404 (D2PAK) BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 9 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 8. Revision history Table 7. Revision history Release date 20080922 Data sheet status Product data sheet Change notice Supersedes BUK9509_9609_75A-02 Document ID BUK9509-75A_3 Modifications: * * * The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Type number BUK9609-75A separated from data sheet BUK9509_9609_75A-02. Product data sheet Product data sheet BUK9509_9609_75A-01 - BUK9509_9609_75A-02 BUK9509_9609_75A-01 20001106 20001010 BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 10 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 9. Legal information 9.1 Data sheet status Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status [1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.3 Disclaimers General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS -- is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BUK9609-75A_3 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 -- 22 September 2008 11 of 12 NXP Semiconductors BUK9609-75A N-channel TrenchMOS logic level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: Rev. 03 -- 22 September 2008 Document identifier: BUK9609-75A_3 |
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