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RAiO RA8863
Dot Matrix LCD Controller Specification
Version 1.1 April 28, 2005
RAiO Technology Inc.
Copyright RAiO Technology Inc. 2004, 2005
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RA8863
Preliminary Version 1.1 Dot Matrix LCD Controller
1. Overview
The RA8863 is a dot matrix LCD Controller which fully compatible with T6963C. It supports various LCD Driver for standard or custom-made LCD module. The RA8863 built-in a 256Byte CG(Character Generator) ROM that for ASCII, Japanese and numeric display in Text mode. It also supports Graphics mode and mixed display with Text. The supported maximum external display RAM is 64Kbyte and the display Window can be moved freely within the allocated memory range. The RA8863 has an 8-bit parallel data bus that can be directly connected to an 8080 series MCU. The RA8863 supports a very broad range of LCD formats by allowing selection of different combinations via a set and combination text-and-graphic modes, and includes various attribute functions.
2. Features
Support Display Range: Columns 30, 40, 64, 80 Rows 2, 4, 6, 8, 10, 12, 14, 16, 20, 24, 28, 32 Support 8080 8-bit MCU Interface Built-in 256Byte Font ROM: Basic ASCIIB JapaneseB Numeric Support Max. 64Kbyte External Display SRAM Display Mode : CharacterB Graphics and Mixed Mode Font Size : Horizontal 5, 6, 7, 8 Pixels Vertical 8 Pixels Support Bold Font and Reverse Display Support Various LCD Driver Support 1/16 ~1/128 Duty Built-in X'tal Oscillator or Using External Clock Power Supply Range: 3.0~5.5V Package: QFP-67Pin (Lead Free)
3. Block Diagram
A[15:0], D[7:0], FONTSEL MCE, MRW
MDS MD[3:0] 256Byte CGROM Display RAM I/F System Configure FS[1:0] DUAL SDSEL Registers Block Cursor Controller Data Latch TEST[2:1]
MCU I/F
X'tal OSC
Timing Generator
SD[7:0], CE, RD, WE C/D, RST, HALT
X1
X2
CDATA, LP, FR, HSCP, LSCP, ED, HOD, LOD
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RA8863
Preliminary Version 1.1 Dot Matrix LCD Controller
4. Package
DUAL HSCP ED HOD CE1 CE0 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 LP CDATA FR CH1 CH2 DSPON VDD SDSEL GND TEST2 TEST1 X1 X2
55 54 50 45 40 35 33 32 30
RAiO
60
TM
RA8863P2N A/B
05xxN
65 67 1 Date Code(Year 2005) 5 10 15 20 21 22 25
MCE MRW D7 D6 D5 VDD D4 D3 D2 D1 D0
RA8863P2NA : QFP-67 Pin, Non-Lead Package, Font-01 (Refer to Data Sheet Chapter 6-16) RA8863P2NB : QFP-67 Pin, Non-Lead Package, Font-02
5.1 MCU Interface
Pin Name SD[7..0]
RD WR
I/O I/O I I
HALT RST MDS MD0 MD1 MD2 MD3 FS0 FS1 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 WR RD CS C/D
5. Pin Descriptions
Description Data Bus This is bus for data transfer between MCU and RA8863. Read Control
RD is a data read signal. When Low, MCU read data from RA8863. Write Control WR is a data write signal. When Low, MCU write data into RA8863.
Command/Data Select or Register Select This is a Data or Command select signal. C/ D I C/ D High Low
WR = Low RD = Low
Command Write Data Write
Status Read Data Read
CS
I
Chip Select This s chip enable of RA8863. When MCU communicate with RA8863, this pin must be Low.
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RA8863
Preliminary Version 1.1 Dot Matrix LCD Controller
5.2 LCD Driver Interface
Pin Name FR LP CDATA HSCP HOD I/O O O O O O Description Frame Latch Latch pulse for column driver. Shift clock pulse for Row Driver Synchronous Data Synchronous Data for Row Driver. Shift Clock Pulse Shift clock pulse for Column Driver in upper area of LCD. Data Output Data output for Odd Columns in upper area of LCD. Data Output
SDSEL = High area of LCD. SDSEL = Low LCD. Display On
Data output for even columns in both upper and lower Data output for columns in both upper and lower area of
ED
O
DSPON
O
Display On/Off control signal. When HALT or RST is Low, DSPON output Low (LCD Display Off).
5.3 Memory Interface
Pin Name A[15:0] D[7:0]
MCE
I/O O I/O O
Description Address Output for External Memory Data Bus for External Memory Memory Chip Enable
MCE = Low
Memory Enable.
MRW
O
CE0
LOD
O
CE1
LSCP VDD GND
O
MCE = High Memory Disable. Memory Read/Write Control MRW = Low Memory Write Enable. MRW = High Memory Read Enable. Memory Chip Enable 0 If DUAL = High Chip enable pin for display memory in the address range 0000~07FFh. If DUAL = Low Serial data output for odd columns in lower area of LCD. Memory Chip Enable 1 Chip enable pin for display memory in the address If DUAL = High range 0800~0FFFh. If DUAL = Low Shift clock output for Column Driver in lower area of LCD.
P P
Power Ground
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RA8863
Preliminary Version 1.1 Dot Matrix LCD Controller
5.4 Misc. Interface
Pin Name
DUAL
I/O I Scan Select DUAL = Low DUAL = High
Description Dual-Scan Mode. Signal-Scan Mode.
LCD Size Selection One Screen:
DUAL
H L H H 2 16
H L H L 4 32
H L L H 6 48
H L L L 8 64
H H H H 10 80
H H H L 12 96
H H L H 14 112
H H L L 16 128
MDS MD1 MD0 Lines MDS MD[1:0] I V-Dots Two Screens:
DUAL
H L H H 2 16
H L H L 4 32
H L L H 6 48
H L L L 8 64
H H H H 10 80
H H H L 12 96
H H L H 14 112
H H L L 16 128
MDS MD1 MD0 Lines V-Dots X1 X2 I O
Crystal Oscillator Input Crystal Oscillator Output Font Selection
FS[1:0]
I
FS0 FS1 Font Columns Selection
H H 5X8
L H 6X8
H L 7X8
L L 8X8
MD[3:2]
I
MD2 MD3 Columns Data Transfer Mode
H H 30
L H 40
H L 64
L L 80
SDSEL
I
SDSEL = Low SDSEL = High Halt Signal
Sending data by simple serial mode. Sending data by odd/even separtion mode. Stop the Clock. Normal Mode. RA8863 will be reset.
HALT
I
HALT = Low HALT = High Reset Signal RST = Low
RST
I
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RA8863
Preliminary Version 1.1 Dot Matrix LCD Controller
RST = High Normal mode. RA8863 built-in a Pull-Hi resistor. Test Pins These are test pins. No need for connection(NC). Check Signals CGROM Font Select This pin is used to select the character of CGROM. Refer to Chapter 6-16. Please note, this pin is only reserved for die base chip only. Refer to Chapter 7-2. FONTSEL = Low Select CGROM Font 01. FONTSEL = High Select CGROM Font 02.
TEST[2 : 1]
I O
CH1, CH2
FONTSEL
I
6. System Application
SRAM
LCD Driver
MCU
RA8863
LCD Driver
LCD Panel
RA8863
SD0 | SD7 WR RD CE C/D RST FS 8-Bit SD0 | SD7 WR RD CE C/D RST FS1
X-Driver X-Driver X-Driver
4-Bit
8K SRAM
2-Bit
80
Y-Driver
80
80
GND VDD VEE
64
Power Supply
240 x 128 LCD Panel
Y-Driver
64
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