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A8735 Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Features and Benefits
Ultra small 2 x 2 DFN/MLP-8 package Low quiescent current draw (0.5 A max. in shutdown mode) Primary-side output voltage sensing; no resistor divider required Fixed 1 A peak current limit 1V logic (VHI(min)) compatibility Integrated IGBT driver with internal gate resistors Optimized for mobile phone, 1-cell Li+ battery applications Zero-voltage switching for lower loss >75% efficiency Charge complete indication Integrated 50 V DMOS switch with self-clamping protection
Description
The Allegro(R) A8735 is a Xenon photoflash charger IC designed to meet the needs of ultra low power, small form factor cameras, particularly camera phones. By using primary-side voltage sensing, the need for a secondary-side resistive voltage divider is eliminated. This has the additional benefit of reducing leakage currents on the secondary side of the transformer. To extend battery life, the A8735 features very low supply current draw (0.5 A max in shutdown mode). The IGBT driver also has internal gate resistors for minimum external component count. The charge and trigger voltage logic thresholds are set at 1 VHI(min) to support applications implementing low-voltage control logic. The A8735 is available in an 8-contact 2 mm x 2 mm DFN/MLP package with a 0.60 maximum overall package height, and an exposed pad for enhanced thermal performance. It is lead (Pb) free with 100% matte tin leadframe plating.
Package: 8-pin DFN/MLP (suffix EE)
2 mm x 2 mm, 0.60 mm height Not to scale
Typical Applications
Battery Input 2.3 to 5.5 V VBAT VOUT Detect SW VIN_VDRV C2
Control Block
+ C1 COUT
100F 315 V
Battery Input 1.5 to 5.5 V VBAT
+ C1 COUT
100F 315 V
VOUT Detect SW VIN_VDRV
Control Block
ISW sense VPULLUP
C2
ISW sense VPULLUP
CHARGE
DONE DONE VIN_VDRV
100 k
CHARGE
DONE DONE VIN_VDRV
100 k
TRIG
IGBT Driver IGBT Gate GATE
TRIG
IGBT Driver IGBT Gate GATE
GND
GND
(A) Figure 1. Typical applications: (A) with single battery supply and (B) with separate bias supply 8735-DS
(B)
A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Selection Guide
Part Number
A8735EEETR-T
Packing
3000 pieces per reel
Package
8-contact DFN/MLP with exposed thermal pad
Absolute Maximum Ratings
Characteristic Symbol Notes DC voltage. (VSW is self-clamped by internal active clamp and is allowed to exceed 50 V during flyback spike durations. Maximum repetitive energy during flyback spike: 0.5 J at frequency 400 kHz.) DC current, pulse width = 1 ms Care should be taken to limit the current when -0.6 V is applied to these pins. TA TJ(max) Tstg Range E Rating Units
SW Pin
VSW
-0.3 to 50
V
ISW VIN_DRV, VBAT Pins CHARGE, TRIG, Pins DONE Remaining Pins Operating Ambient Temperature Maximum Junction Storage Temperature VIN
3 -0.3 to 6.0 -0.6 to VIN + 0.3 V -0.3 to VIN + 0.3 V -40 to 85 150 -55 to 150
A V V V C C C
THERMAL CHARACTERISTICS may require derating at maximum conditions
Characteristic Package Thermal Resistance Symbol RJA Test Conditions* 4-layer PCB, based on JEDEC standard Value Units 49 C/W
*Additional thermal information available on Allegro Web site.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Functional Block Diagram
VBAT
SW VSW - VBAT DCM Detector toff(max)
18 s S Q Q
Control Logic
DMOS
ILIM Reference VDSref
OCP ton(max)
18 s
H L Triggered Timer
R
Enable
VIN_DRV
S R Q
DONE
Q
CHARGE
VIN_DRV IGBT Driver
TRIG
GATE
GND
Terminal List
Number Name DONE TRIG GATE GND SW VBAT VIN_DRV CHARGE PAD Function Open collector output, pulls low when output reaches target value and CHARGE is high. Goes high during charging or whenever CHARGE is low. IGBT trigger input. IGBT gate drive output. Ground connection. Drain connection of internal DMOS switch. Connect to transformer primary winding. Battery voltage. Input voltage. Connect to 3 to 5.5 V bias supply. Decouple VIN voltage with 0.1 F ceramic capacitor placed close to this pin. Charge enable pin. Set this pin low to shut down the chip. Exposed pad for enhanced thermal dissipation. Connect to ground plane.
Pin-out Diagram
DONE 1 TRIG 2 GATE 3 GND 4 PAD 8 7 6 5 CHARGE VIN_DRV VBAT SW
1 2 3 4 5 6 7 8 -
(Top View)
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
indicates specifications
Min. 1.5 2.3 VIN rising Shutdown (CHARGE = 0 V, TRIG = 0 V) - - - - - - - - 0.9 VIN_DRV = 3.6 V, ID = 600 mA, TA = 25C VSW = 5.5, over full temperature range VCHARGE = VIN High, over input supply range Low, over input supply range Time between CHARGE = 1 and charging enabled - - - 1.0 - - - - Measured as VSW - VBAT Pulse width = 200 ns (90% to 90%) 32 A into pin DONE Measured at SW pin Input = logic high, over input supply range Input = logic low, over input supply range VGATE = 1.8 V VGATE = 1.8 V Measurement taken at pin, DONE CL= 6500 pF 31.0 - Charging complete Charging (CHARGE = VIN, TRIG = 0 V) Shutdown (CHARGE = 0 V, TRIG = 0 V) Typ. - - 2.05 150 0.02 50 2 0.01 - - 1.0 0.4 - 36 - - 20 18 18 31.5 200 Max. 5.5 5.5 2.2 - 0.5 100 - 1 5 50 1.1 - 2 - - 0.4 - - - 32.0 400 1 - - 1 - - - - - - - - - - 20 - - 100 21 27 25 60 290 380 20 100 - - 0.4 - - - - - - - - Unit V V V mV A A mA A A A A A A V V us s s V mV A mV V/s V V k ns ns ns ns k Characteristics Symbol VBAT VIN VINUV VINUV(hys) IIN Test Conditions
ELECTRICAL CHARACTERISTICS Typical values are valid at VIN = VBAT = 3.6 V; TA = 25C, except guaranteed from -40C to 85C ambient, unless otherwise noted
VBAT Voltage Range1
VIN_DRV Voltage Range1 UVLO Enable Threshold UVLO Hysteresis VIN Supply Current
VBAT Pin Supply Current IBAT
Charging done (CHARGE = VIN, = 0 V) DONE Charging (CHARGE = VIN, TRIG = 0 V)
Current Limit Primary-Side Current Limit2 Switch On-Resistance Switch Leakage Current1 CHARGE Input Current CHARGE Input Voltage1 CHARGE On/Off Delay Switch-Off Timeout Switch-On Timeout Output Comparator Trip Voltage3 Output Comparator Voltage Overdrive Output Leakage Current1 DONE Output Low DONE Voltage1 ISWLIM RSWDS(on) ISWLK ICHARGE VCHARGE tCH toff(max) ton(max) VOUTTRIP VOUTOV IDONELK VDONEL dV/dt VTRIG(H) VTRIG(L) RTRIGPD RSrcDS(on) RSnkDS(on) tDr tDf tr tf RGTPD
dV/dt Threshold for ZVS Comparator IGBT Driver TRIG Input Voltage1 TRIG Pull-Down Resistor GATE Resistance to VIN_DRV GATE Resistance to GND Propagation Delay (Rising)4,5 Propagation Delay (Falling)4,5 Output Rise Time4,5 Output Fall Time4,5 GATE Pull-Down Resistor
1Specifications 2Current
throughout the range TA = -40C to 85C guaranteed by design and characterization. limit guaranteed by design and correlation to static test. 3Specifications throughout the range T = -20C to 85C guaranteed by design and characterization. A 4Guaranteed by design and characterization. 5See IGBT Drive Timing Definition diagram for further information.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
IGBT Drive Timing Definition
TRIG
50% 50%
tDr
tr
tDf
tf
90%
90% 10%
GATE
10%
Operation Timing Diagram
VBAT VIN CHARGE SW
Target VOUT UVLO
VOUT DONE
T1 T2 T3
TRIG GATE A B C D E F
Explanation of Events A: Start charging by pulling CHARGE to high, provided that VIN is above UVLO level. B: Charging stops when VOUT reaches the target voltage . C: Start a new charging process with a low-to-high transition at the CHARGE pin. D: Pull CHARGE to low to put the controller in low-power standby mode. E: Charging does not start, because VIN is below UVLO level when CHARGE goes high. F: After VIN goes above UVLO, another low-to-high transition at the CHARGE pin is required to start the charging.
T1, T2, T3 (Trigger instances): IGBT driver output pulled high whenever the TRIG pin is at logic high. It is recommended to avoid applying any trigger pulses during charging.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Characteristic Performance
IGBT Drive Performance
IGBT drive waveforms are measured at pin, with capacitive load of 6800 pF
Rising Signal
VIN
tr
Symbol C1 C2 C3 t Conditions
Parameter VTRIGGER VGATE VIN time Parameter tDr tr CLOAD
Units/Division 1V 1V 1V 100 ns Value 23 ns 320 ns 6.8 nF
C2,C3 VGATE
C1 VTRIGGER t
Falling Signal
tf
VIN
Symbol C1 C2 C3 t Conditions
Parameter VTRIGGER VGATE VIN time Parameter tDr tr CLOAD
Units/Division 1V 1V 1V 100 ns Value 58 ns 402 ns 6.8 nF
VGATE C2,C3
VTRIGGER C1
t
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Characteristic Performance
Charge Time versus Battery Voltage
Transformer LPRIMARY = 12.8 H, N =10.25, VIN =3.6 V, COUT = 100 F / 330 V UCC, at room temperature
20 18 16 14
Time (Sec)
12 10 8 6 4 2 0 1.5 2.0 2.5 3.0 3.5 4.0 Battery Voltage (V) 4.5 5.0 5.5
Efficiency versus Battery Voltage
Transformer LPRIMARY = 12.8 H, N =10.25, VIN =3.6 V, at room temperature
86% 84% 82% 80% 78% 76% 74% 72% 70% 68% 66% 64% 62% 60% 58% 56% 54% 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Efficiency (%)
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
7
A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Final Output Voltage versus Battery Voltage
Transformer LPRIMARY = 12.8 H, N =10.25, VIN =3.6 V, at room temperature
328 327 326 325
VOUT (V)
324 323 322 321 320 1.5 2.0 2.5 3.0 3.5 4.0 Battery Voltage (V) 4.5 5.0 5.5
Note: Output voltage is sensed from the primary side winding when the switch turns off. This duration, toff , has to be long enough (>200 ns) in order to obtain an accurate measurement. The value of toff depends on ISWlim, primary inductance, LPrimary , and the turns ratio, N, as given by: toff = (ISWlim x LPRIMARY x N) / VOUT .
Average Input Current versus Battery Voltage
Transformer LPRIMARY = 12.8 H, N =10.25, VIN =3.6 V, at room temperature
0.50
0.45
0.40 Current (A)
0.35
0.30
0.25
0.20 1.5 2.0 2.5 3.0 3.5 4.0 Battery Voltage (V) 4.5 5.0 5.5
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Charging Waveforms
Output Capacitor Charging at Various Battery Voltages
Test conditions: VIN = 3.6 V, COUT = 100 F / 330 V UCC, transformer = T-16-024A (LPRIMARY =12.8 H, N = 10.25), at room temperature Oscilloscope settings: Ch1 = (5 V / div), Ch2 = Battery Voltage (1 V / div), Ch3 = Output Voltage (50 V / div), Ch4 = Input Current (100 mA V / div), DONE Time scale = 1 sec / div
VOUT
VBAT = 3.0 V
VBAT
IIN C2,C3,C4 C1 VOUT VDONE
VBAT
VBAT = 3.7 V
IIN C2,C3,C4 C1 VOUT VDONE
VBAT
VBAT = 4.2 V
IIN C2,C3,C4 C1 VDONE VOUT VBAT
VBAT = 5.0 V
IIN C2,C3,C4 C1 t Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com VDONE
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Functional Description
General Operation Overview The charging operation is started by a low-to-high signal on the CHARGE pin, provided that VIN is above the VUVLO level. It is strongly recommended to keep the CHARGE pin at logic low during power-up. After VIN exceeds the UVLO level, a lowto-high transition on the CHARGE pin is required to start the charging. The open-drain indicator is pulled low when DONE CHARGE is high and target output voltage is reached. When a charging cycle is initiated, the transformer primary side current, IPRIMARY , ramps-up linearly at a rate determined by the combined effect of the battery voltage, VBAT , and the primary side inductance, LPRIMARY . When IPRIMARY reaches the current limit, ISWLIM , the internal MOSFET is turned off immediately, allowing the energy to be pushed into the photoflash capacitor, COUT , from the secondary winding. The secondary side current drops linearly as COUT charges. The switching cycle starts again, either after the transformer flux is reset, or after a predetermined time period, tOFF(max) (18 s), whichever occurs first. The A8735 senses output voltage indirectly on primary side. This eliminates the need for high voltage feedback resistors required for secondary sensing. Flyback converter stops switching when output voltage reaches: VOUT = K x N - Vd , Where: K = 31.5 V typically, Vd is the forward drop of the output diode (approximately 2 V), and N is transformer turns ratio. Switch On-Time and Off-Time Control The A8735 implements an adaptive on-time/off-time control. Ontime duration, ton , is approximately equal to ton = ISWlim x LPRIMARY / VBAT . Off-time duration, toff , depends on the operating conditions during switch off-time. The A8735 applies two charging modes: Fast Charging mode and Timer mode, according to the conditions described in the next section.
C2,C3 C4 ISW
Timer Mode and Fast Charging Mode The A8735 achieves fast charging times and high efficiency by operating in discontinuous conduction mode (DCM) through most of the charging process. The relationship of Timer mode and Fast Charging mode is shown in figure 2. The IC operates in Timer mode when beginning to charge a completely discharged photoflash capacitor, usually when the output voltage, VOUT , is less than approximately 30 V (depending on transformer used). Timer mode is a fixed period, 18 s, off-time control. One advantage of having Timer mode is that it limits the initial battery current surge and thus acts as a "soft-start." A timeexpanded view of a Timer mode interval is shown in figure 3.
VOUT
IIN
Figure 2. Timer mode and Fast Charging mode: t = 1 s/div; VOUT = 50 V/div; IIN = 100 mA/div., VIN = VBAT = 3.6 V; COUT = 100 F / 330 V; and ILIM = 1.0 A.
VSW VBAT
VOUT C1
Figure 3. Expanded view of Timer mode: VOUT 10 V, VBAT = 5.5 V, Ch1: VOUT = 20 V / div., Ch2: VBAT = 5 V / div., Ch3: VSW = 5 V / div., Ch4: ISW = 500 mA / div., t = 5 s / div.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
As soon as a sufficient voltage has built up at the output capacitor, the IC enters Fast-Charging mode. In this mode, the next switching cycle starts after the secondary side current has stopped flowing, and the switch voltage has dropped to a minimum value. A proprietary circuit is used to allow minimum-voltage switching, even if the SW pin voltage does not drop to 0 V. This enables
Fast-Charging mode to start earlier, thereby reducing the overall charging time. Minimum-voltage switching is shown in figure 4. During Fast-Charging mode, when VOUT is high enough (over 50 V), true zero-voltage switching (ZVS) is achieved. This further improves efficiency as well as reduces switching noise. A ZVS interval is shown in figure 5.
C4
ISW
C4
ISW
VSW VBAT C2,C3 VOUT C2,C3
VSW VBAT
VOUT C1 C1
Figure 4. Minimum-voltage switching: VOUT 35 V, VBAT = 5.5 V, Ch1: VOUT = 20 V / div., Ch2: VBAT = 5 V / div., Ch3: VSW = 5 V / div., Ch4: ISW = 500 mA / div., t = 1 s / div.
Figure 5. True zero-voltage switching (ZVS): VOUT = 75 V, VBAT = 5.5 V, Ch1: VOUT = 20 V / div., Ch2: VBAT = 5 V / div., Ch3: VSW = 5 V / div., Ch4: ISW = 500 mA / div., t = 0.5 s / div.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Applications Information
Transformer Design 1. The transformer turns ratio, N, determines the output voltage: N = NS / NP VOUT = 31.5 x N - Vd , where 31.5 is the typical value of VOUTTRIP , and Vd is the forward drop of the output diode. 2. The primary inductance, LPRIMARY , determines the on-time of the switch: ton = (-LPRIMARY / R ) x ln (1 - ISWlim x R /VIN) , where R is the total resistance in the primary current path (including RSWDS(on) and the DC resistance of the transformer). If VIN is much larger than ISWlim x R, then ton can be approximated by: ton = ISWlim x LPRIMARY /VIN . 3. The secondary inductance, LSECONDARY, determines the offtime of the switch. Given: LSECONDARY / LPRIMARY = N x N , then toff = (ISWlim / N) x LSECONDARY /VOUT = (ISWlim x LPRIMARY x N) /VOUT . The minimum pulse width for toff determines what is the minimum LPRIMARY required for the transformer. For example, if ILIM = 1.0 A, N = 10, and VOUT = 315 V, then LPRIMARY must be at least 6.3 H in order to keep toff at 200 ns or longer. These relationships are illustrated in figure 6. In general, choosing a transformer with a larger LPRIMARY results in higher efficiency (because a larger LPRIMARY corresponds to a lower switch frequency and hence lower switching loss). But transformers with a larger LPRIMARY also require more windings and larger magnetic cores. Therefore, a trade-off must be made between transformer size and efficiency. Leakage Inductance and Secondary Capacitance The transformer design should minimize the leakage inductance to ensure the turn-off voltage spike at the SW node does not exceed the absolute maximum specification on the SW pin (refer to the Absolute Maximum Ratings table). An achievable minimum leakage inductance for this application, however, is usually compromised by an increase in parasitic capacitance. Furthermore, the transformer secondary capacitance should be minimized. Any secondary capacitance is multiplied by N2 when reflected to the primary, leading to high initial current swings when the switch turns on, and to reduced efficiency.
ton VSW
toff ISW
Vr
tf VIN VSW tneg
VIN ISW
Figure 6. Transformer Selection Relationships
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Effects of Input Filters Input Capacitor Selection Ceramic capacitors with X5R or X7R dielectrics are recommended for the input capacitor, CIN. During initial Timer mode the device operates with 18 s off-time. The resonant period caused by input filter inductor and capacitor should be at least 2 times greater or smaller than the 18 s Timer period, to reduce input ripple current during this period. The typical input LC filter is shown in figure 7. The resonant period is given by: Tres = 2 (L x CIN)1/2 .
VOUT
VBAT
C2 C3
IBAT
C1
The effects of input filter components are shown in figures 8, 9, and 10. It is recommended to use at least 10 F / 6.3 V to decouple the battery input, VBAT , at the primary of the transformer. Decouple the VIN pin using 0.1 F / 6.3 V bypass capacitor. Output Diode Selection Choose rectifying diodes, D1, to have small parasitic capacitance (short reverse recovery time) while satisfying the reverse voltage and forward current requirements. The peak reverse voltage of the diodes, VDPeak , occurs when the internal MOSFET switch is closed. It can be calculated as: VDPeak = VOUT + N x VBAT . The peak current of the rectifying diode, IDPeak, is calculated as: IDPeak = IPRIMARY_Peak / N .
Figure 8. Input current waveforms with Li+ battery connected by 5-in. wire and decoupled by 4.7 F capacitor, COUT = 100 F, VIN = VBAT = 3.6 V, Ch1: VOUT = 50 V/div, Ch2: VBAT = 2 V/div, Ch3: IBAT = 500 mA/div, t = 1 s/div VOUT
VBAT
C2 C3
IBAT
C1
Figure 9. Input current waveforms with Li+ battery connected through 4.7 H inductor and 4.7 F capacitor, COUT = 100 F, VIN = VBAT = 3.6 V, Ch1: VOUT = 50 V/div, Ch2: VBAT = 2 V/div, Ch3: IBAT = 200 mA/div, t = 1 s/div
VOUT
LIN +
C2
VBAT IBAT
VBAT
CIN
A8735
C3
C1
Figure 7. Typical input section with input inductance (inductance, LIN, may be an input filter inductor or inductance due to long wires in test setup)
Figure 10. Input current waveforms with Li+ battery connected through 4.7 H inductor and 10 F capacitor, COUT = 100 F, VIN = VBAT = 3.6 V, Ch1: VOUT = 50 V/div, Ch2: VBAT = 2 V/div, Ch3: IBAT = 200 mA/div, t = 1 s/div
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Layout Guidelines Key to a good layout for the photoflash capacitor charger circuit is to keep the parasitics minimized on the power switch loop (transformer primary side) and the rectifier loop (secondary side). Use short, thick traces for connections to the transformer primary and SW pin. It is important that the signal trace and other DONE signal traces be routed away from the transformer and other switching traces, in order to minimize noise pickup. In addition, high voltage isolation rules must be followed carefully to avoid breakdown failure of the circuit board.
Avoid placing any ground plane area underneath the transformer secondary and diode, to minimize parasitic capacitance. For low threshold logic (<1.2 V) add 1 nF capacitors across the CHARGE and TRIGGER pins to GND to avoid malfunction due to noise. Connect the EE package PAD to the ground pad for better thermal performance. Use ground planes on the top and bottom layers below the IC and connect them through multiple thermal vias. Refer to the figures on page 18 for recommended layout.
Recommended Components Component C1, Input Capacitor C2 COUT, Photoflash Capacitor D1, Output Diode Rating 10 F, 10%, 6.3 V, X5R ceramic capacitor (0805) 0.1 F, 6.3 V X5R ceramic capacitor 100 F / 330 V 2 x 250 V, 225 mA, 5 pF LPRIMARY = 12.8 H, N= 10.25, 6.5 x 8 x 4 mm LPRIMARY = 7.8 H, N= 9.9, 4.6 x 4.6 x 2.4 mm EPH-31ELL101B131S BAV23S T-16-024A MTF-S2 Chemi-Con Philips Semiconductor, Fairchild Semiconductor Tokyo Coil Electric Union Part Number JMK212BJ106K Source Taiyo Yuden
T1, Transformer
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
14
A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Recommended layout:
VBAT
3
D1
1
Vout
2
BAV23S C2 C4
2
X2
4
10uF TCE_T-16-024A
1 3
Cout1 100uF
Schematic
DONE CHARGE
0.1uF R10 2k
TP_Gate
6 VBAT 7 VIN_DRV 1 8 CHARGE GND DONE GATE TRIG 2 4
A8735
5 SW 3
C5 1nF
C6 1nF
Rg 12
U1 TRIGGER
Top side
Bottom side
Top components
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
15
A8735
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver
Package EE 8-Contact DFN/MLP with Exposed Thermal Pad
0.30 2.00 0.15 8 0.83 8 0.50
2.00 0.15 A 1 2 1 1.60
0.90
2.13
9X
D 0.08 C 0.25 0.05 0.50 BSC
SEATING PLANE +0.05 0.55 -0.04
C C
PCB Layout Reference View
1
2
0.325 0.050 0.90 B
All dimensions nominal, not for tooling use (reference JEDEC MO-229UCCD) Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 SON50P200X200X100-9M); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) D Coplanarity includes exposed thermal pad and terminals
8
1.60
Copyright (c)2010, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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