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Omnidirectional Microphone with Bottom Port and Digital Output ADMP421
FEATURES
Small and thin 3 mm x 4 mm x 1 mm surface-mount package High SNR of 61 dBA High sensitivity of -26 dBFS Flat frequency response from 100 Hz to 15 kHz Low current consumption: <650 A High PSRR of 80 dBFS Fourth-order - modulator Digital PDM output Compatible with Sn/Pb and Pb-free solder processes RoHS/WEEE compliant
GENERAL DESCRIPTION
The ADMP421 is a low cost, low power, digital output bottomported omnidirectional MEMS microphone. The ADMP421 consists of a MEMS microphone element, an impedance converter amplifier, and a fourth-order - modulator. The digital interface allows for the pulse density modulated (PDM) output of two microphones to be time multiplexed on a single data line using a single clock. The ADMP421 has a high SNR and high sensitivity, making it an excellent choice for far field applications. The ADMP421 has a flat wideband frequency response resulting in natural sound with high intelligibility. Low current consumption and a sleep mode enable long battery life for portable applications. A builtin particle filter provides high reliability. The ADMP421 complies with the TIA-920 Telecommunications Telephone Terminal Equipment Transmission Requirements for Wideband Digital Wireline Telephones standard. The ADMP421 is available in a thin 3 mm x 4 mm x 1 mm surface-mount package. It is reflow solder compatible with no sensitivity degradation. The ADMP421 is halide free.
APPLICATIONS
Smartphones and feature phones Digital video cameras Bluetooth headsets Video phones Teleconferencing systems
FUNCTIONAL BLOCK DIAGRAM
ASIC MEMS DATA
ADMP421
MEMBRANE BACKPLATE IMPEDANCE CONVERTER ADC
L/R SELECT CLK VDD GND
07596-001
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2010 Analog Devices, Inc. All rights reserved.
ADMP421 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics ................................................................ 4 Absolute Maximum Ratings............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 PCB Land Pattern Layout .................................................................8 Evaluation Board ...............................................................................9 Interfacing With Analog Devices Codecs ................................... 10 Handling Instructions .................................................................... 11 Pick and Place Equipment......................................................... 11 Reflow Solder .............................................................................. 11 Board Wash ................................................................................. 11 Reliability Specifications ................................................................ 12 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13
REVISION HISTORY
/10--Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADMP421 SPECIFICATIONS
TA = 25C, VDD = 1.8 V, CLK = 2.4 MHz, unless otherwise noted. All minimum and maximum specifications are guaranteed. Typical specifications are not guaranteed. Table 1.
Parameter PERFORMANCE Directionality Sensitivity1 Signal-to-Noise Ratio Equivalent Input Noise Frequency Response2 Symbol Test Conditions/Comments Min Typ Omni -26 61 33 100 15 Max Unit
SNR EIN
Total Harmonic Distortion Power Supply Rejection Ratio Maximum Acoustic Input INPUT CHARACTERISTICS Clock Supply Voltage Supply Current OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Latency Wake-Up Time Polarity
1 2 3
THD PSRR
1 kHz, 94 dB SPL 20 kHz bandwidth, A-weighted 20 kHz bandwidth, A-weighted Low frequency -3 dB point High frequency -3 dB point Deviation from flat response within pass band 105 dB SPL 217 Hz, 100 mV p-p square wave superimposed on VDD = 1.8 V Peak
-29
-23
-3 80 120 2.43 1.65
+2 3
dBFS dBA dBA SPL Hz kHz dB % dBFS dB SPL MHz V A A V V s ms
CLK VDD IS
Normal mode Sleep mode VDD 0 <30 10 Noninverting4
3.6 650 50
VOH VOL From sleep mode, power on
Relative to the rms level of a sine wave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density. See Figure 5 and Figure 6. The microphone operates at any clock frequency between 1.0 MHz and 3.3 MHz. Some specifications may not be guaranteed at frequencies other than 2.4 MHz. 4 Positive going (increasing) pressure on the membrane results in an increase in the number of 1s at the output.
Rev. 0 | Page 3 of 16
ADMP421
TIMING CHARACTERISTICS
Table 2.
Parameter Input tCLKIN Output t1OUTEN t1OUTDIS t2OUTEN t2OUTDIS Description Input clock period DATA1 driven after falling clock edge DATA1 disabled after rising clock edge DATA2 driven after rising clock edge DATA2 disabled after falling clock edge Min 310 30 20 30 20 Max 1000 Unit ns ns ns ns ns
Timing Diagram
tCLKIN
CLK
t1OUTEN
DATA1
t1OUTDIS
t2OUTDIS
07596-002
DATA2
t2OUTEN
Figure 2. Pulse Density-Modulated Output Timing
Rev. 0 | Page 4 of 16
ADMP421 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Sound Pressure Level (SPL) Mechanical Shock Vibration Temperature Range Rating 3.6 V 160 dB 10,000 g Per MIL-STD-883 Method 2007, Test Condition B -40C to +70C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
TP RAMP-UP
tP
CRITICAL ZONE TL TO TP
TEMPERATURE
TL
TSMAX TSMIN
tL
tS
PREHEAT
RAMP-DOWN
t25C TO PEAK
TIME
Figure 3. Recommended Soldering Profile Limits
Table 4. Recommended Soldering Profile Limits
Profile Feature Average Ramp Rate (TL to TP) Preheat Minimum Temperature (TSMIN) Maximum Temperature (TSMAX) Time (TSMIN to TSMAX), tS Ramp-Up Rate (TSMAX to TL) Time Maintained Above Liquidous (tL) Liquidous Temperature (TL) Peak Temperature (TP) Time Within 5C of Actual Peak Temperature (tP) Ramp-Down Rate Time 25C (t25C) to Peak Temperature Sn63/Pb37 3C/sec max 100C 150C 60 sec to 120 sec 3C/sec 60 sec to 150 sec 183C 240C + 0C/-5C 10 sec to 30 sec 6C/sec max 6 minute max Pb-Free 3C/sec max 150C 200C 60 sec to 120 sec 3C/sec 60 sec to 150 sec 217C 260C + 0C/-5C 20 sec to 40 sec 6C/sec max 8 minute max
Rev. 0 | Page 5 of 16
07596-003
ADMP421 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DATA 5 VDD 4
1 CLK 2 L/R SELECT
3 GND
Figure 4. Pin Configuration (Bottom View)
Table 5. Pin Function Descriptions
Pin No. 1 2 Mnemonic CLK L/R SELECT Description Clock Input to Microphone. Left Channel or Right Channel Select. DATA1 (right): L/R SELECT tied to GND. DATA2 (left): L/R SELECT pulled to VDD. Ground. Power Supply. For best performance and to avoid potential parasitic artifacts, placing a 0.1 F (100 nF) ceramic type X7R or better capacitor between Pin 4 (VDD) and ground is strongly recommended. The capacitor should be placed as close to Pin 4 as possible. Digital Output Signal (DATA1, DATA2).
3 4
GND VDD
5
DATA
Rev. 0 | Page 6 of 16
07596-007
ADMP421 TYPICAL PERFORMANCE CHARACTERISTICS
10 8 6 4 2
(dB)
-40
-50
-60
PSRR (dBFS)
0 -2 -4 -6 -8
07596-004
-70
-80
-90
100
1k FREQUENCY (Hz)
10k
500
1k
2k
5k
10k
20k
FREQUENCY (Hz)
Figure 5. Frequency Response Mask
10
Figure 7. Typical Power Supply Rejection Ratio vs. Frequency
0
(dB)
-10
1k FREQUENCY (Hz)
10k
Figure 6. Typical Frequency Response (Measured)
07596-005
-20 100
Rev. 0 | Page 7 of 16
07596-006
-10
-100 200
ADMP421 PCB LAND PATTERN LAYOUT
The recommended PCB land pattern for the ADMP421 should be laid out to a 1:1 ratio to the solder pads on the microphone package, as shown in Figure 8. Care should be taken to avoid applying solder paste to the sound hole in the PCB. A suggested
3.80 (0.30) 4x 0.40 x 0.60 0.35 o1.70
solder paste stencil pattern layout is shown in Figure 9. The diameter of the sound hole in the PCB should be larger than the diameter of the sound port of the microphone. A minimum diameter of 0.5 mm is recommended.
0.90
(0.30) o1.10
2.80
(0.30)
2.05
0.35
Figure 8. Suggested PCB Land Pattern Layout
2.45 0.9
1.498 x 0.248
0.248 x 0.948 (2x) 0.398 x 0.298 (4x)
1.45
0.7
0.248 x 1.148 (2x)
1.525
0.248 x 0.498 (2x)
1.17
1.498
07596-009
0.205 WIDE 0.362 CUT (3x)
Figure 9. Suggested Solder Paste Stencil Pattern Layout
Rev. 0 | Page 8 of 16
07596-008
(0.30)
0.70
2x R0.10
ADMP421 EVALUATION BOARD
Figure 10 and Figure 11 show the ADMP421 evaluation board schematic and layout, respectively. The ADMP421 evaluation board is designed to plug directly into Connector J6 on the Analog Devices, Inc., EVAL-ADAU1761Z.
P1 1 GND 1 2
U1
07596-010
Figure 10. ADMP421 Evaluation Board Schematic
07596-011
2 CLK 3 4 5 6 7 LRSEL 8 DATA 9 10 VDD 11 12
ADMP421
CLK VDD 4 C1 0.1F
ANALOG DEVICES ADMP421
U1
1
2
L/R SELECT 5 DATA GND 3
C1
Figure 11. ADMP421 Evaluation Board Layout
11
12
Table 6. Evaluation Board Connector Pin Functions
Pin No. 1 3 5 7 9 11 Description GND CLK Not connected L/R SELECT DATA VDD Pin No. 2 4 6 8 10 12 Description Not connected Not connected Not connected Not connected Not connected Not connected
Rev. 0 | Page 9 of 16
ADMP421 INTERFACING WITH ANALOG DEVICES CODECS
Analog Devices ADAU1361 and ADAU1761 codecs feature digital microphone inputs that support the ADMP421 PDM output data format. See the connection diagrams shown in
JACKDET/MICIN R2: DIGITAL MICROPHONE/ JACK DETECTION CONTROL JDFUNC[1:0] TO JACK DETECTION CIRCUIT DIGITAL MICROPHONE INTERFACE RIGHT ADC LEFT CHANNEL RIGHT CHANNEL
Figure 12 and Figure 13, and refer to the ADMP421 AN-1003 Application Note and the codecs' respective data sheets for more details on the digital microphone interface.
LEFT ADC R19: ADC CONTROL INSEL
DECIMATORS
Figure 12. Digital Microphone Signal Routing Block Diagram
MICBIAS BCLK CLK CM LINP LINN RINN L/R SELECT GND RINP
ADMP421
DIGITAL MICROPHONE
VDD 0.1F DATA
BCLK CLK
ADMP421
DIGITAL MICROPHONE
VDD 0.1F L/R SELECT GND DATA
ADAU1361 OR ADAU1761
07596-013
JACKDET/MICIN
Figure 13. ADAU1361 and ADAU1761 Stereo Interface Block Diagram
Rev. 0 | Page 10 of 16
07596-012
ADMP421 HANDLING INSTRUCTIONS
PICK AND PLACE EQUIPMENT
The MEMS microphone can be handled using standard pickand-place and chip shooting equipment. Care should be taken to avoid damage to the MEMS microphone structure as follows: Use a standard pickup tool to handle the microphone. Because the microphone hole is on the bottom of the package, the pickup tool can make contact with any part of the lid surface. Use care during pick-and-place to ensure that no high shock events above 20 kg are experienced because such events may cause damage to the microphone. Do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone. Do not pull air out of or blow air into the microphone port. Do not use excessive force to place the microphone on the PCB.
REFLOW SOLDER
For best results, the soldering profile should be in accordance with the recommendations of the manufacturer of the solder paste used to attach the MEMS microphone to the PCB. It is recommended that the solder reflow profile not exceed the limit conditions specified in Figure 3 and Table 4.
BOARD WASH
When washing the PCB, ensure that water does not make contact with the microphone port. Blow-off procedures and ultrasonic cleaning must not be used.
Rev. 0 | Page 11 of 16
ADMP421 RELIABILITY SPECIFICATIONS
The microphone sensitivity after stress must deviate by no more than 3 dB from the initial value. Table 7.
Stress Test Low Temperature Operating Life High Temperature Operating Life THB Temperature Cycle High Temperature Storage Low Temperature Storage Component CDM ESD Component HBM ESD Component MM ESD Description -40C, 500 hrs, powered +125C, 500 hrs, powered 65C/85% relative humidity (RH), 500 hrs, powered -40C/+125C, one cycle per hour, 100 cycles 150C, 500 hrs -40C, 500 hrs All pins, 0.5 kV All pins, 1.5 kV All pins, 0.2 kV
Rev. 0 | Page 12 of 16
ADMP421 OUTLINE DIMENSIONS
4.10 4.00 3.90 0.95 REF 2.05 1.70 DIA. 3.54 REF 0.70
REFERENCE CORNER
0.40 x 0.60 (Pins 1, 2, 4, 5)
0.30 REF 2.48 REF 3.10 3.00 2.90 0.90 0.30 REF
5 1
3 2
1.10 DIA. 1.50 0.25 DIA. (THRU HOLE) R 0.10 (2 x) 2.80
4
1.05 REF 0.35 0.30 REF 0.30 REF 3.80 BOTTOM VIEW
TOP VIEW 0.35 1.10 1.00 0.90 0.72 REF
SIDE VIEW
0.24 REF
Figure 14. 5-Terminal Chip Array Small Outline No Lead Cavity [LGA_CAV] 4 mm x 3 mm Body (CE-5-1) Dimensions shown in millimeters
2.05 2.00 1.95
2
8.00 1.60 MAX 1.50 NOM 0.35 0.30 0.25 0.20 MAX
4.00
1
A
1.85 1.75 1.65
12.30 12.00 11.70
3.40 4.16 1.50 MIN DIA
5.55 5.50 5.45
2
DETAIL A
A
1.30 0.25 SECTION A-A
0.50 R DETAIL A
Figure 15. LGA_CAV Tape and Reel Outline Dimensions Dimensions shown in millimeters
ORDERING GUIDE
Model1 ADMP421ACEZ-RL ADMP421ACEZ-RL7 EVAL-ADMP421Z
1 2
Temperature Range -40C to +70C -40C to +70C
Package Description 5-Terminal LGA_CAV, 13" Tape and Reel 5-Terminal LGA_CAV, 7" Tape and Reel Evaluation Board
Package Option CE-5-12 CE-5-12
Ordering Quantity 5,000 1,000
Z = RoHS Compliant Part. This package option is halide free.
Rev. 0 | Page 13 of 16
062408-A
NOTES: 1. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE 0.20. 2. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE.
0.25
03-19-2010-G
ADMP421 NOTES
Rev. 0 | Page 14 of 16
ADMP421 NOTES
Rev. 0 | Page 15 of 16
ADMP421 NOTES
(c)2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07596-0- /10(0)
Rev. 0 | Page 16 of 16

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