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19-5142; Rev 0; 1/10
TION KIT EVALUA BLE AVAILA
Single-Port, 40W, IEEE 802.3af/at PSE Controller with Integrated MOSFET
Features
S IEEE 802.3af/at Compliant S Up to 40W for Single-Port PSE Applications S Integrated 0.5I Power MOSFET and Sense
General Description
The MAX5971A is a single-port, power-sourcing equipment (PSE) power controller designed for use in IEEE(R) 802.3af/at-compliant PSE. This device provides powered device (PD) discovery, classification, current limit, and DC and AC load-disconnect detections. The MAX5971A operates automatically without the need for any software programming and features an integrated power MOSFET and sense resistor. The device also supports new Class 5 and 2-event classification for detection and classification of high-power PDs. The MAX5971A provides up to 40W to a single port (Class 5 enabled) and still provides highcapacitance detection for legacy PDs. The MAX5971A provides input undervoltage lockout (UVLO), input overvoltage lockout, overtemperature detection, output voltage slew-rate limit during startup, and LED status indication. The MAX5971A is available in a space-saving, 28-pin TQFN (5mm x 5mm) power package, and is rated for the extended (-40NC to +85NC) temperature range.
MAX5971A
Resistor
S PD Detection and Classification S Programmable Current Limit for Class 5 PDs S High-Capacitance Detection for Legacy Devices S Supports Both DC and AC Load Removal
Detections
S Current Foldback and Duty Cycle-Controlled
Current Limit
S LED Indicator for Port Status S Direct Fast-Shutdown Control Capability S Space-Saving, 28-Pin TQFN (5mm x 5mm)
Package
Ordering Information
PART MAX5971AETI+ TEMP RANGE -40NC to +85NC PIN-PACKAGE 28 TQFN-EP*
Applications
Single-Port PSE End-Point Applications Single-Port PSE Power Injectors (Midspan Applications) Switches/Routers Industrial Automation Equipment Wireless LAN Access Point/WiMAXTM Base Station
+Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad.
Typical Operating Circuit
PSE OUTPUT
AGND OUT OUTP
-54V
VEE VEE_DIG LED PWMEN LEGACY MIDSPAN OSC EN
MAX5971A
DET ILIM1 ILIM2
IEEE is a registered service mark of the Institute of Electrical and Electronics Engineers, Inc. WiMAX is a trademark of WiMAX Forum.
_______________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to VEE, unless otherwise noted.) AGND, DET, LED ..................................................-0.3V to +80V OUT ......................................................-0.3V to (VAGND + 0.3V) OUTP .......................................................-6V to (VAGND + 0.3V) VEE_DIG ...............................................................-0.3V to +0.3V OSC .........................................................................-0.3V to +6V EN, PWMEN, MIDSPAN, LEGACY, ILIM1, ILIM2 ....-0.3V to +4V Maximum Current Into LED ................................................40mA Maximum Current Into OUT ......................... Internally regulated Continuous Power Dissipation (TA = +70NC) 28-Pin TQFN (derate 34.5mW/NC above +70NC) ......2758mW Package Thermal Resistance (Note 1) BJA ...............................................................................29NC/W BJC ................................................................................2NC/W Operating Temperature Range .......................... -40NC to +85NC Storage Temperature Range............................ -65NC to +150NC Junction Temperature .....................................................+150NC Lead Temperature (soldering, 10s) ................................+300NC Soldering Temperature (reflow) ......................................+260NC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND - VEE = +54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2) PARAMETER POWER SUPPLIES Operating Voltage Range Supply Current CURRENT LIMIT Maximum ILOAD allowed during current-limit conditions, VOUT = 0V (Note 3) Class 0, 1, 2, 3 Class 4 Class 5 if ILIM1 = VEE, ILIM2 = unconnected Class 5 if ILIM1 = unconnected, ILIM2 = VEE Class 5 if ILIM1 = VEE, ILIM2 = VEE 400 684 807 855 902 420 720 850 900 950 27 10 166 441 756 893 mA 945 998 V V mA VAGND IEE VAGND - VEE VOUT = VEE, all logic inputs unconnected, measured at AGND in power mode 32 2.5 60 4 V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
Current Limit
ILIM
Foldback Initial OUT Voltage Foldback Final OUT Voltage Minimum Foldback Current Limit Threshold
VFLBK_ST VFLBK_END ITH_FB
VAGND - VOUT below which the current limit starts folding back VAGND - VOUT below which the current limit reaches ITH_FB VOUT = VAGND
2
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Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
ELECTRICAL CHARACTERISTICS (continued)
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND - VEE = +54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2) PARAMETER OVERCURRENT Class 0, 1, 2, 3 Overcurrent threshold allowed for t P tFAULT, VOUT = 0V (Note 3) Class 4 Class 5 if ILIM1 = VEE, ILIM2 = unconnected Class 5 if ILIM1 = unconnected, ILIM2 = VEE Class 5 if ILIM1 = VEE, ILIM2 = VEE 351 602 710 752 794 370 634 748 792 836 389 666 785 mA 832 878 SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5971A
Overcurrent Threshold
ICUT
INTERNAL POWER Measured from OUT to VEE, IOUT = 100mA TA = +25NC TA = +85NC 0.5 0.6 0.9 I 1.3 10 28.5 3 62.5 1 Port is shutdown and device resets if the junction temperature exceeds this limit, temperature increasing Temperature decreasing VOUT = VAGND, probing phases OUTP discharge current, detection and classification off, port shutdown, VOUTP = VAGND - 2.8V VOUT - VEE, VOUT decreasing, enabled during detection 200 FA V V V V
DMOS On-Resistance
RDS(ON)
Power-Off OUT Leakage Current IOUT_LEAK SUPPLY MONITORS VEE Undervoltage Lockout VEE Undervoltage Lockout Hysteresis VEE Overvoltage Lockout VEE Overvoltage Lockout Hysteresis Thermal Shutdown Threshold Thermal Shutdown Hysteresis OUTPUT MONITOR OUT Input Current Idle Pullup Current at OUT Short to VEE Detection Threshold Short to VEE Detection Threshold Hysteresis LOAD DISCONNECT DC Load-Disconnect Threshold IDCTH IBOUT IDIS VEE_UVLO VEE_UVLOH VEE_OV VEE_OVH
VEN = VEE, VOUT = VAGND VAGND - VEE, VAGND increasing Port is shutdown if: VAGND - VEE < VEE_ UVLO - VEE_UVLOH VAGND - VEE > VEE_OV, VAGND increasing
TSHD TSHDH
150 20 6 265
NC NC FA FA
DCNTH DCNHY
1.5
2.0 220
2.5
V mV
Minimum load current allowed before disconnect (DC disconnect active), VOUT = 0V Current into DET, for IDET < IACTH the port powers off (AC disconnect active)
5
7.5
10
mA
AC Load-Disconnect Threshold
IACTH
115
130
145
FA
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3
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
ELECTRICAL CHARACTERISTICS (continued)
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND - VEE = +54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2) PARAMETER Triangular Wave Peak-to-Peak Voltage Amplitude OSC Pullup/Pulldown Currents ACD_EN Threshold SYMBOL AMPTRW IOSC VACD_EN CONDITIONS Measured at DET, referred to AGND Measured at OSC VOSC - VEE > VACD_EN to activate AC disconnect Time from IRSENSE < IDCTH (DC disconnect active) or IDET < IACTH (AC disconnect active) to gate shutdown VAGND - VDET during the first detection phase VAGND - VDET during the second detection phase VDET = VAGND during detection, measure current through DET If VAGND - VOUT < VDCP after the first detection phase a short circuit to AGND is detected. First point measurement current threshold for open condition (Note 4) Detection rejects lower values Detection rejects higher values VAGND - VDET during classification VDET = VAGND, during classification measure current through DET Classification current thresholds between classes Class 0, Class 1 Class 1, Class 2 Class 2, Class 3 Class 3, Class 4 Class 4 upper limit (Note 5) 32 16 65 5.5 13.0 21 31 45 8 55 6.5 14.5 23 33 48 20 80 7.5 16.0 25 35 51 10 80 V mA mA 19 MIN 3.85 26 280 TYP 4 32 330 MAX 4.2 39 380 UNITS V FA mV
Load Disconnect Timer DETECTION Detection Probe Voltage (First Phase) Detection Probe Voltage (Second Phase) Current-Limit Protection
tDISC
300
400
ms
VDPH1 VDPH2 IDLIM
3.8 9 1.50
4 9.3 1.75
4.2 9.6 2.00
V V mA
Short-Circuit Threshold
VDCP
1
V
Open-Circuit Threshold Resistor Detection Window Resistor Rejection Window CLASSIFICATION Classification Probe Voltage Current-Limit Protection
ID_OPEN RDOK RDBAD
20 26.5 15.5
FA kI kI
VCL IClLIM
V mA
Classification Current Thresholds
ICL
Mark Event Voltage Mark Event Current Limit
VMARK IMARK_LIM
VAGND - VDET during mark event VDET = VAGND, during mark event measure current through DET
4
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Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
ELECTRICAL CHARACTERISTICS (continued)
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at VAGND - VEE = +54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2) PARAMETER Digital Input Low Digital Input High Internal Input Pullup Current LED Output Low Voltage LED Output Leakage PWM Frequency PWM Duty Cycle TIMING Startup Time tSTART Time during which a current limit set to 420mA is allowed, starts when power is turned on Maximum allowed time for an overcurrent condition set by ICUT after startup Time allowed for the port voltage to reset before detection starts Maximum time allowed before detection is completed 2 Time allowed for classification Time allowed for mark event tDLY tRESTART Time VAGND must be above the VEEUVLO thresholds before the device operates Time the device waits before turning on after an overcurrent fault 7 2.2 19 9 5.2 16 x tFAULT 50 60 70 ms SYMBOL VIL VIH IPU VLED_LOW ILED_LEAK Pullup current to internal digital supply to set default values ILED = 10mA, PWM disabled, port power-on PWM disabled, shutdown mode, VLED = 60V 25 6.25 2.4 3 5 7 0.8 10 CONDITIONS MIN TYP MAX 0.8 UNITS V V FA V FA kHz % DIGITAL INPUTS/OUTPUTS (Voltages referenced to VEE)
MAX5971A
Fault Time Detection Reset Time Detection Time Midspan Mode Detection Delay Classification Time Mark Event Time VEEUVLO Turn-On Delay Restart Timer
tFAULT tME tDET tDMID tCLASS
50
60 80
70 90 330 2.4 23 11
ms ms ms s ms ms ms ms
Note 2: All devices are production tested at TA = +25NC. Limits at TA = -40NC and +85NC are guaranteed by design. Note 3: If ILIM1 and ILIM2 are both unconnected, Class 5 detection is disabled. See the Class 5 PD Classification section and Table 3 for details and settings. Note 4: RDOK = (VOUT2 - VOUT1)/(IDET2 - IDET1). VOUT1, VOUT2, IDET2, and IDET1 represent the voltage at OUT and the current at DET during phase 1 and 2 of the detection, respectively. Note 5: If Class 5 is enabled, this is the classification current thresholds from Class 4 to Class 5.
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5
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
ANALOG SUPPLY CURRENT vs. INPUT VOLTAGE
MAX5971A toc01
ANALOG SUPPLY CURRENT vs. TEMPERATURE
MAX5971A toc02
VEE UNDERVOLTAGE LOCKOUT vs. TEMPERATURE
MAX5971A toc03
2.7
MEASURED AT AGND
2.7
MEASURED AT AGND
30.0 29.5 29.0 28.5 28.0 27.5
SUPPLY CURRENT (mA)
2.5
SUPPLY CURRENT (mA)
2.6
2.6
2.5
2.4
2.4
2.3 32 36 40 44 48 52 56 60 VAGND - VEE (V)
2.3 -40 -15 10 35 60 85 TEMPERATURE (C)
UNDERVOLTAGE LOCKOUT (V)
27.0 -40 -15 10 35 60 85 TEMPERATURE (C)
VEE OVERVOLTAGE LOCKOUT vs. TEMPERATURE
MAX5971A toc04
INTERNAL FET RESISTANCE vs. TEMPERATURE
MAX5971A toc05
64.0 63.5 UNDERVOLTAGE LOCKOUT (V) 63.0 62.5 62.0 61.5 61.0 60.5 60.0 -40 -15 10 35 60
1000
FET RESISTANCE (m) 85
800
600
400
200 -40 -15 10 35 60 85 TEMPERATURE (C) TEMPERATURE (C)
FOLDBACK CURRENT-LIMIT THRESHOLD vs. OUTPUT VOLTAGE
MAX5971A toc06
DC DISCONNECT THRESHOLD vs. TEMPERATURE
MAX5971A toc07
800 700 600 IRSENSE (mA) 500 400 300 200 100 0 0 10 20 VAGND - VOUT (V) 30
7.4 DC DISCONNECT THRESHOLD (mA) 7.2 7.0 6.8 6.6 6.4 -40 -15 10 35 60
CLASS 4
CLASS 0, 1, 2, 3
40
85
TEMPERATURE (C)
6
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Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
MAX5971A
OVERCURRENT TIMEOUT (240 TO 138)
MAX5971A toc08
SHORT-CIRCUIT RESPONSE TIME
MAX5971A toc09
VAGND - VOUT 20V/div 0V 0V
VAGND - VOUT 20V/div
IOUT 200mA/div 0mA 20ms/div 0mA 20ms/div
IOUT 200mA/div
SHORT-CIRCUIT TRANSIENT RESPONSE
MAX5971A toc10
EN TO OUT TURN-OFF DELAY
MAX5971A toc11
VAGND - VOUT 20V/div 0V
VAGND - VOUT 20V/div 0V IOUT 200mA/div VEN 5V/div 100s/div
0mA IOUT 5A/div
0mA 10s/div
0V
ZERO-CURRENT DETECTION WAVEFORM WITH DC DISCONNECT ENABLED
MAX5971A toc12
ZERO-CURRENT DETECTION WAVEFORM WITH AC DISCONNECT ENABLED
MAX5971A toc13
VAGND - VOUT 20V/div 0V 0V
VAGND - VOUT 20V/div
IOUT 100mA/div 0mA 100ms/div 0mA 100ms/div
IOUT 100mA/div
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7
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
OVERCURRENT RESTART DELAY
MAX5971A toc14
STARTUP WITH A VALID PD
MAX5971A toc15
VAGND - VOUT 20V/div 0V
VAGND - VOUT 20V/div 0V
IOUT 200mA/div 0mA 400ms/div 0mA 100ms/div
IOUT 100mA/div
DETECTION WITH INVALID PD (25k TO 10F)
MAX5971A toc16a
DETECTION WITH INVALID PD (15k)
MAX5971A toc16b
VAGND - VOUT 1V/div 0V
VAGND - VOUT 5V/div 0V
IOUT 1mA/div 0mA 40ms/div 0mA 100ms/div
IOUT 1mA/div
DETECTION WITH INVALID PD (33k)
MAX5971A toc16c
DETECTION WITH INVALID PD (OPEN CIRCUIT)
MAX5971A toc16d
VAGND - VOUT 5V/div 0V 0V VAGND - VOUT 5V/div
0mA 100ms/div
IOUT 1mA/div
0mA 100ms/div
IOUT 1mA/div
8
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Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
MAX5971A
STARTUP IN MIDSPAN WITH A VALID PD
MAX5971A toc17
DETECTION IN MIDSPAN WITH INVALID PD (15k)
MAX5971A toc18a
VAGND - VOUT 20V/div 0V 0V
VAGND - VOUT 5V/div
IOUT 100mA/div 0mA 100ms/div 0mA 400ms/div
IOUT 1mA/div
DETECTION IN MIDSPAN WITH INVALID PD (33k)
MAX5971A toc18b
DETECTION IN OUTPUT SHORTED TO AGND
MAX5971A toc19
VAGND - VOUT 5V/div 0V 0V
VAGND - VOUT 5V/div
0mA 400ms/div
IOUT 1mA/div
IOUT 1mA/div 0mA 40ms/div
CLASSIFICATION WITH DIFFERENT PD CLASSES (0 TO 3)
MAX5971A toc20a
CLASSIFICATION WITH DIFFERENT PD CLASSES (4 AND 5)
MAX5971A toc20b
VAGND - VOUT 10V/div 0V 0V
VAGND - VOUT 10V/div
CLASS 3 CLASS 2 CLASS 1 CLASS 0
IOUT 10mA/div 0mA
CLASS 5 CLASS 4
IOUT 20mA/div
0mA
40ms/div
40ms/div
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9
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
STARTUP USING 2-EVENT CLASSIFICATION WITH A VALID PD
MAX5971A toc21
LED DETECTION FAULT WITH PWM ENABLED
MAX5971A toc22a
VAGND - VOUT 20V/div 0V
0V
VAGND - VOUT 10V/div
0mA
IOUT 500mA/div
IOUT 100mA/div 0mA 0V 100ms/div 200ms/div
VAGND - VLED 20V/div
LED DETECTION FAULT WITH PWM DISABLED
MAX5971A toc22b
LED OVERCURRENT FAULT WITH PWM ENABLED
MAX5971A toc23a
0V
VAGND - VOUT 10V/div
0V
VAGND - VOUT 50V/div IOUT 500mA/div
0mA
IOUT 500mA/div
0mA
VAGND - VLED 20V/div 0V 200ms/div 0V 200ms/div
VAGND - VLED 20V/div
LED OVERCURRENT FAULT WITH PWM DISABLED
MAX5971A toc23b
LED PWM TIMING AND DUTY CYCLE
MAX5971A toc24
0V
VAGND - VOUT 50V/div IOUT 500mA/div
VAGND - VOUT 50V/div 0V IOUT 500mA/div
0mA
0mA
VAGND - VLED 20V/div 0V 200ms/div 0V 10s/div
VAGND - VLED 20V/div
10
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Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
Pin Configuration
AGND OSC N.C. N.C. N.C. LED I.C.
MAX5971A
TOP VIEW
21 N.C. 22 DET 23 N.C. 24 OUTP 25 OUT 26 OUT 27 N.C. 28 1 VEE
20
19
18
17
16
15 14 13 12 EN LEGACY VEE_DIG I.C. I.C. I.C. I.C.
MAX5971A +
2 VEE 3 VEE 4 ILIM1 5 ILIM2 *EP
11 10 9 8 6 PWMEN 7 MIDSPAN
THIN QFN
*EXPOSED PAD, CONNECT TO AGND.
Pin Description
PIN 1, 2, 3 NAME VEE FUNCTION Analog Low-Side Supply Input. Bypass with an external 100V, 47FF capacitor in parallel with a 100V, 0.1FF ceramic capacitance between AGND and VEE. Class 5 Current-Limit Digital Adjust 1. Referenced to VEE. ILIM1 is internally pulled up to the digital supply. Use ILIM1 with ILIM2 to enable Class 5 operation and to adjust the Class 5 current-limit value. See the Electrical Characteristics table and Table 3 in the Class 5 PD Classification section for details. Class 5 Current-Limit Digital Adjust 2. Referenced to VEE. ILIM2 is internally pulled up to the digital supply. Use ILIM2 with ILIM1 to enable Class 5 operation and to adjust the Class 5 current-limit value. See the Electrical Characteristics table and Table 3 in the Class 5 PD Classification section for details. PWM Control Logic Input. Referenced to VEE. PWMEN is internally pulled up to the digital supply. Leave unconnected to enable the internal PWM to drive the LED pin. Force low to disable the internal PWM. Detection Collision Avoidance Logic Input. Referenced to VEE. MIDSPAN is internally pulled up to the digital supply. Leave unconnected to activate the detection collision avoidance circuitry for midspan PSE systems. Force low to disable this function for an end-point PSE system. The MIDSPAN logic level latches after the device is powered up or after a reset condition. Internally Connected. Connect I.C. to VEE. Digital Low-Side Supply Input. Connect to VEE externally.
4
ILIM1
5
ILIM2
6
PWMEN
7
MIDSPAN
8-11, 15 12
I.C. VEE_DIG
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11
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
Pin Description (continued)
PIN 13 NAME LEGACY FUNCTION Legacy Detection Logic Input. Referenced to VEE. LEGACY is internally pulled up to the digital supply. Leave unconnected to activate the legacy PD detection. Force low to disable this function. The LEGACY logic level latches after the device is powered up or after a reset condition. Enable Input. Referenced to VEE. EN is internally pulled up to the digital supply. Leave unconnected to enable the device. Force low for at least 40Fs to reset the device. The MIDSPAN, OSC, and LEGACY states latch-in when the reset condition is removed (low-to-high transition). No Connection. Not internally connected. Leave N.C. unconnected. LED Indicator Open-Drain Output. Referenced to VEE. LED can sink 10mA and can drive an external LED directly. Blinking functionality is provided to signal different conditions (see the PWM and LED Signals section). Connect LED to AGND externally (see Figures 6 and 7) or to an external supply (if available) through a series resistance. AC-Disconnect Triangular Wave Output. Bypass with a 100nF (Q10% tolerance) external capacitor to VEE to enable the AC disconnect function. Connect OSC to VEE to disable the AC disconnect function and to activate the DC disconnect function. The OSC state latches after the device is powered up or after a reset condition. High-Side Supply Input Detection/Classification Voltage Output. DET is used to set the detection mark event and classification probe voltages and for the AC current sensing when using the AC disconnect function. To use the AC disconnect function, place a 1kI and 0.47FF RC series in parallel with the external protection diode to OUTP (see Figure 7). Port Pullup Output. OUTP is used to pull up the port voltage to AGND when needed. If AC disconnect is used, connect OUTP to the anode of the AC-blocking diode. If AC disconnect is not used, connect OUTP to OUT (see Figures 6 and 8). Bypass OUTP to AGND with a 100V, 0.1FF ceramic capacitor. Integrated MOSFET Output. If DC disconnect is used, connect the port output to OUT (see Figures 6 and 8). If the AC disconnect function is used, connect OUT to the cathode of the AC-blocking diode (see Figure 7). Exposed Pad. Connect EP to VEE externally. See the Layout Procedure section for details.
14 16, 18, 20, 22, 24, 28
EN
N.C.
17
LED
19
OSC
21
AGND
23
DET
25
OUTP
26, 27 --
OUT EP
12
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Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
Simplified Diagram
OSC CURRENT SENSING TRIANGLE WAVE GENERATOR VOLTAGE PROBING AND CURRENT-LIMIT CONTROL AGND DET
MAX5971A
OSC STATUS MONITOR EN
OUTP
LEGACY MIDSPAN REGISTER FILE
PORT STATE MACHINE (SM)
DETECTION AND CLASSIFICATION CONTROL
9-BIT ADC AC DISCONNECT ENABLE
VOLTAGE SENSING FOLDBACK CONTROL
OUT
CENTRAL LOGIC UNIT (CLU)
A=1
AGND ANALOG BIAS AND SUPPLY MONITOR
INTERNAL SUPPLIES VOLTAGE REFERENCES CURRENT REFERENCES
GATE DRIVE AC DISCONNECT SIGNAL (ACD) AC DETECTOR ACD REFERENCE CURRENT CURRENT LIMIT, OVERCURRENT, AND OPENCIRCUIT SENSING, AND FOLDBACK CONTROL INTERNAL RSENSE CLASS 5 ENABLE/DISABLE, OVERCURRENT AND CURRENT LIMIT CONTROL ILIM1 ILIM2 INTERNAL MOSFET
VEE
LED
THRESHOLD SETTINGS PWM
MAX5971A
PWMEN
Detailed Description
The MAX5971A is a single-port, PSE power controller designed for use in IEEE 802.3af/IEEE 802.3at-compliant PSE. This device provides PD discovery, classification, current limit, and DC and AC load-disconnect detections. The MAX5971A operates automatically without the need for any software programming and features an integrated power MOSFET and sense resistor. The device also supports new Class 5 and 2-event classification for detection and classification of high-power PDs. The MAX5971A provides up to 40W to a single port (Class 5 enabled) and still provides high-capacitance detection for legacy PDs.
The MAX5971A provides input UVLO, input overvoltage lockout, overtemperature detection, output voltage slewrate limit during startup, and LED status indication. The MAX5971A is reset by any of the following conditions: 1) Power-up. Reset condition is cleared once VEE rises above the UVLO threshold. 2) Hardware reset. Reset occurs once the EN input is driven low (> 40s typ.) any time after power-up. The device exits the reset condition once the EN input is driven high again. 3) Thermal shutdown. The device enters thermal shutdown at 150NC. The device exits thermal shutdown and is reset once the temperature drops below 130NC.
Reset
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13
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
During a reset, the MAX5971A latches in the state of MIDSPAN, LEGACY, and OSC. During normal operation, changes to these inputs are ignored. In midspan mode, the device adopts cadence timing during the detection phase. When cadence timing is enabled and a failed detection occurs, the port waits between 2s and 2.4s before attempting to detect again. Midspan mode is activated by setting MIDSPAN high and then powering or resetting the device. By default, the MIDSPAN input is internally pulled high. Force MIDSPAN low to disable this function. The MAX5971A operates automatically after the reset condition is cleared. The device performs detection and classification, and powers up the port automatically once a valid PD is detected at the port. If a valid PD is not connected at the port, the MAX5971A repeats the detection routine continuously until a valid PD is connected.
Midspan Mode
During detection, the MAX5971A keeps the internal MOSFET off and forces two probe voltages through DET. The current through DET is measured as well as the voltage at OUT. A two-point slope measurement is used, as specified by the IEEE 802.3af/802.3at standard, to verify the device connected to the port. An external diode, in series with the DET input, restricts PD detection to the first quadrant as specified by the IEEE 802.3af/802.3at standard. To prevent damage to non-PD devices, and to protect itself from an output short circuit, the MAX5971A limits the current into DET to less than 2mA maximum during PD detection. In midspan mode, the MAX5971A waits at least 2.0s before attempting another detection cycle after every failed detection. The first detection, however, happens immediately after exiting a reset condition. High-Capacitance Detection The status of the LEGACY input is latched during powerup or after reset condition is cleared. The LEGACY input is internally pulled high enabling high-capacitance detection. Unless high-capacitance detection is needed, connect LEGACY to VEE to disable this function. If highcapacitance detection is enabled, PD signature capacitances up to 47FF (typ) are accepted.
Automatic Operation
During normal operation, the MAX5971A probes the output for a valid PD. A valid PD has a 25kI discovery signature characteristic as specified in the IEEE 802.3af/802.3at standard. Table 1 shows the IEEE 802.3at specification for a PSE detecting a valid PD signature.
PD Detection
Table 1. PSE PI Detection Modes Electrical Requirements (IEEE 802.3at)
PARAMETER Open-circuit voltage Short-circuit current Valid test voltage Voltage difference between test points Time between any two test points Slew rate Accept signature resistance Reject signature resistance Open-circuit resistance Accept signature capacitance Reject signature capacitance Signature offset voltage tolerance Signature offset current tolerance SYMBOL VOC ISC VVALID DVTEST tBP VSLEW RGOOD RBAD ROPEN CGOOD CBAD VOS IOS 10 0 0 2.0 12 19 < 15 500 150 2.8 1 2 0.1 26.5 > 33 MIN MAX 30 5 10 UNITS V mA V V ms V/Fs kI kI kI nF FF V FA This timing implies a 500Hz maximum probing frequency ADDITIONAL INFORMATION In detection mode only In detection mode only
14
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Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
During the PD classification mode, the MAX5971A forces a probe voltage (-18V typ) at DET and measures the current into DET. The measured current determines the class of the PD. If the ILIM1 and ILIM2 pins are both left unconnected, the MAX5971A classifies the PD based on Table 33.9 of the IEEE 802.3at standard (see Table 2). If the measured current exceeds 51mA, the MAX5971A does not power the PD, but returns to the idle state before attempting a new detection cycle. Class 5 PD Classification The MAX5971A supports high power beyond the IEEE 802.3at standard by providing an additional classification (Class 5) if needed. To enable Class 5 detection and select the corresponding current-limit/overcurrent
Powered Device Classification (PD Classification)
thresholds, ILIM1 and ILIM2 must be set based on the combinations detailed in Table 3. Once Class 5 is enabled, during classification, if the MAX5971A detects currents in excess of the Class 4 upper limit threshold, the PD is classified as a Class 5 powered device. The PD is guaranteed to be classified as a Class 5 device for any classification current from 51mA up to the classification current-limit threshold. The Class 5 overcurrent threshold and current limit is set with ILIM1 and ILIM2. ILIM1 and ILIM2 are both referenced to VEE and are internally pulled up to the digital supply. Leave ILIM1 and ILIM2 unconnected to disable Class 5 detection and to be fully compliant to IEEE 802.3at standard classification. Class 5 detection is enabled, and the corresponding overcurrent threshold and current limit is adjusted, by connecting one or both to VEE (see Table 3). 2-Event PD Classification If the result of the first classification event is Class 0 through Class 3, then only a single classification event occurs as shown in Figure 1. However, if the result is Class 4 or Class 5 (when enabled), the device performs a second classification event as shown in Figure 2. Between the classification cycles, the MAX5971A performs a first and second mark event as required by the IEEE 802.3at standard, forcing a -9.0V probing voltage at DET. When the MAX5971A enters a powered state, the tFAULT and tDISC timers are reset. When the startup timer has timed out, the device enters a normal powered condition, allowing power delivery to the PD .
MAX5971A
Table 2. PSE Classification of a PD (Table 33.9 of the IEEE 802.3at Standard)
MEASURED ICLASS (mA) 0 to 5 > 5 and < 8 8 to 13 > 13 and < 16 16 to 21 > 21 and < 25 25 to 31 > 31 and <35 35 to 45 > 45 and < 51 CLASSIFICATION Class 0 Can be Class 0 or 1 Class 1 Either Class 1 or 2 Class 2 Either Class 2 or 3 Class 3 Either Class 3 or 4 Class 4 Either Class 4 or Invalid
Powered State
Table 3. Class 5 Overcurrent Threshold and Current-Limit Settings
ILIM1 CONFIGURATION Unconnected Unconnected VEE VEE ILIM2 CONFIGURATION Unconnected VEE Unconnected VEE OVERCURRENT THRESHOLD (mA) Class 5 disabled 748 792 836 CURRENT LIMIT (mA) Class 5 disabled 850 900 950
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15
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
80ms 150ms tDET(1) 150ms tDET(2) 19ms tCLASS t 0V -4V -9.3V
-18V
-48V
VOUT
Figure 1. Detection, Classification, and Port Power-Up Sequence
9ms 80ms 150ms tDET(1) 150ms tDET(2) 19ms tCLASS(1) 19ms tCLASS(2) t 0V -4V -9.3V 9ms
-18V
-48V
VOUT
Figure 2. Detection, 2-Event Classification, and Port Power-Up Sequence 16 _____________________________________________________________________________________
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
The MAX5971A has an internal sense resistor, RSENSE (see the Simplified Diagram), connected between the source of the internal MOSFET and VEE to monitor the load current. Under normal operating conditions, the current through RSENSE (IRSENSE) never exceeds the threshold ILIM. If IRSENSE exceeds ILIM, an internal current-limiting circuit regulates the gate voltage of the internal MOSFET, limiting the current. During transient conditions, if IRSENSE exceeds ILIM by more than 2A, a fast pulldown circuit activates to quickly recover from the current overshoot. In the normal powered state, the MAX5971A checks for overcurrent conditions, as determined by ICUT = ~88% of ILIM. The tFAULT counter sets the maximum allowed continuous overcurrent period. This timer is incremented both in startup and in normal powered state, but under different conditions. During startup, the counter increases when IRSENSE exceeds ILIM, while in the normal powered state the counter increases when IRSENSE exceeds ICUT. It decreases at a slower pace when IRSENSE drops below ILIM or ICUT. A slower decrement for the tFAULT counter allows for detection of repeated shortduration overcurrent events. When the counter reaches
Overcurrent Protection
the tFAULT limit, the MAX5971A powers down the port. For a continuous overstress, a fault occurs exactly after a period of tFAULT. After a power-off due to an overcurrent fault, the tFAULT timer is not immediately reset but starts decrementing. The MAX5971A allows the port to be powered on only when the tFAULT counter reaches zero. This feature sets an automatic port power duty-cycle protection to the internal MOSFET to avoid overheating. In the normal powered state, the ILIM and ICUT thresholds are set automatically according to the classification result (see Table 2 for classification results based on detection current, and the Electrical Characteristics table for the corresponding thresholds). During startup, ILIM is always set to 420mA regardless of the detected class. During startup and normal operation, an internal circuit senses the port voltage and reduces the current-limit value and the overcurrent threshold when (VAGND VOUT) < 27V. The foldback function helps to reduce the power dissipation on the internal MOSFET. The current limit eventually reduces down to ITH_FB when (VAGND VOUT) < 10V (see Figure 3).
MAX5971A
Foldback Current
IRSENSE
ILIM
ITH_FB
10V
27V
VAGND - VOUT
Figure 3. Foldback Current Characteristics ______________________________________________________________________________________ 17
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
The MAX5971A internally generates digital supplies (referenced to VEE) to power the internal logic circuitry. All logic inputs and outputs are referenced to VEE. See the Electrical Characteristics table for digital input thresholds. If digital logic inputs are driven externally, the nominal digital logic level is 3.3V. The MAX5971A contains undervoltage and overvoltage protection features. An internal VEE undervoltage lockout (VEE_UVLO) circuit keeps the port off and the MAX5971A in reset until VAGND - VEE exceeds 28.5V (typ) for more than 2.5ms. An internal VEE overvoltage (VEE_OV) circuit shuts down the port when (VAGND - VEE) exceeds 62.5V (typ). Force OSC to VEE and power or reset the device to activate DC load-disconnect monitoring. If IRSENSE (the current across RSENSE) falls below the DC load-disconnect threshold, IDCTH, for more than tDISC, the device turns off port power.
Digital Logic
a blocking diode in series to OUT and an RC circuit in parallel to the DET diode must be used, as shown in the typical operating circuit of Figure 7. The AC disconnect uses an internal triangle wave generator to supply the probing signal. Then the resulting 4VP-P amplitude wave is forced on DET. The common mode of the output signal probed on DET is 5V below AGND. If the AC current peak into DET falls below IACTH for more than tDISC, the device powers down the port. The MAX5971A includes a multifunction LED driver to inform the user of the port status. LED is an open-drain, multifunction output referenced to VEE and can sink up to 10mA (typ) while driving an external LED. The LED is turned on when the port is connected to a valid PD and powered. If the port is not powered or is disconnected, the LED will be off. For two other conditions, the MAX5971A blinks a code to communicate the port status. A series of two flashes indicates an overcurrent fault occurred during port power-on, and has a timing characteristic detailed by Figure 4. A series of five flashes indicates that during detection an invalid low or high discovery signature resistance was detected and has a timing characteristic detailed by Figure 5.
Undervoltage and Overvoltage Protection
PWM and LED Signals
DC Disconnect Monitoring
The MAX5971A features AC load-disconnect monitoring. Bypass OSC with a 100nF (Q10% tolerance) external capacitor to VEE and power or reset the device to enable AC disconnect. When AC disconnect is enabled,
AC Disconnect Monitoring
PORT POWERED ON
PORT POWERED DOWN, DUE TO OVERCURRENT FAULT
PORT POWERED ON AGAIN
LED ON
LED OFF
LED ON
LED OFF
LED ON
LED OFF
LED ON
223ms
74ms
223ms
74ms
Figure 4. LED Code Timing for Overcurrent Fault During Port Power-On
INVALID HIGH OR LOW DISCOVERY SIGNATURE RESISTANCE DETECTED LED ON LED OFF LED ON LED OFF LED ON LED OFF LED ON LED OFF LED ON LED OFF
74ms
223ms
74ms
223ms
74ms
223ms
74ms
223ms
74ms
1.4s
SEQUENCE REPEATS
Figure 5. LED Code Timing for Detection Fault Due to High- or Low-Discovery Signature Resistance 18 _____________________________________________________________________________________
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
The MAX5971A also contains an internal square wave, PWM signal generator. The PWM runs at a typical frequency of 25kHz with an approximate typical duty cycle of 6.25%. PWMEN is used to enable or disable the PWM. PWMEN is internally pulled up to the digital supply, and can be left unconnected to enable the internal PWM. When enabled, the LED pulses are driven by the PWM to reduce the power dissipation and increase the system efficiency. Force PWMEN low to disable the internal PWM; the LED is then driven directly. If the MAX5971A die temperature reaches 150NC, an overtemperature fault is generated and the device shuts down. The die temperature must cool down below 130NC to remove the overtemperature fault condition. After a thermal shutdown condition clears, the device is reset. 1) Place the input bypass capacitance and the output bypass capacitor (0.1F ceramic capacitor from AGND to OUTP) as close to the MAX5971A as possible. 2) Use large SMT component pads for power dissipating devices such as the MAX5971A and the external diodes in the high-power path. 3) Use short, wide traces whenever possible for highpower paths. 4) Use the MAX5971 Evaluation Kit as a design and layout reference. 5) The exposed pad (EP) must be soldered evenly to the PCB ground plane for proper operation and power dissipation. Use multiple vias beneath the exposed paddle for maximum heat dissipation. A 1.0mm to 1.2mm pitch is the recommended spacing for these vias and they should be plated (1oz copper) with a small barrel diameter (0.30mm to 0.33mm).
MAX5971A
Thermal Shutdown
Applications Information
Careful PCB layout is critical to achieve high efficiency and low EMI. Follow these layout guidelines for optimal performance.
Layout Procedure
1N4448
10mH
SMJ58A
0.1F 100V
2.2MI PSE OUTPUT
47F 100V
0.1F 100V
LED 5.1kI
LED EN
AGND OUT OUTP 1N4448 DET 1kI LEGACY MIDSPAN OSC ILIM1 1kI ILIM2 PWMEN
MAX5971A
1nF -54V
VEE VEE_DIG
-54V
Figure 6. Typical Operating Circuit 1 (DC Load Removal Detection, Internal PWM Enabled for LED Indication, and Class 5 Detection Enabled)
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19
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET MAX5971A
1N4448 10mH SMJ58A 0.1F 100V 2.2MI PSE OUTPUT 47F 100V 0.1F 100V LED 5.1kI
LED EN
AGND OUT S1B OUTP 1N4448 1kI VEE_DIG LEGACY MIDSPAN OSC DET 1kI ILIM1 1kI ILIM2 PWMEN
MAX5971A
1nF -54V
VEE
0.47FF 100V
-54V
0.1F
Figure 7. Typical Operating Circuit 2 (AC Load Removal Detection, Internal PWM Enabled for LED Indication, and Class 5 Detection Enabled)
47F 100V
0.1F 100V
AGND
SMJ58A
0.1F 100V
2.2MI PSE OUTPUT
-54V
VEE VEE_DIG EN
OUT OUTP
MAX5971A
1nF
LED PWMEN LEGACY MIDSPAN OSC DET ILIM1 ILIM2
1N4448
Figure 8. Typical Operating Circuit 3 (IEEE 802.3at Compliant, Minimal Application Circuit with DC Load Removal Detection and No LED Indication) 20 _____________________________________________________________________________________
Single-Port, 40W, IEEE 802.3af/802.3at PSE Controller with Integrated MOSFET
Chip Information
Process: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE 28 TQFN-EP PACKAGE CODE T2855+6 DOCUMENT NO. 21-0140
MAX5971A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
(c)
21
2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.

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