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Power Management Switch IC Series for PCs and Digital Consumer Product
1ch Small Current Output Power Management Switch IC
BD6538G
No.09029EAT14
Outline BD6538G is single channel high side powers switch with low ON resistance Nch power MOSFET. Rich safety functions such as Over current detection, Thermal shutdown (TSD), Under Voltage Lock Out(UVLO) and Soft start function which are required for the power supply port protection are integrated into 1chip.
Feature 1) Single channel of low ON resistance (Typ = 150m) Nch power MOSFET built in 2) 500mA Continuous current load 3) Active"High"Control Logic 4) Soft start function 5) Over current detectionOutput Off-latch Operating 6) Thermal shutdown 7) Open drain error flag output 8) Under voltage lockout 9) Power supply voltage range 2.7V~5.5V 10) Operating temperature range-40C~85C 11) SSOP5 Package
Absolute maximum ratings Parameter Supply voltage Enable voltage /OC voltage /OC current OUT voltage Storage temperature Power dissipation
*1 *
Symbol VIN VEN V/OC I/OC VOUT TSTG PD
Rating to 6.0 to 6.0 to 6.0 5 -0.3 to VIN + 0.3 -55 to 150 675 *1 -0.3 -0.3 -0.3
Unit V V V mA V C mW
1 Mounted on 70mm * 70mm * 1.6mm grass-epoxy PCB. Derating : 5.4mW / C for operating above Ta=25C. This product is not designed for protection against radioactive rays.
Operating conditions Parameter Operating voltage Operating temperature Continuous output current Symbol VIN TOPR IOUT Min 2.7 -40 0 Typ Max 5.5 85 0.5 Unit V C A
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1/11
2009.05 - Rev.A
BD6538G
Electric characteristics Unless otherwise specified VIN = 5.0V, Ta = 25C DC characteristics Parameter Operating Current Standby Current EN input voltage EN input current ON resistance Over current threshold Output current at short /OC output lOW voltage UVLO Threshold AC characteristics Parameter Output rise time Output rise delay time Output fall time Output fall delay time Blanking time Symbol TON1 TON2 TOFF1 TOFF2 TBLANK Min. 10 Typ. 1 1.5 1 3 15 Max. 6 10 20 40 20 unit ms ms s s ms Symbol IDD ISTB VEN VEN IEN RON ITH ISC V/OC VTUVH VTUVL Min. 2.0 -1.0 0.5 0.35 2.1 2.0 Typ. 110 0.01 0.01 150 2.3 2.2 Max. 160 5 0.8 1.0 200 1.0 0.4 2.5 2.4 unit A A V V A m A A V V V
Technical Note
Condition VEN = 5.0V, VOUT = Open VEN = 0V, VOUT = Open High input Low input VEN =0Vor5V IOUT = 50mA VOUT = 0V (RMS) I/OC = 0.5mA Increasing VIN Decreasing VIN
Condition RL = 20, Fig. 2 Ref. RL = 20, Fig. 2 Ref. RL = 20, Fig. 2 Ref. RL = 20, Fig. 2 Ref. -
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2/11
2009.05 - Rev.A
BD6538G
Measurement circuit
VIN VIN
Technical Note
A
VIN 1F GND VEN EN /OC VEN VOUT
A
VIN 1F GND EN /OC VOUT RL
Operating current
EN input voltage, Output rise, fall time
VIN
VIN 10k
A
VIN 1F GND VEN EN /OC VOUT IOUT
A
IOC VIN 1F GND VEN EN /OC VOUT
ON resistance, Over current Fig.1 Measurement circuit
/OC output LOW voltage
Timing diagram
VEN
50% TON2 90%
50% TOFF2 90% 10% TOFF1
VOUT
10% TON1
Fig.2
Timing chart at output rise / fall time
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3/11
2009.05 - Rev.A
BD6538G
Reference data
140 OPERATING CURRENT : IDD[A] 120 100 80 60 40 20 0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
Ta=25C
Technical Note
140 120 OPERATING CURRENT : IDD [A] 100 80 60 40 20 0 -50
VIN=5.0V
1.0 Ta=25C OPERATING CURRENT : ISTB[A] 0.8
0.6
0.4
0.2
0.0
0 50 100 AMBIENT TEMPERATURE : Ta[]
2
3 4 5 SUPPLY VOLTAGE : VIN[V]
6
Fig.3 Operating current EN Enable
Fig.4 Operating current EN Enable
Fig.5 Operating current EN Disable
1.0
VIN=5.0V
2.0
Ta=25C
2.0 VIN=5.0V ENABLE INPUT VOLTAGE : VEN[V] Low to High High to Low 1.5
OPERATING CURRENT : ISTB[A]
0.8 0.6 0.4 0.2 0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
ENABLE INPUT VOLTAGE : VEN[V] 0
1.5
Low to High High to Low
1.0
1.0
0.5
0.5
0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
Fig.6 Operating current EN Disable
200
Ta=25C
Fig.7 EN input voltage
Fig.8 EN input voltage
200
VIN=5.0V
Overcurrent threshold : I TH[A]
1.0 Ta=25C 0.9
ON RESISTANCE : RON[m]
ON RESISTANCE : RON[m]
150
150
0.8
100
100
0.7
50
50
0.6
0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
0.5 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
Fig.9 ON resistance
Fig.10 ON resistance
Fig.11 Over current detection
1.0
100 /OC OUTPUT LOW VOLTAGE : V/OC[mV] 80 60 40 20 0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
/OC OUTPUT LOW VOLTAGE : V/OC[mV]
VIN=5.0V Ta=25C
100
VIN=5.0V
Overcurrent threshold : ITH[A]
0.9
80 60 40 20 0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
0.8
0.7
0.6
0.5 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
Fig.12 Over current detection
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Fig.13 /OC output LOW voltage
Fig.14 /OC output LOW voltage
4/11
2009.05 - Rev.A
BD6538G
Technical Note
2.5 UVLO THRESHOLD : VTUVH, VTUVL[V]
1.0 UVLO HYSTERESIS VOLTAGE : VHYS[V]
5.0 Ta=25C
2.4
0.8
4.0
2.3
VTUVH
0.6
RISE TIME : TON1[ms]
3.0
2.2
VTUVL
0.4
2.0
2.1
0.2
1.0
2.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
Fig.15 UVLO Threshold
Fig.16 UVLO hysteresis voltage
Fig.17 Output rise time
5.0
5.0
5.0
VIN=5.0V
TURN ON TIME : TON2[ms]
Ta=25C
TURN ON TIME : TON2[ms]
VIN=5.0V
4.0
4.0 RISE TIME : TON1[ms]
4.0
3.0
3.0
3.0
2.0
2.0
2.0
1.0
1.0
1.0
0.0 -50
0 50 100 AMBIENT TEMPERATURE : Ta[]
0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
0.0
-50
0
50
100
AMBIENT TEMPERATURE : Ta[]
Fig.18 Output rise time
Fig.19 Output turn on time
Fig.20 Output turn on time
5.0
Ta=25C
5.0
6.0
VIN=5.0V
TURN OFF TIME : T OFF2[s]
Ta=25C
5.0 4.0 3.0 2.0 1.0 0.0
4.0 FALL TIME : TOFF1[s] 3.0 2.0 1.0 0.0 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
FALL TIME : TOFF1[s]
4.0
3.0
2.0
1.0
0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
2
3 4 5 SUPPLY VOLTAGE : VIN[V]
6
Fig.21 Output fall time
Fig.22 Output fall time
Fig.23 Output turn off time
6.0
20
20
VIN=5.0V
BLANKING TIME : TBLANK[ms]
TURN OFF TIME : TOFF2[s] 5.0 4.0 3.0 2.0 1.0 0.0 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
Ta=25C
BLANK TIME : TBLANK[ms]
18
VIN=5.0V
18
16
16
14
14
12
12
10 2 3 4 5 SUPPLY VOLTAGE : VIN[V] 6
10 -50 0 50 100 AMBIENT TEMPERATURE : Ta[]
Fig.24 Output turn off time
Fig.25 Blanking time
Fig.26 Blanking time
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5/11
2009.05 - Rev.A
BD6538G
Waveform data
Technical Note
VEN (5V/div.)
VEN (5V/div.) V/OC (5V/div.)
VEN (5V/div.)
V/OC (5V/div.)
V/OC (5V/div.) CL=147uF
VOUT (5V/div.) VIN=5V RL=20
VOUT (5V/div.) VIN=5V RL=20 IOUT (0.2A/div.) CL=47uF TIME(1us/div.)
CL=100uF
IOUT (0.5A/div.)
IOUT (0.5A/div.)
VIN=5V RL=20
TIME(1ms/div.)
TIME (2ms/div.)
Fig.27 Output rise characteristic
Fig.28 Output fall characteristic
Fig29. Inrush current respone
V/OC (5V/div.)
V/OC (5V/div.) VOUT (5V/div.)
VEN (5V/div.) V/OC (5V/div.) VOUT (5V/div.)
VOUT (5V/div.)
VIN=5V IOUT (0.5A/div.) VIN=5V TIME (20ms/div.) TIME (5ms/div.) IOUT (0.5A/div.) VIN=5V TIME (5ms/div.) IOUT (0.5A/div.)
Fig.30 Over current response Ramped load
Fig.31 Over current response Ramped load
Fig.32 Over current response Enable to short circuit
V/OC (5V/div.)
VIN (5V/div.)
VIN (5V/div.) VOUT (5V/div.)
VOUT (5V/div.) VOUT (5V/div.)
VIN=5V IOUT (0.5A/div.) IOUT (0.2A/div.) RL=20 IOUT (0.2A/div.) RL=20
TIME (5ms/div.)
TIME (10ms/div.)
TIME (10ms/div.)
Fig.33 Over current response Output shortcircuit at Enable
Fig.34 UVLO response VIN Increasing
Fig.35 UVLO response VIN Decreasing
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6/11
2009.05 - Rev.A
BD6538G
Block diagram
Delay Counter /OC SQ R Charge pump
Technical Note
GND
OCD
UVLO
TSD
VIN 1 GND 2 Top View
5 VOUT
EN VIN
OUT
EN 3
4 /OC
Fig.36 Block diagram Pin description Pin No. 1 2 3 4 5
Fig.37 Pin Configuration
symbol VIN GND EN /OC VOUT
I/O I O O
Pin function Power supply input. Input terminal to switch and power supply input terminal of the internal circuit. Ground. Enable input. Power switch on at High level. Over current output. Low level at over current detection. Open drain output. Switch output.
Terminal circuit symbol
Pin No.
Equivalent circuit
EN
3
EN
VOUT
5
VOUT
/OC
/OC
4
Fig.38 Terminal circuit
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7/11
2009.05 - Rev.A
BD6538G
Technical Note
Operations Explanation 1.Overcurrent protectionOCD The overcurrent detection circuit limits the current and outputs an error flag (/OC) when the current flowing in switch MOSFET exceeds overcurrent threshold (ITH). The timer is reset when the state of the overcurrent is terminated before passing of TBLANK. After a state of overcurrent is passed at blanking time, the switch is shut down and the overcurrent signal (/OC) changes to Low level. The latch is reset through it input Low to EN or detects UVLO. Normal operation is returned by EN signal is set to High or UVLO is off. (Fig. 4, Fig. 5). The over current limit circuit works when EN signal is enable. 2. Thermal shutdown circuitTSD Thermal shutdown circuit turns off the switch and outputs an error flag (/OC) when the junction temperature exceeds 150C (typ.). Therefore, when the junction temperature goes down to 150C (typ), the switch output and an error flag (/OC) are recovered automatically. This operating is repeated until cause of junction temperature increase is removed or EN signal is set Disable. Thermal shutdown circuit works when EN signal is enable. 3. Under voltage lockout UVLO UVLO keeps the switch-off state at MOSFET until VIN exceeds 2.3V (Typ.). If VIN drops under 2.2V (Typ.) while the switch is turning on, then UVLO shuts off the power switch. Under voltage lockout works when EN signal is enable. 4. Overcurrent signal output Overcurrent signal output/OC N-MOS open drain output. At detection of overcurrent, thermal shutdown, output is Low level. is Over current shutdown operating
TBLAN K TBLAN K
Ou tp u t cu rre n t ON Switch sta tu s OFF ON
FL AG Ou tp u t
VIN
VTU VL
VTU VH
VEN
Fig.39 Overcurrent shutdown operationReset at toggle of EN
TBLANK TBLANK
Output current ON Switch status OFF ON
FLAG Output
VEN
Fig.40 Overcurrent shutdown operation (Reset at reclosing of power supply VIN)
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8/11
2009.05 - Rev.A
BD6538G
Typical application circuit
5V(typ.) 10k~ 100k CIN Controller VIN GND EN /OC VOUT CL + -
Technical Note
Ferrite bead
Fig.41 Typical application circuit Application information When excessive current flows owing to output shortcircuit or so, ringing occurs by inductance of power source line to IC, and may cause bad influences upon IC actions. In order to avoid this case, connect a bypath capacitor by IN terminal and GND terminal of IC. 1uF or higher is recommended. Pull up /OC output by resistance 10k ~ 100k. Set up value which satisfies the application as CL and Ferrite Beads. This system connection diagram doesn't guarantee operating as the application. The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account external parts or dispersion of IC including not only static characteristics but also transient characteristics. This system connection diagram doesn't guarantee operating as the application. The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account external parts or dispersion of IC including not only static characteristics but also transient characteristics. Power dissipation character (SSOP5 package)
700 600 POWER DISSIPATION: Pd[mV]
500 400 300 200
100 0 0 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta[]
* 70mm * 70mm * 1.6mm : glass epoxy board mounting
Fig.42 Power dissipation curve (Pd-Ta Curve)
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9/11
2009.05 - Rev.A
BD6538G
Technical Note
Notes for use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC's power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (12) Thermal shutdown circuit (TSD) When junction temperatures become detected temperatures or higher, the thermal shutdown circuit operates and turns a switch OFF. The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible, is not aimed at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit operating or use the LSI assuming its operation. (13) Thermal design Perform thermal design in which there are adequate margins by taking into account the power dissipation (Pd) in actual states of use.
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10/11
2009.05 - Rev.A
BD6538G
Ordering part number
Technical Note
B
D
6
Part No. 6538
5
3
8
G
-
T
R
Part No.
Package G: SSOP5
Packaging and forming specification TR: Embossed tape and reel (SSOP5)
SSOP5
2.90.2
5 4
+6 4 -4

Tape Quantity Direction of feed Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
+0.2 1.6 -0.1
2.80.2
1
2
3
0.2Min.
( reel on the left hand and you pull out the tape on the right hand
1pin
)
+0.05 0.13 -0.03
1.25Max.
1.10.05
0.050.05
+0.05 0.42 -0.04 0.95 0.1
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
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11/11
2009.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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