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STRUCTURE PRODUCT TYPE FEATURE
Silicon Monolithic Integrated Circuit White LED Driver for LCD Backlights
BD9204F
Input voltage range 7V-15V Built-in 3ch boost DCDC converter (current mode) OVP, SCP, OPEN protection Analog dimming, PWM dimming enable Under voltage lock out (UVLO) Fail pin annotate abnormal state SOP28 package
(Ta=25) Symbol Vccmax Pd Topr Tstg Limit 20 750 *1 -40+85 -55+150 Unit V mW
ABSOLUTE MAXIMUM RATINGS PARAMETER Power Supply Voltage Power Dissipation Operating Temperature Range Storage Temperature Range
*1 Pd derated at 6.0 mW/ for temperature above Ta=25, mounted on 70mmx70mmx1.6mm 1 layer(cupper area 70mmx70mm)glass-epoxy PCB. This product is not designed for protection against radioactive rays.
OPERATING CONDITIONS (Ta=25)
PARAMETER Power Supply Voltage Symbol VCC Limit 715 Unit V
REV.
2/4 ELECTRICAL CHARACTERISTICS(unless otherwise specified VCC=12V, Ta=25)
PARAMETER Total Current Consumption Circuit Current Standby Current VREG VREG Output Voltage VREG input current Boost Driving Pin N1, N2, N3 resistance1 N1, N2, N3 resistance2 Error-Amp block ILED threshold voltage COMP1,2,3 sink current COMP1,2,3 source current CT Oscillator block Oscillation Frequency SOFT START SS source current SS END pin voltage OVP and SCP detection Over Voltage Protection voltage OVP hysteresis Short Circuit Protection voltage SCP hysteresis Fail pin Low level voltage (normal state) Leak current (abnormal state) CP pin charge current CP detect voltage SEL pin Input Low voltage Input Middle voltage Input High voltage STB pin Input Low voltage Input High voltage PWM pin Input Low voltage Input High voltage VPWML VPWMH -0.3 3.0 1.2 V V VSTBYL VSTBYH -0.3 2.0 0.8 V V VSELL VSELM VSELH -0.3 1.6 4.2 0.8 3.0 V V V CH1,CH2,CH3=enable CH1,CH2,=enable CH1=enable VFAIL ILFAIL ICP VCP 0.2 1 2.0 0.5 2 V uA uA V IOFAIL=1mA VOFAIL=4V VCP=0V VOVP VOVPHYS VSCP VSCPHYS 1.65 0.05 2.0 0.05 0.20 0.05 2.35 0.35 V V V V Sweep up Sweep down Sweep down Sweep up ISS VSS 1.0 5.0 uA V FRT 270 300 330 kHz RT=160k VFB ICOMPSI ICOMPSO (-2%) 1.5 100 100 (+2%) V uA uA VREF=1.5V VLED=2.0V VLED=1.0V RONH RONL 4.0 2.0 ION=-10mA Between output N and internal power supply ION=10mA VREG IREG 4.8 2.16 5.0 3.6 5.2 5.04 V mA IO=0mA, CREG=1uF VREG=5.25V (input externally) STB=H, SEL=L, PWM=L ICC IST 4.7 0 10 mA uA STB=H, SEL=L, PWM=L STB=L Symbol MIN. Limit TYP. MAX. UNIT Conditions
(This product is not designed for protection against radioactive rays.)
REV.
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VIN
BLOCK DIAGRAM
VCC GND
BD9204F
VCC RT SS GND1 STB VREF PDIM SEL GND STB VREF PWM SEL N2 OCP2 ILED2 FAIL FAIL PGND N1 OCP1 PGND ILED1 COMP1 OVP1 FB1 COMP1 VIN GND1
ADIM STB PDIM FAIL
OVP2 COMP2
FB2 COMP2 FB3 COMP3 VIN GND1
VREG VREF4V
REG CP PGND PGND PGND
N3 OCP3 ILED3 PGND
PGND VIN
UVLO
OVP3 COMP3
GND1
PACKEGE, MARKING SPECIFICATION
SOP-28
BD9204F
Lot No.
PIN No. & PIN NAME
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 name VREF FAIL SS RT OCP3 PGND N3 OCP2 N2 OCP1 N1 STB VCC VREG function analog dimming signal input abnormal state output soft start setting oscillation frequency setting CH3 DCDC over current protection power ground pin CH3 DCDC switching output CH2 DCDC over current protection CH2 DCDC switching output CH1 DCDC over current protection CH1 DCDC switching output ON/OFF logic input Power pin internal power supply output No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 name ILED1 COMP1 COMP2 COMP3 SEL UVLO GND PWM OVP1 OVP2 OVP3 CP ILED3 ILED2 function CH1 current signal feedback input CH1 error amplifier output CH2 error amplifier ouput CH3 error amplifier output power on channel select input the voltage monitor input for UVLO analog ground pin PWM dimming signal input CH1 boost voltage monitor input CH2 boost voltage monitor input CH3 boost voltage monitor input latch OFF timer setting CH3 current signal feedback input CH2 current signal feedback input
REV.
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Operation Notes 1) Absolute maximum ratings An excess in the absolute maximum rating, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2) GND voltage The potential of GND pin must be minimum potential in all condition. As an exception, the circuit design allows voltages up to -0.3 V to be applied to the ICT pin. 3) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Inter-pin shorts and mounting errors Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins are shorted together. 5) Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 6) Mutual impedance Power supply and ground wiring should reflect consideration of the need to lower mutual impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). 7) External components The input DC voltage or DC current or temperature of external components such as inductor or capacitor affects its electrical character. . The ripple current through capacitor over regulation also affect to its reliability. External components should be chosen and made sure, considering the margins in all operational condition. 8) Regarding input pin of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For example, as shown in the figures below, the relation between each potential is as follows: When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode. When GND > Pin B, the P-N junction operates as a parasitic transistor. Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used. Although the circuit design allows voltages up to -0.3 V to be applied to the ICT pin, voltages lower than this may cause the behavior described above. Use caution when designing the circuit.
Resistor (Pin A) P N P substrate GND P+ N N P+ (Pin B) C
Transistor (NPN) B N E GND
P+ N
P N P substrate
P
+
N
Parasitic elements (Pin A)
Parasitic elements (Pin B) C B E
GND
Parasitic elements Other Adjacent Elements GND
GND
Simplified structure of a Monolithic IC
Parasitic elements
REV.
Notice
Notes
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R1010A

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