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HD74LVC16374A 16-bit D-type Flip Flops with 3-state Outputs REJ03D0367-0400Z (Previous ADE-205-122B (Z)) Rev.4.00 Jul. 30, 2004 Description The HD74LVC16374A has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and highspeed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features * VCC = 2.0 V to 5.5 V * All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) * All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) * Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) * Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25C) * High output current 24 mA (@VCC = 3.0 V to 5.5 V) Ordering Information Part Name HD74LVC16374ATEL Package Type TSSOP-48 pin Package Code TTP-48DBV Package Abbreviation T Taping Abbreviation (Quantity) EL (1,000 pcs/reel) Function Table Inputs G H L L L H: L: X: Z: : Q0 : CK X L D X L H X Output Q Z L H Q0 High level Low level Immaterial High impedance Low to high transition Level of Q before the indicated steady input conditions were established. Rev.4.00 Jul. 30, 2004 page 1 of 8 HD74LVC16374A Pin Arrangement 1G 1 1Q1 2 1Q2 3 GND 4 1Q3 5 1Q4 6 VCC 7 1Q5 8 1Q6 9 GND 10 1Q7 11 1Q8 12 2Q1 13 2Q2 14 GND 15 2Q3 16 2Q4 17 VCC 18 2Q5 19 2Q6 20 GND 21 2Q7 22 2Q8 23 2G 24 G Q G Q CK D CK D G Q G Q G Q G Q G Q G Q G Q G Q G Q G Q G Q G Q G Q G Q CK D CK D CK D CK D CK D CK D CK D CK D CK D CK D CK D CK D 48 1CK 47 1D1 46 1D2 45 GND 44 1D3 43 1D4 42 VCC 41 1D5 40 1D6 39 GND 38 1D7 37 1D8 36 2D1 35 2D2 34 GND 33 2D3 32 2D4 31 VCC 30 2D5 29 2D6 28 GND 27 2D7 26 2D8 25 2CK CK D CK D (Top view) Rev.4.00 Jul. 30, 2004 page 2 of 8 HD74LVC16374A Absolute Maximum Ratings Item Supply voltage Input diode current Input voltage Output diode current Output voltage Output current VCC, GND current / pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC or IGND Tstg Ratings -0.5 to 6.0 -50 -0.5 to 6.0 -50 50 -0.5 to VCC +0.5 -0.5 to 6.0 50 100 -65 to +150 Unit V mA V mA V mA mA C Conditions VI = -0.5 V VO = -0.5 V VO = VCC +0.5 V Output "H" or "L" Output "Z" or VCC:OFF Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Input / output voltage Symbol VCC VI VO Ta IOH IOL Input rise / fall time *1 tr, tf Ratings 1.5 to 5.5 2.0 to 5.5 0 to 5.5 0 to VCC 0 to 5.5 -40 to 85 -12 -24*2 12 24*2 10 Unit V V V C mA mA ns/V Conditions Data hold At operation G, CK, D Output "H" or "L" Output "Z" or VCC:OFF VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 2.7 V VCC = 3.0 V to 5.5 V Operating temperature Output current Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. 2. Duty cycle 50% Rev.4.00 Jul. 30, 2004 page 3 of 8 HD74LVC16374A Electrical Characteristics Ta = -40 to 85C Item Input voltage Symbol VIH VIL Output voltage VOH VCC (V) 2.7 to 3.6 4.5 to 5.5 2.7 to 3.6 4.5 to 5.5 2.7 to 5.5 2.7 3.0 3.0 4.5 2.7 to 5.5 2.7 3.0 4.5 0 to 5.5 2.7 to 5.5 0 2.7 to 3.6 2.7 to 5.5 3.0 to 3.6 Min 2.0 VCCx0.7 -- -- VCC-0.2 2.2 2.4 2.2 3.8 -- -- -- -- -- -- -- -- -- -- Max -- -- 0.8 VCCx0.3 -- -- -- -- -- 0.2 0.4 0.55 0.55 5.0 5.0 20 20 20 500 Unit V V V IOH = -100 A IOH = -12 mA IOH = -24 mA V IOL = 100 A IOL = 12 mA IOL = 24 mA VIN = 5.5 V or GND VIN = VCC, GND VOUT = 5.5 V or GND VIN / VOUT = 5.5 V VIN / VOUT = 3.6 to 5.5 V VIN = VCC or GND VIN = one input at(VCC-0.6)V, other inputs at VCC or GND Test Conditions VOL Input current Off state output current Output leak current Quiescent supply current IIN IOZ IOFF ICC ICC A A A A A Rev.4.00 Jul. 30, 2004 page 4 of 8 HD74LVC16374A Switching Characteristics Ta = -40 to 85C Item Maximum clock frequency Symbol fmax VCC (V) 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 3.30.3 5.00.5 2.7 2.7 Min 80.0 100.0 125.0 -- 1.5 -- -- 1.5 -- -- 1.5 -- 2.0 2.0 2.0 1.5 1.5 1.5 3.0 3.0 3.0 -- -- -- -- -- Typ -- 150.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 3.0 15.0 Max -- -- -- 7.7 7.0 5.5 8.0 7.0 6.0 8.0 7.0 6.0 -- -- -- -- -- -- -- -- -- -- 1.0 1.0 -- -- Unit MHz From (Input) To (Output) Propagation delay time tPLH tPHL tZH tZL tHZ tLZ tsu ns CK Q Output enable time ns G Q Output disable time ns G Q Setup time ns Hold time th ns Pulse width tw ns Between output pins skew tOSLH *1 tOSHL Input capacitance Output capacitance Note: CIN CO ns pF pF 1. This parameter is characterized but not tested. tosLH = | tPLHm - tPLHn |, tosHL = | tPHLm - tPHLn | Rev.4.00 Jul. 30, 2004 page 5 of 8 HD74LVC16374A Test Circuit VCC VCC Output Input 1G, 2G 1Q1 to 2Q8 CL = 50 pF 1D1 to 2D8 S1 Vcc=2.7V, 3.30.3V Vcc=5.00.5V 500 S1 450 50 Scope Pulse Generator Zout = 50 Input See Function Table OPEN *1 See under table GND Symbol 1CK, 2CK t PLH / t PHL t su / t h / t w t ZH/ t HZ t ZL / t LZ Pulse Generator Zout = 50 OPEN GND 6V OPEN GND 2xVcc Note: 1. CL includes probe and jig capacitance. Waveforms - 1 tr Input CK 10 % tr Input D 90 % 10 % t PLH Output Q Vref 90 % 90 % Vref 10 % tf 90 % 10 % t PHL Vref VOL Vref GND VIH GND VOH tf VIH Rev.4.00 Jul. 30, 2004 page 6 of 8 HD74LVC16374A Waveforms - 2 tr Input CK 10 % tw tsu Input D Vref th VIH Vref GND 90 % 90 % Vref Vref 10 % tw tf VIH Vref GND Waveforms - 3 tf Input G 90 % Vref 10 % t ZL Waveform - A t ZH Waveform - B Vref Vref t HZ VOH - 0.3 V tr 90 % Vref 10 % t LZ VIH GND V OH1 VOL + 0.3 V VOL VOH V OL1 TEST VIH Vref VOH1 VOL1 Vcc=2.7V, 3.30.3V Vcc=5.00.5V 2.7 V 1.5 V 3V GND Vcc 50%Vcc Vcc GND Notes: 1. tr = 2.5 ns, tf = 2.5 ns 2. Input waveform : PRR = 10 MHz, duty cycle 50% 3. Waveform - A shows input conditions such that the output is "L" level when enable by the output control. 4. Waveform - B shows input conditions such that the output is "H" level when enable by the output control. Rev.4.00 Jul. 30, 2004 page 7 of 8 HD74LVC16374A Package Dimensions As of January, 2002 12.5 12.7 Max 48 25 Unit: mm 1 *0.19 0.05 0.50 24 0.08 M 8.10 0.20 0 - 8 6.10 1.0 0.65 Max *0.15 0.05 0.10 0.10 0.05 1.20 Max 0.50 0.1 *Pd plating Package Code JEDEC JEITA Mass (reference value) TTP-48DBV -- -- 0.20 g Rev.4.00 Jul. 30, 2004 page 8 of 8 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. 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