 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| PJSD05LCFN2 BI-DIRECTIONAL ESD PROTECTION DIODE This bi-directional TVS has been designed to protect sensitive equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5Vdc and below.This offers an integrated solution to protect a single data line where the board space is a premium. SPECIFICATION FEA TURES * 40W Power Dippsipation (8/20s Waveform) * Low Leakage Current, Maximum of 1 A@5Vdc * Very low Clamping voltage * IEC 61000-4-2 ESD 15kV air, 8kV Contact Compliance * In compliance with EU RoHS 2002/95/EC directivess * Terminals : Solderable per MIL-STD-750, Method 2026 * Marking : BY 2 7 5 4 DFN 2L Unit : inch(mm) * Case : DFN 2L, Plastic MAX. APPLICATIONS * Video I/O ports protection * Set Top Boxes * Portable Instrumentation 3 2 0.008(0.22) PIN NO.1 IDENTIFICATION MAXIMUM RA TINGS Rating Peak Pulse Power (8/20 s Waveform) Peak Pulse Current (8/20 s Waveform) ESD Voltage (HBM) Op e ra t i ng J unc t i o n a nd S to r a g e Te mp e r a tur e Ra ng e Symbol Value 40 4 >25 -55 to +150 2 47 5 4 Units W A kV O PPP I PPM VESD TJ,TS TG C ELECTRICAL CHARACTERISTICS (T A=25oC) Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20s) Off State Junction Capacitance Symbol VWRM VBR IR VC CJ Conditions Min. - Typ. - Max. 5.0 7.82 1.0 10 15 Units V V A V pF I BR=1mA VR=5V I PP =4A 0 Vdc Bias f=1MHz 5.78 - PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE REV.0.5-AUG.11.2009 PAGE . 1 PJSD05LCFN2 TYPICAL CHARACTERISTICS 10 100 90 9.5 Per cen t of I pp 80 70 60 50 40 30 20 10 50% of I pp@20 m s vc,v 9 8.5 Rise time 10-90%-8 m s 8 0 1 1.5 2 2.5 3 3.5 4 0 5 10 15 20 25 30 Ipk,A time, m s Clamping Voltage vs I pp 8/20 m s Surge 12 Pulse Waveform Capacitance,pF 11 10 9 8 0 1 2 3 4 5 Bias Voltage,Vdc Capacitance vs. Biasing Voltage@1MHz REV.0.5-AUG.11.2009 PAGE . 2 PJSD05LCFN2 MOUNTING PAD LAYOUT DFN 2L 0.043 (1.10) 0.017 (0.42) 0.010 (0.26) 0.028 (0.70) 0.027 (0.68) ORDER INFORMATION * Packing information T/R - 8K per 7" plastic Reel Copyright PanJit International, Inc 2009 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. REV.0.5-AUG.11.2009 PAGE . 3 |
Price & Availability of PJSD05LCFN2
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |