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19-4087; Rev 0; 5/08
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
General Description
The MAX5927A/MAX5929A-MAX5929D +1V to +15V quad hot-swap controllers provide complete protection for multisupply systems. They allow the safe insertion and removal of circuit cards into live backplanes. These devices hot swap multiple supplies ranging from +1V to +15V, provided one supply is at or above +2.7V. The input voltage rails (channels) can be configured to sequentially turn-on/off, track each other, or have completely independent operation. The discharged filter capacitors of the circuit card provide low impedance to the live backplane. High inrush currents from the backplane to the circuit card can burn up connectors and components, or momentarily collapse the backplane power supply leading to a system reset. The MAX5927A/MAX5929A-MAX5929D hot-swap controllers prevent such problems by gradually ramping up the output voltage and regulating the current to a preset limit when the board is plugged in, allowing the system to stabilize safely. After the startup cycle is complete, on-chip comparators provide VariableSpeed/BiLevelTM protection against shortcircuit and overcurrent faults, and provide immunity against system noise and load transients. The load is disconnected in the event of a fault condition. The MAX5929C/ MAX5929D automatically restart after a fault condition, while the MAX5929A/MAX5929B must be unlatched. The MAX5927A fault management mode is selectable. The MAX5927A/MAX5929A-MAX5929D offer a variety of options to reduce external component count and design time. All devices integrate an on-board charge pump to drive the gates of low-cost external n-channel MOSFETs, an adjustable startup timer, and an adjustable current limit. The devices offer integrated features like startup current regulation and current glitch protection to eliminate external timing resistors and capacitors. The MAX5929B/MAX5929D provide an open-drain, active-low status output for each channel, the MAX5929A/ MAX5929C provide an open-drain, active-high status output for each channel, and the MAX5927A status output polarity is selectable. The MAX5927A is available in a 32-pin thin QFN package and the MAX5929A-MAX5929D are available in a 24-pin QSOP package. All devices are specified over the -40C to +85C extended temperature range.
Features
o Safe Hot Swap for +1V to +15V Power Supplies with Any Input Voltage (VIN_ 2.7V) o Adjustable Circuit-Breaker/Current-Limit Threshold from 25mV to 100mV o Configurable Tracking, Sequencing, or Independent Operation Modes o VariableSpeed/BiLevel Circuit-Breaker Response o Internal Charge Pumps Generate n-Channel MOSFET Gate Drives o Inrush Current Regulated at Startup o Autoretry or Latched Fault Management o Programmable Undervoltage Lockout o Status Outputs Indicate Fault/Safe Condition
MAX5927A/MAX5929A-MAX5929D
Ordering Information
PART MAX5927AETJ+ MAX5929AEEG+ MAX5929BEEG+ MAX5929CEEG+ MAX5929DEEG+ TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 32 Thin QFN-EP* 24 QSOP 24 QSOP 24 QSOP 24 QSOP
*EP = Exposed pad. +Denotes a lead-free/RoHS-compliant package.
Selector Guide and Typical Operating Circuit appear at end of data sheet.
Pin Configurations
LIM1 MODE ON1
ON2 ON3
TOP VIEW +
IN1 SENSE1 GATE1 LIM4 IN4 SENSE4 GATE4 STAT1 1 2 3 4 5 6 7 8
ON4
POL
32
31
30
29
28
27
26
25 24 23 22 21
LIM2
IN2 SENSE2 GATE2 LIM3 N.C. IN3 SENSE3 GATE3
MAX5927A
20 19 18 17
Applications
PCI Express(R) Hot Plug Basestation Line Cards Hot Plug-In Daughter Cards Portable Computer Device Bays (Docking Stations) RAID Network Switches, Routers, Power-Supply Hubs Sequencing/Tracking VariableSpeed/BiLevel is a trademark of Maxim Integrated Products, Inc. PCI Express is a registered trademark of PCI-SIG Corp. trademark
10
11
12
13
14
STAT2
TIM
STAT4
LATCH
STAT3
BIAS
15
THIN QFN
Pin Configurations continued at end of data sheet.
1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
GND
N.C.
16
9
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.) IN_ ..........................................................................-0.3V to +16V GATE_.............................................................-0.3V to (IN_ + 6V) BIAS (Note 1) .............................................. (VIN - 0.3V) to +16V ON_, STAT_, LIM_ (MAX5927A), TIM, MODE, LATCH (MAX5927A), POL (MAX5927A) (Note 1) .....................................................-0.3V to (VIN + 0.3V) SENSE_........................................................-0.3V to (IN_ + 0.3V) Current into Any Pin..........................................................50mA Note 1: VIN is the largest of VIN1, VIN2, VIN3, and VIN4.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Continuous Power Dissipation (TA = +70C) 24-Pin QSOP (derate 9.5mW/C above +70C)............762mW 32-Pin Thin QFN (derate 21.3mW/C above +70C) ..1702mW Operating Temperature Range ...........................-40C to +85C Junction Temperature .....................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
ELECTRICAL CHARACTERISTICS
(VIN_ = +1V to +15V provided at least one supply is larger than or equal to +2.7V, TA = -40C to +85C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and TA = +25C.) (Notes 1, 2)
PARAMETER POWER SUPPLIES IN_ Input Voltage Range Supply Current CURRENT CONTROL Slow-Comparator Threshold (VIN_ - VSENSE_) (Note 3) LIM_ = GND, MAX5927A/ MAX5929A-MAX5929D (Note 4) RLIM_ = 10k (MAX5927A) RLIM_ from LIM_ to GND (MAX5927A) tSCD VFC,TH tFCD IB SENSE_ 10mV overdrive, from overload condition VSENSE_ = VIN_ 1mV overdrive 50mV overdrive 22.5 80 RLIM_ x 7.5 x 10-6 + 25mV 3 130 2x VSC,TH 200 0.03 1 ms s mV ns A 25 28 125 mV VIN_ IQ At least one VIN_ IIN1 + IIN2 + IIN3 + IIN4, VON_ = 2.7V, VIN_ = +15V, after STAT_ asserts 1.0 2.5 15 5 V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
VSC,TH
Slow-Comparator Response Time (Note 4) Fast-Comparator Threshold (VIN_ - VSENSE_) Fast-Comparator Response Time SENSE_ Input Bias Current
2
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Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +15V provided at least one supply is larger than or equal to +2.7V, TA = -40C to +85C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and TA = +25C.) (Notes 1, 2)
PARAMETER MOSFET DRIVER RTIM = 100k Startup Period (Note 5) tSTART RTIM = 4k (minimum value) TIM floating (default) Charging, VGATE_ = GND, VIN_ = 5V (Note 6) Discharging, during startup Average Gate Current IGATE Discharging, normal turn-off or triggered by the slow comparator after startup, VGATE_ = 5V, VIN_ = 10V, VON_ = 0V Discharging, triggered by a fault after startup, VGATE_ = 5V, VIN_ = 10V, (VIN_ - VSENSE_) > VFC,TH (Note 7) Gate-Drive Voltage ON COMPARATOR ON_ Threshold ON_ Propagation Delay ON_ Voltage Range ON_ Input Bias Current ON_ Pulse Width Low DIGITAL OUTPUTS (STAT_) Output Leakage Current Output Voltage Low UNDERVOLTAGE LOCKOUT (UVLO) UVLO Threshold UVLO Hysteresis UVLO Glitch Filter Reset Time UVLO to Startup Delay Input Power-Ready Threshold Input Power-Ready Hysteresis VUVLO VUVLO,HYST tD, GF tD,UVLO VPWRRDY VPWRHYST VIN < VUVLO maximum pulse width to reset Time input voltage must exceed VUVLO before startup is initiated (Note 9) 20 0.9 37.5 0.95 50 Startup is initiated when this threshold is reached by any VIN_ and VON_ > 0.9V (Note 8) 2.25 250 10 60 1.0 2.65 V mV s ms V mV VOL_ VSTAT_ 15V POL = unconnected (MAX5927A), ISINK = 1mA 1 0.4 A V VON_ IBON_ tUNLATCH VON_,TH Low to high Hysteresis 10mV overdrive Without false output inversion VON_ = VIN To unlatch after a latched fault 100 0.03 0.83 0.875 25 10 VIN 1 0.90 V mV s V A s VDRIVE VGATE_ - VIN_, IGATE_ = 1A 2 8.0 0.30 5 80 10.8 0.4 9 100 100 3 7 mA 28 4.9 50 5.3 120 5.6 V 13.6 0.55 14 125 A ms SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5927A/MAX5929A-MAX5929D
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3
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +15V provided at least one supply is larger than or equal to +2.7V, TA = -40C to +85C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and TA = +25C.) (Notes 1, 2)
PARAMETER LOGIC AND TIMING POL Input Pullup LATCH Input Pullup MODE Input Voltage Independent Mode Selection Threshold Tracking Mode Selection Threshold MODE Input Impedance Autoretry Delay IPOL ILATCH VMODE VINDEP, TH POL = GND (MAX5927A) LATCH = GND (MAX5927A) MODE unconnected (default to sequencing mode) VMODE rising 2.7 200 Delay time to restart after fault shutdown 64 x tSTART 2 2 1.0 4 4 1.25 6 6 1.5 0.4 A A V V V k ms SYMBOL CONDITIONS MIN TYP MAX UNITS
VTRACK, TH VMODE rising RMODE tRETRY
Note 2: All devices are 100% tested at TA = +85C. Limits over temperature are guaranteed by design. Note 3: The slow-comparator threshold is adjustable. VSC,TH = RLIM x 7.5A + 25mV (see the Typical Operating Characteristics). Note 4: The current-limit slow-comparator response time is weighed against the amount of overcurrent--the higher the overcurrent condition, the faster the response time (see the Typical Operating Characteristics). Note 5: The startup period (tSTART) is the time during which the slow comparator is ignored and the device acts as a current limiter by regulating the sense current with the fast comparator (see the Startup Period section). Note 6: The current available at GATE is a function of VGATE (see the Typical Operating Characteristics). Note 7: After a fault triggered by the fast comparator, the gate is discharged by the strong discharge current. Note 8: Each channel input while the other inputs are at +1V. Note 9: Each channel input while any other input is at +3.3V.
Typical Operating Characteristics
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA = +25C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable, channels 1 through 4 are referred to as W, X, Y, and Z.)
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX5927A toc01
TOTAL SUPPLY CURRENT vs. INPUT VOLTAGE
MAX5927A toc02
SUPPLY CURRENT vs. TEMPERATURE
VON_ = VINX = VINY = VINZ = 2.7V VINW = 2.8V IINW + IINX + IINY + IINZ 2.0 IIN (mA) 1.5 1.0 0.5 0 IINX + IINY + IINZ IINW
MAX5927A toc03
4 VINX = VINY = VINZ = 2.7V 3 IIN (mA)
5.0 4.5 4.0 IIN (mA) 3.5 3.0 2.5 VON = 0V IIN = IIN1 + IIN2 + IIN3 + IIN4 VIN = VINW = VINX = VINY = VINZ VON = VON1 = VON2 = VON3 = VON4
3.0 2.5
IINW + IINX + IINY + IINZ IINW
2
1 IINX + IINY + IINZ 0 0 2 4 6 8 10 12 14 VINW (V)
2.0 1.5 1.0 2 4
VON = 3.3V
6
8 VIN (V)
10
12
14
-40
-15
10
35
60
85
TEMPERATURE (C)
4
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Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA = +25C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable, channels 1 through 4 are referred to as W, X, Y, and Z.)
GATE-DRIVE VOLTAGE vs. INPUT VOLTAGE
MAX5927A toc04
MAX5927A/MAX5929A-MAX5929D
GATE CHARGE CURRENT vs. GATE VOLTAGE
VONW = VINX = VINY = VINZ = 2.7V VINW = 13.2V VINW = 5V 90
MAX5927A toc05
GATE CHARGE CURRENT vs. TEMPERATURE
VINW = 13.2V GATE CHARGE CURRENT (A) 160
MAX5927A toc06
8 VINX = VINY = VINZ = 2.7V 6 VDRIVEW (V)
150
200
GATE CHARGE CURRENT (A)
120
120 VINW = 5V 80
4
60 VINW = 1V 30
2
40 VONW = VINX = VINY = VINZ = 2.7V VGATEW = 0V
0 0 2 4 6 8 10 12 14 VINW (V)
0 0 5 10 VGATEW (V) 15 20
0 -40 -15 10 35 60 85 TEMPERATURE (C)
GATE DISCHARGE CURRENT (NORMAL) vs. GATE VOLTAGE
MAX5927A toc07
GATE DISCHARGE CURRENT (NORMAL) vs. TEMPERATURE
MAX5927A toc08
TURN-OFF TIME vs. SENSE VOLTAGE
MAX5927A toc09
6 GATE DISCHARGE CURRENT (mA) 5 4 3 2 1 0 0
6 GATE DISCHARGE CURRENT (mA) 5 4 3 VINW = 3.3V 2 1 0 VINW = 5V
VONW = 0V VINX = VINY = VINZ = 2.7V VINW = 13.2V
VONW = 0V VINX = VINY = VINZ = 2.7V VINW = 13.2V
10
1 TURN-OFF TIME (ms)
0.1 SLOW-COMPARATOR THRESHOLD FAST-COMPARATOR THRESHOLD
VINW = 5V VINW = 3.3V
0.01
0.001 VINW = 1V 0.0001 -40 -15 10 35 60 85 0 25 50
VINW = 1V 4 8 12 16 20
75
100
125
VGATEW (V)
TEMPERATURE (C)
VINW - VSENSEW (mV)
TURN-OFF TIME vs. SENSE VOLTAGE (EXPANDED SCALE)
MAX5927A toc10
SLOW-COMPARATOR THRESHOLD vs. RLIMW
MAX5927A toc11
STARTUP PERIOD vs. RTIM
MAX5927A toc12
10
120 100 80 VSC,TH (mV)
60
TURN-OFF TIME (ms)
40 tSTART (ms) 20 0 0 2 6 RLIMW (k) 4 8 10 0 100 200 300 RTIM (k) 400 500
1
60 40 20
SLOW-COMPARATOR THRESHOLD 0.1 20 25 30 35 40 45 50 VINW - VSENSEW (mV) 0
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5
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA = +25C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable, channels 1 through 4 are referred to as W, X, Y, and Z.)
TURN-OFF TIME SLOW-COMPARATOR FAULT
MAX5927A toc13
TURN-OFF TIME FAST-COMPARATOR FAULT
MAX5927A toc14
VSTATW 2V/div 0V VINW - VSENSEW 25mV/div VGATEW 5V/div 0V
VSTATW 2V/div 0V VINW - VSENSEW 100mV/div 0V VGATEW 5V/div 0V
1ms/div
100ns/div
STARTUP WAVEFORMS FAST TURN-ON (CGATE = 0nF, CBOARD = 1000F)
MAX5927A toc15
STARTUP WAVEFORMS SLOW TURN-ON (CGATE = 0.22F, CBOARD = 1000F)
VONW 5V/div VSTATW 5V/div IINW 2A/div VGATEW 10V/div VOUTW 10V/div
MAX5927A toc16
VONW 5V/div VSTATW 5V/div IINW 2A/div VGATEW 10V/div VOUTW 10V/div
2ms/div
10ms/div
AUTORETRY DELAY (TIME FLOATING)
MAX5927A toc17
TURN-ON IN VOLTAGE-TRACKING MODE
VINW 2V/div 0V VONW 2V/div VGATEX VPWRRDY
MAX5927A toc18
VGATEW 2V/div 0V VOUTW 2V/div 0V IOUTW 500mA/div 0V 100ms/div
5V/div 0V 4ms/div
VGATEW
6
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Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA = +25C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable, channels 1 through 4 are referred to as W, X, Y, and Z.)
TURN-OFF IN XXXX VOLTAGE-TRACKING MODE
MAX5927A toc19
MAX5927A/MAX5929A-MAX5929D
TURN-ON IN XXXX POWER-SEQUENCING MODE
VINW 2V/div 0V VONW 2V/div 0V VPWRRDY
MAX5927A toc20
VINW 2V/div 0V VONW 2V/div 0V VGATEX
VPWRRDY
5V/div 0V
VGATEW
5V/div 0V 4ms/div
VGATEX VGATEW
4ms/div
TURN-OFF IN XXXX POWER-SEQUENCING MODE
MAX5927A toc21
TURN-ON IN XXXX INDEPENDENT MODE
VINW 2V/div 0V VONW 2V/div 0V VGATEX
MAX5927A toc22
VINW 2V/div 0V VONW 2V/div 0V 5V/div 0V
VPWRRDY
VGATEX VGATEW 5V/div 0V VGATEW
4ms/div
4ms/div
TURN-OFF IN XXXX INDEPENDENT MODE
MAX5927A toc23
STRONG GATE DISCHARGE CURRENT vs. OVERDRIVE
VONW = VIN VGATE = 5V AFTER STARTUP VINW = 12V 30 VINW = 5V
MAX5927A toc24
50 GATE DISCHARGE CURRENT (mA)
VINW 2V/div 0V VONW 2V/div 0V 5V/div
VPWRRDY
40
VGATEX
20
VINW = 2.7V
VGATEW
10
0V 0 4ms/div 20 25 35 40 30 VIN_ - VSENSE_ (mV) 45 50
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7
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
Pin Description
PIN MAX5927A 1 2 3 4 5 6 7 8 MAX5929A- MAX5929D 4 5 6 -- 7 8 9 10 NAME FUNCTION Channel 1 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of RSENSE1. Bypass with a 0.1F capacitor to ground. Channel 1 Current-Sense Input. Connect SENSE1 to the drain of an external MOSFET and to one end of RSENSE1. Channel 1 Gate-Drive Output. Connect to gate of external n-channel MOSFET. Channel 4 Current-Limit Setting. Connect a resistor from LIM4 to GND to set current-trip level. Connect to GND for the default 25mV threshold. Do not leave unconnected. Channel 4 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of RSENSE4. Bypass with a 0.1F capacitor to ground. Channel 4 Current-Sense Input. Connect SENSE4 to the drain of an external MOSFET and to one end of RSENSE4. Channel 4 Gate-Drive Output. Connect to gate of external n-channel MOSFET. Open-Drain Status Signal for Channel 1. STAT1 asserts when hot swap is successful and tSTART has elapsed. STAT1 deasserts if ON1 is low, or if channel 1 is turned off for any fault condition. Open-Drain Status Signal for Channel 2. STAT2 asserts when hot swap is successful and tSTART has elapsed. STAT2 deasserts if ON2 is low, or if channel 2 is turned off for any fault condition. Startup Timer Setting. Connect a resistor from TIM to GND to set the startup period. Leave TIM unconnected for the default startup period of 9ms. RTIM must be between 4k and 500k. No Connection. Not internally connected. Latch/Autoretry Selection Input. Connect LATCH to GND for autoretry mode after a fault. Leave LATCH unconnected for latch mode. Open-Drain Status Signal for Channel 3. STAT3 asserts when hot swap is successful and tSTART has elapsed. STAT3 deasserts if ON3 is low, or if channel 3 is turned off for any fault condition. Open-Drain Status Signal for Channel 4. STAT4 asserts when hot swap is successful and tSTART has elapsed. STAT4 deasserts if ON4 is low, or if channel 4 is turned off for any fault condition. Supply Reference Output. The highest supply is available at BIAS for filtering. Connect a 1nF to 10nF ceramic capacitor from BIAS to GND. No other connections are allowed to this pin. Ground Channel 3 Gate-Drive Output. Connect to gate of external n-channel MOSFET. Channel 3 Current-Sense Input. Connect SENSE3 to the drain of an external MOSFET and to one end of RSENSE3. Channel 3 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of RSENSE3. Channel 3 Current-Limit Setting. Connect a resistor from LIM3 to GND to set current-trip level. Connect to GND for the default 25mV threshold. Do not leave unconnected.
IN1 SENSE1 GATE1 LIM4 IN4 SENSE4 GATE4 STAT1
9
11
STAT2
10 11, 20 12
12 -- --
TIM N.C. LATCH
13
13
STAT3
14
14
STAT4
15 16 17 18 19 21
15 16 17 18 19 --
BIAS GND GATE3 SENSE3 IN3 LIM3
8
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Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
Pin Description (continued)
PIN MAX5927A 22 23 24 25 26 27 28 29 30 31 32 EP MAX5929A- MAX5929D 20 21 22 -- 23 24 1 -- 2 3 -- -- NAME GATE2 SENSE2 IN2 LIM2 ON4 ON3 MODE POL ON2 ON1 LIM1 EP FUNCTION Channel 2 Gate-Drive Output. Connect to gate of external n-channel MOSFET. Channel 2 Current-Sense Input. Connect SENSE2 to the drain of an external MOSFET and to one end of RSENSE2. Channel 2 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of RSENSE2. Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set the currenttrip level. Connect to GND for the default 25mV threshold. Do not leave unconnected. On/Off Channel 4 Control Input. See the Mode section. On/Off Channel 3 Control Input. See the Mode section. Mode Configuration Input. Mode is configured according to Table 1 as soon as one of the IN_ voltages exceeds UVLO and before turning on OUT_. See the Mode section. STAT Output Polarity Select. See Table 3 and the Status Output section. On/Off Channel 2 Control Input. See the Mode section. On/Off Channel 1 Control Input. See the Mode section. Channel 1 Current-Limit Setting. Connect a resistor from LIM1 to GND to set the currenttrip level. Connect to GND for the default 25mV threshold. Do not leave unconnected. Exposed Pad. EP is internally connected to GND. Leave EP unconnected or connect to GND.
MAX5927A/MAX5929A-MAX5929D
Detailed Description
The MAX5927A/MAX5929A-MAX5929D are circuitbreaker ICs for hot-swap applications where a line card is inserted into a live backplane. The MAX5927A/ MAX5929A-MAX5929D operate down to 1V provided one of the inputs is at or 2.7V. Normally, when a line card is plugged into a live backplane, the card's discharged filter capacitors provide low impedance that can momentarily cause the main power supply to collapse. MAX5927A/MAX5929A-MAX5929D reside either on the backplane or on the removable card to provide inrush current limiting and short-circuit protection. This is achieved by using external n-channel MOSFETs, external current-sense resistors, and on-chip comparators. The startup period and current-limit threshold of the MAX5927A/MAX5929A-MAX5929D can be adjusted with external resistors. Figure 1 shows the MAX5927A/ MAX5929A-MAX5929D functional diagram. The MAX5927A offers four programmable current limits, selectable fault management mode, and selectable STAT_ output polarity. The MAX5929A-MAX5929D feature fixed current limits, and a variety of fault management and STAT_ polarity option combinations.
Mode
The MAX5927A/MAX5929A-MAX5929D support three modes of operation: voltage tracking, power sequencing, and independent. Select the appropriate mode according to Table 1.
Voltage-Tracking Mode Connect MODE high to enter voltage-tracking mode. While in voltage-tracking mode, all channels turn on and off together. To turn all channels on: * At least one VIN_ must exceed VUVLO (2.45V) for the UVLO to startup delay (37.5ms). * All VIN_ must exceed VPWRRDY (0.95V).
* All VON_ must exceed VON,TH (0.875V). * No faults may be present on any channel.
Table 1. Operational Mode Selection
MODE High (connect to BIAS) Unconnected GND OPERATION Voltage tracking Power sequencing Independent
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9
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
RLIM1 LIM1* IN1 VSC, TH RSENSE1 FAST COMP. SENSE1 UVLO BIAS AND REFERENCES TIMING OSCILLATOR 2.45V UVLO FAST COMP. SENSE2 VFC, TH STARTUP OSCILLATOR VFS, TH VSC, TH RSENSE2 RTIM TIM 1nF BIAS POL* LIM2* IN2 RLIM2
SLOW COMP. GATE1 Q1 OUT1 3mA/ 50mA CHARGE PUMP SLOW DISCHARGE FAST DISCHARGE 100A CURRENT CONTROL AND STARTUP LOGIC
SLOW COMP. GATE2
DEVICE CONTROL LOGIC
CURRENT CONTROL AND STARTUP LOGIC
CHARGE PUMP SLOW DISCHARGE FAST DISCHARGE 100A
Q2 OUT2 3mA/ 50mA
STAT1 LIM3* RLIM3 IN3 VSC, TH RSENSE3 FAST COMP. SENSE3 UVLO VFS, TH VFS, TH VSC, TH
STAT2 LIM4* IN4 RLIM4
MAX5927A/ MAX5929A- MAX5929D
UVLO
RSENSE4 FAST COMP. SENSE4
SLOW COMP. GATE3 Q3 OUT3 3mA/ 50mA CHARGE PUMP SLOW DISCHARGE FAST DISCHARGE 100A CURRENT CONTROL AND STARTUP LOGIC ON INPUT CONPARATORS
SLOW COMP. GATE4 CURRENT CONTROL AND STARTUP LOGIC CHARGE PUMP SLOW DISCHARGE FAST DISCHARGE 100A Q4 OUT4 3mA/ 50mA
FAULT MANAGEMENT
OPERATION MODE
*MAX5927A ONLY.
STAT3
LATCH*
ON1 ON2 ON3 ON4
MODE
STAT4
Figure 1. Functional Diagram
The MAX5927A/MAX5929A-MAX5929D turn off all channels if any of the above conditions are not met. After a fault-latched shutdown, cycle any of the ON_ inputs to unlatch and restart all channels.
Power-Sequencing Mode Leave MODE floating to enter power-sequencing mode. While in power-sequencing mode, the MAX5927A/MAX5929A-MAX5929D turn on and off
10
each channel depending on the state of the corresponding VON_. To turn on a given channel: * At least one VIN_ must exceed VUVLO (2.45V) for the UVLO to startup delay (37.5ms). * All VIN_ must exceed VPWRRDY (0.95V). * The corresponding V ON_ must exceed V ON,TH (0.875V). * No faults can be present on any channel.
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
ON1
ON2
ON3
ON4
VUVLO (2.45V) ANY IN_ VPWRRDY (0.95V)
IN2 VPWRRDY (0.95V)
IN3 VPWRRDY (0.95V)
IN4
VPWRRDY (0.95V)
OUT1* OUT2* OUT3* OUT4*
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 2. Voltage-Tracking Timing Diagram (Provided tD, UVLO Requirement is Met)
______________________________________________________________________________________ 11
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
ON1
ON2
ON3
ON4
ANY IN_
VUVLO (2.45V) VPWRRDY (0.95V)
IN2
VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
IN4
VPWRRDY (0.95V)
*
OUT1 * OUT2
* OUT3 * OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 3. Power-Sequencing Timing Diagram (Provided tD, UVLO Requirement is Met)
12 ______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
ON1 = ON2 = ON3 = ON4 OVERCURRENT FAULT CONDITION
The MAX5927A/MAX5929A-MAX5929D turn off the corresponding channel if any of the above conditions are not met. During a fault condition on a given channel only, the affected channel is disabled. After a fault-latched shutdown, recycle the corresponding ON_ inputs to unlatch and restart only the corresponding channel.
MAX5927A/MAX5929A-MAX5929D
Startup Period
* OUT1
* OUT2
RTIM sets the duration of the startup period from 0.4ms (RTIM = 4k) to 50ms (RTIM = 500k) (see the Setting the Startup Period, RTIM section). The default startup period is fixed at 9ms when TIM is floating. The startup period begins after the turn-on conditions are met as described in the Mode section, and the device is not latched or in its autoretry delay (see the Latched and Autoretry Fault Management section). The MAX5927A/MAX5929A-MAX5929D limit the load current if an overcurrent fault occurs during startup instead of completely turning off the external MOSFETs. The slow comparator is disabled during the startup period and the load current can be limited in two ways: 1) Slowly enhancing the MOSFETs by limiting the MOSFET gate-charging current. 2) Limiting the voltage across the external currentsense resistor. During the startup period, the gate-drive current is limited to 100A and decreases with the increase of the gate voltage (see the Typical Operating Characteristics). This allows the controller to slowly enhance the MOSFETs. If the fast comparator detects an overcurrent, the MAX5927A/MAX5929A-MAX5929D regulate the gate voltage to ensure that the voltage across the sense resistor does not exceed VSU,TH. This effectively regulates the inrush current during startup. Figure 6 shows the startup waveforms. STAT_ is asserted immediately after the startup period if no fault condition is present.
* OUT3
* OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 4. Power-Sequencing Fault Turn-Off
The MAX5927A/MAX5929A-MAX5929D turn off all channels if any of the above conditions are not met. After a fault-latched shutdown, cycle any of the ON_ inputs to unlatch and restart all channels, depending on the corresponding VON_ state.
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates comparators with different thresholds and response times to monitor the load current (Figure 7). During the startup period, protection is provided by limiting the load current. Protection is provided in normal operation (after the startup period has expired) by discharging the MOSFET gates with a 3mA/50mA pulldown current in response to a fault condition. After a fault, STAT_ is deasserted, the MAX5929A/MAX5929B stays latched off and the MAX5929C/MAX5929D automatically restart. Use the MAX5927A LATCH input to control whether the STAT_ outputs latch off or autoretry after a fault condition (see the Latched and Autoretry Fault Management section).
13
Independent Mode Connect MODE to GND to enter independent mode. While in independent mode, the MAX5927A/ MAX5929A-MAX5929D provide complete independent control for each channel. To turn on a given channel:
* At least one VIN_ must exceed VUVLO (2.45V) for the UVLO to startup delay (37.5ms). * The corresponding V IN_ must exceed V PWRRDY (0.95V). * The corresponding V ON_ must exceed V ON,TH (0.875V).
______________________________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
ON1
ON2
ON3
ON4
VUVLO (2.45V) IN1 VPWRRDY (0.95V)
IN2
VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
IN4
VPWRRDY (0.95V)
tD, UVLO
*
OUT1
*
OUT2
*
OUT3
*
OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 5. Independent Mode Timing Diagram
14 ______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
ON_
STAT_ tSTART VGATE_ 3ms
SLOW COMPARATOR
TURN-OFF TIME
VDRIVE VOUT_ VTH
FAST COMPARATOR
VGATE_ VOUT_ VFC,TH RSENSE_
130s CBOARD_ = LARGE CBOARD_ = 0 200ns
ILOAD_ tON
VSC,TH
VFC,TH (2 x VSC,TH)
SENSE VOLTAGE (VIN - VSENSE)
Figure 6. Independent Mode Startup Waveforms
Figure 7. VariableSpeed/BiLevel Response
Slow-Comparator Startup Period The slow comparator is disabled during the startup period while the external MOSFETs are turning on. Disabling the slow comparator allows the device to ignore the higher-than-normal inrush current charging the board capacitors when a card is first plugged into a live backplane. Slow-Comparator Normal Operation After the startup period is complete, the slow comparator is enabled and the device enters normal operation. The comparator threshold voltage (V SC,TH ) is adjustable from 25mV to 100mV. The slow-comparator response time is 3ms for a 1mV overdrive. The response time decreases to 100s with a large overdrive. The variable-speed response time allows the MAX5927A/MAX5929A-MAX5929D to ignore lowamplitude momentary glitches, thus increasing system noise immunity. After an extended overcurrent condition, a fault is generated, STAT_ outputs are deasserted, and the MOSFET gates are discharged with a 3mA pulldown current. Fast-Comparator Startup Period During the startup period, the fast comparator regulates the gate voltages to ensure that the voltage
across the sense resistor does not exceed the startup fast-comparator threshold voltage (VSU,TH), VSU,TH is scaled to two times the slow-comparator threshold (VSC,TH).
Fast-Comparator Normal Operation In normal operation, if the load current reaches the fastcomparator threshold, a fault is generated, STAT_ is deasserted, and the MOSFET gates are discharged with a strong 50mA pulldown current. This happens in the event of a serious current overload or a dead short. The fast-comparator threshold voltage (V FC,TH ) is scaled to two times the slow-comparator threshold (VSC,TH). This comparator has a fast response time of 200ns (Figure 7).
Undervoltage Lockout (UVLO)
The UVLO prevents the MAX5927A/MAX5929A- MAX5929D from turning on the external MOSFETs until one input voltage exceeds the UVLO threshold (2.45V) for t D,UVLO. The MAX5927A/MAX5929A-MAX5929D use power from the highest input voltage rail for the charge pumps. This allows for more efficient chargepump operation. The highest VIN_ is provided as an output at BIAS. The UVLO protects the external MOSFETs from an insufficient gate-drive voltage.
15
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
Table 2. Selecting Fault Management Mode (MAX5927A)
LATCH Unconnected Low FAULT MANAGEMENT Fault condition latches MOSFETs off Autoretry mode
BACKPLANE V1 V2 V3 V4 REMOVABLE CARD
Table 3. Selecting STAT_ Polarity (MAX5927A)
POL Low Unconnected Asserts low Asserts high (open drain) STAT_
ON1 ON2 ON3 ON4
ON1 ON2 ON3 ON4
tD,UVLO ensures that the board is fully inserted into the backplane and that the input voltages are stable. MAX5927A/MAX5929A-MAX5929D include a UVLO glitch filter, tD,GF, to reject all input voltage noise and transients. Bringing all input supplies below the UVLO threshold for longer than tD,GF reinitiates tD,UVLO and the startup period, tSTART. See Figure 8 for an example of automatic turn-on function.
MAX5927A MAX5929A MAX5929B MAX5929C MAX5929D
GND
GND
Latched and Autoretry Fault Management
The MAX5929A/MAX5929B always latch the external MOSFETs off when an overcurrent fault is detected, and the MAX5929C/MAX5929D are always in autoretry mode. The MAX5927A can be configured to either latch the external MOSFETs off or to autoretry (see Table 2). Toggling ON_ below 0.875V for at least 100s clears the MAX5929A/MAX5929B or MAX5927A (LATCH = unconnected) fault and reinitiates the startup period. Similarly, the MAX5929C/MAX5929D or MAX5927A (LATCH = GND) turn the external MOSFETs off when an overcurrent fault is detected, then automatically restart after the autoretry delay that is internally set to 64 times tSTART.
Figure 8. Automatic Turn-On when Input Voltages are Above their Respective Undervoltage Lockout Threshold (Provided tD,UVLO Requirement is Met)
Applications Information
Component Selection
n-Channel MOSFETs Select the external MOSFETs according to the application's current levels. Table 6 lists recommended components. The MOSFET's on-resistance (R DS(ON) ) should be chosen low enough to have a minimum voltage drop at full load to limit the MOSFET power dissipation. High RDS(ON) causes output ripple if there is a pulsating load. Determine the device power rating to accommodate a short-circuit condition on the board at startup and when the device is in autoretry mode (see the MOSFET Thermal Considerations section). Using these devices in latched mode allows the use of MOSFETs with lower power ratings. A MOSFET typically withstands single-shot pulses with higher dissipation than the specified package rating. Table 7 lists some recommended MOSFET manufacturers.
Status Outputs (STAT_)
The status (STAT_) outputs are open-drain outputs that assert when hot swap is successful and tSTART has elapsed. STAT_ deasserts if ON_ is low or if the channel is turned off for any fault condition. The polarity of the STAT_ outputs is selected using POL for the MAX5927A (see Table 3). Tables 4 and 5 contain the MAX5927A/MAX5929A-MAX5929D truth tables.
16
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
Table 4. Status Output Truth Table: Voltage-Tracking and Power-Sequencing Modes
PART CHANNEL 1 FAULT Yes X X X No Yes X X X No CHANNEL 2 FAULT X Yes X X No X Yes X X No CHANNEL 3 FAULT X X Yes X No X X Yes X No CHANNEL 4 FAULT X X X Yes No X X X Yes No STAT1/ GATE1* L/OFF L/OFF L/OFF L/OFF H/ON H/OFF H/OFF H/OFF H/OFF L/ON STAT2/ GATE2* L/OFF L/OFF L/OFF L/OFF H/ON H/OFF H/OFF H/OFF H/OFF L/ON STAT3/ GATE3* L/OFF L/OFF L/OFF L/OFF H/ON H/OFF H/OFF H/OFF H/OFF L/ON STAT4/ GATE4* L/OFF L/OFF L/OFF L/OFF H/ON H/OFF H/OFF H/OFF H/OFF L/ON
MAX5927A (POL = 1), MAX5929B/ MAX5929D
MAX5927A (POL = 0), MAX5929C/ MAX5929D
*L = Low, H = High.
Table 5. Status Output Truth Table: Independent Mode
CHANNEL 1 CHANNEL 2 CHANNEL 3 CHANNEL 4 FAULT FAULT FAULT FAULT Yes Yes Yes Yes Yes Yes Yes Yes No No No No No No No No Yes Yes Yes Yes No No No No Yes Yes Yes Yes No No No No Yes Yes No No Yes Yes No No Yes Yes No No Yes Yes No No Yes No Yes No Yes No Yes No Yes No Yes No Yes No Yes No STAT1/ GATE1 Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Asserted/ON Asserted/ON Asserted/ON Asserted/ON Asserted/ON Asserted/ON STAT2/ GATE2 Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Asserted/ON Asserted/ON Unasserted/OFF Unasserted/OFF Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Asserted/ON Asserted/ON STAT3/ GATE3 Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON Unasserted/OFF Unasserted/OFF Asserted/ON Asserted/ON STAT4/ GATE4 Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON Unasserted/OFF Asserted/ON
Note: STAT_ is asserted when hot swap is successful and tON has elapsed. STAT_ is unasserted during a fault.
______________________________________________________________________________________
17
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
Table 6. Recommended n-Channel MOSFETs
PART NUMBER IRF7413 IRF7401 IRL3502S MMSF3300 MMSF5N02H MTB60N05H FDS6670A ND8426A FDB8030L Fairchild Semiconductor On Semiconductor International Rectifier MANUFACTURER DESCRIPTION 11m, 8-pin SO, 30V 22m, 8-pin SO, 20V 6m, D2PAK, 20V 20m, 8-pin SO, 30V 30m, 8-pin SO, 20V 14m, D2PAK, 50V 10m, 8-pin SO, 30V 13.5m, 8-pin SO, 20V 4.5m, D2PAK, 30V
Table 7. Component Manufacturers
COMPONENT Sense Resistors MANUFACTURER Vishay/Dale Resistors IRC, Inc. International Rectifier MOSFETs Fairchild Semiconductor On Semiconductor PHONE 402-564-3131 361-992-7900 310-322-3331 888-522-5372 602-244-6600 WEBSITE www.vishay.com www.irctt.com www.irf.com www.fairchildsemi.com www.onsemi.com
Sense Resistor The slow-comparator threshold voltage is adjustable from 25mV to 100mV. Select a sense resistor that causes a drop equal to the slow-comparator threshold voltage at a current level above the maximum normal operating current. Typically, set the overload current at 1.2 to 1.5 times the full load current. The fast-comparator threshold is two times the slow-comparator threshold in normal operating mode. Choose the sense resistor power rating to be greater than or equal to 2 x (IOVERLOAD) x VSC,TH. Table 7 lists some recommended sense resistor manufacturers. Slow-Comparator Threshold, RLIM_ (MAX5927A) The slow-comparator threshold voltage is adjustable from 25mV to 100mV, allowing designers to fine-tune the current-limit threshold for use with standard-value sense resistors. Low slow-comparator thresholds allow for increased efficiency by reducing the power dissipated by the sense resistor. Furthermore, the low 25mV slowcomparator threshold is beneficial when operating with supply rails down to 1V because it allows a small percentage of the overall output voltage to be used for current sensing. The VariableSpeed/BiLevel fault protection feature offers inherent system immunity against load transients and noise. This allows the slow-comparator threshold to be set close to the maximum normal
operating level without experiencing nuisance faults. To adjust the slow-comparator threshold, calculate RLIM_ as follows: RLIM _ = VTH - 25mV 7.5A
where VTH is the desired slow-comparator threshold voltage. Shorting LIM_ to GND sets VTH to 25mV. Do not leave LIM_ unconnected.
Setting the Startup Period, RTIM The startup period (tSTART) is adjustable from 0.4ms to 50ms. The adjustable startup period feature allows systems to be customized for MOSFET gate capacitance and board capacitance (CBOARD). The startup period is adjusted with a resistor connected from TIM to GND (RTIM). RTIM must be between 4k and 500k. The startup period has a default value of 9ms when TIM is left unconnected. Calculate R TIM with the following equation:
RTIM = t START 128 x 800pF
where tSTART is the desired startup period.
18
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
RSENSE_ VIN_ VOUT_ CBOARD RPULLUP IN_ SENSE_ GATE_ CGATE VIN
R1 IN_ ON_ STAT_ MAX5927A MAX5929A MAX5929B MAX5929C MAX5929D GND MAX5927A MAX5929A MAX5929B MAX5929C MAX5929D VTURN-ON (R2 x R1) VON, TH R2 SENSE_ GATE_
R2
ON_
Figure 9. Operating with an External Gate Capacitor
Figure 10. Adjustable Undervoltage Lockout
Startup Sequence
There are two ways of completing the startup sequence. Case A describes a startup sequence that slowly turns on the MOSFETs by limiting the gate charge. Case B uses the current-limiting feature and turns on the MOSFETs as fast as possible while still preventing a high inrush current. The output voltage ramp-up time (tON) is determined by the longer of the two timings, case A and case B. Set the startup timer (tSTART) to be longer than tON to guarantee enough time for the output voltage to settle. Case A: Slow Turn-On (Without Current Limit) There are two ways to turn on the MOSFETs without reaching the fast-comparator current limit: * If the board capacitance (C BOARD) is small, the inrush current is low. * If the gate capacitance is high, the MOSFETs turn on slowly. In both cases, the turn-on time is determined only by the charge required to enhance the MOSFET. The small 100A gate-charging current effectively limits the output voltage dv/dt. Connecting an external capacitor between GATE and GND extends the turnon time. The time required to charge/discharge a MOSFET is as follows: t= CGATE x VGATE + QGATE IGATE
VGATE is the change in gate charge, QGATE is the MOSFET total gate charge, IGATE is the gate-charging/discharging current. In this case, the inrush current depends on the MOSFET gate-to-drain capacitance (Crss) plus any additional capacitance from GATE to GND (CGATE), and on any load current (ILOAD) present during the startup period. IINRUSH = CBOARD x IGATE + ILOAD Crss + CGATE
Example: Charging and discharging times using the Fairchild FDB7030L MOSFET If V IN1 = 5V, GATE1 charges up to 10.4V (V IN1 + VDRIVE), and therefore, VGATE = 10.4V. The manufacturer's data sheet specifies that the FDB7030L has approximately 60nC of gate charge and Crss = 600pF. The MAX5927A/MAX5929A-MAX5929D have a 100A gate-charging current and a 3mA/50mA normal/strong discharging current. CBOARD = 6F and the load does not draw any current during the startup period. With no gate capacitor, the inrush current, charge, and discharge times are:
6F x 100A + 0 = 1A 600pF + 0 0 x 10.4V + 60nC ICHARGE = = 0.6ms 100A 0 x 10.4V + 60nC tDISCHARGE = = 0.02ms 3mA 0 x 10.4V + 60nC = 1.2s tDISCHARGE(STRONG) = 50mA IINRUSH =
19
where: C GATE is the external gate to ground capacitance (Figure 9),
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
RSENSEY VY CBOARDY ON VEN OFF C1 GND GND INZ MAX5927A MAX5929A MAX5929B MAX5929C MAX5929D SENSEZ GATEZ R1 ON INY SENSEY GATEY Q1 OUTY
VZ RSENSEZ
OUTZ Q2 CBOARDZ
VEN t1 = -R1C1 ln( VONZ, TH VON
VEN - VONY, TH VEN
)
VONY, TH VY t2 = -R1C1 ln(
VEN - VONZ, TH VEN
)
VZ VEN - VONY, TH
tDELAY = -R1C1 ln(
VEN - VONZ, TH
)
t0
t1 tDELAY
t2
Figure 11. Power Sequencing: Channel Z Turns On tDELAY After Channel Y
With a 22nF gate capacitor, the inrush current, charge, and discharge times are:
6F x 100A + 0 = 26.5mA 600pF + 22nF 22nF x 10.4V + 60nC t CHARGE = = 2.89ms 100A 22nF x 10.4V + 60nC tDISCHARGE = = 0.096ms 3mA 22nF x 10.4V + 60nC = 5.8s tDISCHARGE(STRONG) = 50mA IINRUSH =
Case B: Fast Turn-On (With Current Limit) In applications where the board capacitance (CBOARD) is high, the inrush current causes a voltage drop across R SENSE that exceeds the startup fast-comparator threshold. The fast comparator regulates the voltage across the sense resistor to VFC,TH. This effectively regulates the inrush current during startup. In this case, the current charging CBOARD can be considered constant and the turn-on time is: t ON = CBOARD x VIN x RSENSE VFC,TH
20
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
The maximum inrush current in this case is: IINRUSH = VFC,TH RSENSE
POWER SUPPLY VIN VOUT CBOARD BACKPLANE
MAX5927A/MAX5929A-MAX5929D
REMOVABLE CARD WITH NO HOT-INSERTION PROTECTION
Figure 6 shows the waveforms and timing diagrams for a startup transient with current regulation (see the Typical Operating Characteristics). When operating under this condition, an external gate capacitor is not required.
IN_
SENSE_ GATE_
ON_ Comparators
The ON_ comparators control the on/off function of the MAX5927A/MAX5929A-MAX5929D. ON_ is also used to reset the fault latch (latch mode). Pull VON_ low for 100s, tUNLATCH, to reset the shutdown latch. ON_ also programs the UVLO threshold (see Figure 10). A resistive-divider between V IN_, V ON_, and GND sets the user programmable turn-on voltage. In power-sequencing mode, an RC circuit can be used at ON_ to set the delay timing (see Figure 11).
MAX5927A MAX5929A-MAX5929D ON_
Using the MAX5927A/ MAX5929A-MAX5929D on the Backplane
Using the MAX5927A/MAX5929A-MAX5929D on the backplane allows multiple cards with different input capacitance to be inserted into the same slot even if the card does not have on-board hot-swap protection. The startup period can be triggered if IN_ is connected to ON_ through a trace on the card (Figure 12).
Figure 12. Using the MAX5927A/MAX5929A-MAX5929D on a Backplane
MOSFET Thermal Considerations
During normal operation, the external MOSFETs dissipate little power. The MOSFET RDS(ON) is low when the MOSFET is fully enhanced. The power dissipated in normal operation is P D = I LOAD 2 x R DS(ON) . The most power dissipation occurs during the turn-on and turn-off transients when the MOSFETs are in their linear regions. Take into consideration the worst-case scenario of a continuous short-circuit fault, consider these two cases: 1) The single turn-on with the device latched after a fault: MAX5927A (LATCH = high or unconnected) or MAX5929A/MAX5929B. 2) The continuous autoretry after a fault: MAX5927A (LATCH = low) or MAX5929C/MAX5929D. MOSFET manufacturers typically include the package thermal resistance from junction to ambient (RJA) and thermal resistance from junction to case (RJC), which determines the startup time and the retry duty cycle (d = tSTART/(tSTART + tRETRY). Calculate the required transient thermal resistance with the following equation: Z JA(MAX) TJMAX - TA VIN x ISTART
Input Transients
The voltage at IN1, IN2, IN3, or IN4 must be above VUVLO during inrush and fault conditions. When a short-circuit condition occurs on the board, the fast comparator trips cause the external MOSFET gates to be discharged at 50mA according to the mode of operation (see the Mode section). The main system power supply must be able to sustain a temporary fault current, without dropping below the UVLO threshold of 2.45V, until the external MOSFET is completely off. If the main system power supply collapses below UVLO, the MAX5927A/MAX5929A-MAX5929D force the device to restart once the supply has recovered. The MOSFET is turned off in a very short time resulting in a high di/dt. The backplane delivering the power to the external card must have low inductance to minimize voltage transients caused by this high di/dt.
where ISTART = VSU,TH / RSENSE.
______________________________________________________________________________________
21
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers MAX5927A/MAX5929A-MAX5929D
Layout Considerations
To take full tracking advantage of the switch response time to an output fault condition, it is important to keep all traces as short as possible and to maximize the high-current trace dimensions to reduce the effect of undesirable parasitic inductance. Place the MAX5927A/MAX5929A-MAX5929D close to the card's connector. Use a ground plane to minimize impedance and inductance. Minimize the current-sense resistor trace length (<10mm), and ensure accurate current sensing with Kelvin connections (Figure 13). When the output is short circuited, the voltage drop across the external MOSFET becomes large. Hence, the power dissipation across the switch increases, as does the die temperature. An efficient way to achieve good power dissipation on a surface-mount package is to lay out two copper pads directly under the MOSFET package on both sides of the board. Connect the two pads to the ground plane through vias, and use enlarged copper mounting pads on the topside of the board.
HIGH-CURRENT PATH
SENSE RESISTOR
MAX5927A MAX5929A-MAX5929D
Figure 13. Kelvin Connection for the Current-Sense Resistors
Typical Operating Circuit
BACKPLANE V1 RSENSE2 V2 RSENSE3 V3 RSENSE4 V4 REMOVABLE CARD RSENSE1 Q1
OUT1
Q2 OUT2
Q3
OUT3
Q4
OUT4
IN4 IN3 IN2 IN1 ON1 ON2 ON3 ON4 GND LIM1* LIM2*
SENSE4 SENSE3 SENSE2 SENSE1
GATE4
GATE3
GATE2
GATE1
ON1 ON2 ON3 ON4 GND
STAT1 STAT2
MAX5927A MAX5929A-MAX5929D
LATCH* MODE LIM4* LIM3* POL* BIAS TIM
STAT3 STAT4
RLIM1**
RLIM2**
RLIM3**
RLIM4**
RLIM**
1nF 16V
*MAX5927A ONLY. **OPTIONAL COMPONENT.
22
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap Controllers/Power Sequencers
Selector Guide
PART MAX5927AETJ+ MAX5929AEEG+ MAX5929BEEG+ MAX5929CEEG+ MAX5929DEEG+ Fixed Fixed Fixed Fixed CURRENT LIMIT Programmable FAULT MANAGEMENT Selectable Latched Latched Autoretry Autoretry STAT_ POLARITY Selectable Asserted high (open drain) Asserted low Asserted high (open drain) Asserted low
MAX5927A/MAX5929A-MAX5929D
Pin Configurations (continued)
PROCESS: BiCMOS
TOP VIEW
MODE 1 ON2 2 ON1 3 IN1 4 SENSE1 5 GATE1 6 IN4 7 SENSE4 8 GATE4 9 STAT1 10 STAT2 11 TIM 12
Chip Information
+
24 ON3 23 ON4 22 IN2 21 SENSE2
MAX5929A- MAX5929D
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 24 QSOP 32 TQFN PACKAGE CODE E24-1 T3255-4 DOCUMENT NO. 21-0055 21-0140
20 GATE2 19 IN3 18 SENSE3 17 GATE3 16 GND 15 BIAS 14 STAT4 13 STAT3
QSOP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23
(c) 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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