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| 60MHz Rail-to-Rail Input-Output Operational Amplifier EL5111T The EL5111T is a high voltage rail-to-rail input-output amplifier with low power consumption. The EL5111T is a single amplifier which exhibits beyond the rail input capability, rail-to-rail output capability, and is unity gain stable. The maximum operating voltage range is from 4.5V to 19V. It can be configured for single or dual supply operation, and typically consumes only 3mA. The EL5111T has an output short circuit capability of 300mA and a continuous output current capability of 70mA. The EL5111T features a high slew rate of 100V/s, and fast settling time. Also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 60MHz (-3dB). This enables the amplifier to offer maximum dynamic range at any supply voltage. These features make the EL5111T an ideal amplifier solution for use in TFT-LCD panels as a VCOM driver or static gamma buffer, and in high speed filtering and signal conditioning applications. Other applications include battery power and portable devices, especially where low power consumption is important. The EL5111T is available in small 5 Ld TSOT package. It features a standard operational amplifier pinout. The device operates over an ambient temperature range of -40C to +85C. EL5111T Features * 60MHz (-3dB) Bandwidth * 4.5V to 19V Maximum Supply Voltage Range * 100V/s Slew Rate * 3mA Supply Current * 70mA Continuous Output Current * 300mA Output Short Circuit Current * Unity-gain Stable * Beyond the Rails Input Capability * Rail-to-rail Output Swing * Built-in Thermal Protection * -40C to +85C Ambient Temperature Range * Pb-Free (RoHS Compliant) Applications*(see page 13) * TFT-LCD Panels * VCOM Amplifiers * Static Gamma Buffers * Drivers for A/D Converters * Data Acquisition * Video Processing * Audio Processing * Active Filters * Test Equipment * Battery-powered Applications * Portable Equipment 10 VS = 5V 8 AV = 1 CL = 1.5pF 6 RL || 1k (PROBE) 4 2 0 1k GAIN (dB) -2 -4 -6 -8 -10 100k 1M 560 150 10M 100M FREQUENCY (Hz) FIGURE 1. TYPICAL TFT-LCD VCOM APPLICATION FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS RL May 27, 2010 FN6894.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL5111T Pin Configuration EL5111T (5 LD TSOT) TOP VIEW VOUT 1 VS- 2 VIN+ 3 +4 VIN5 VS+ Pin Descriptions PIN NUMBER 1 2 3 4 5 PIN NAME VOUT VSVIN+ VINVS+ Amplifier output Negative power supply Amplifier non-inverting input Amplifier inverting input Positive power supply (Reference "CIRCUIT 2") (Reference "CIRCUIT 2") FUNCTION EQUIVALENT CIRCUIT (Reference "CIRCUIT 1") VS+ VS+ VOUT VIN GND VS- VS- CIRCUIT 1 CIRCUIT 2 Ordering Information PART NUMBER (Notes 1, 2, 3) EL5111TIWTZ-T7 EL5111TIWTZ-T7A NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for EL5111T. For more information on MSL please see techbrief TB363. BDKA BDKA PART MARKING PACKAGE (Pb-Free) 5 Ld TSOT 5 Ld TSOT PKG. DWG. # MDP0049 MDP0049 2 FN6894.0 May 27, 2010 EL5111T Absolute Maximum Ratings (TA = +25C) Thermal Information Thermal Resistance (Typical) JA (C/W) JC (C/W) 5 Ld TSOT (Notes 4, 5) 215 290 Storage Temperature . . . . . . . . . . . . . . . -65C to +150C Ambient Operating Temperature . . . . . . . . . -40C to +85C Maximum Junction Temperature . . . . . . . . . . . . . . . +150C Power Dissipation . . . . . . . . . . . . . . . See Figures 32 and 33 Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Supply Voltage between VS+ and VS- . . . . . . . . . . . .+19.8V Input Voltage Range (VIN+, VIN-) . . VS- - 0.5V, VS+ + 0.5V Input Differential Voltage (VIN+ - VIN-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VS+ + 0.5V)-(VS- - 0.5V) Maximum Continuous Output Current . . . . . . . . . . .70mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . 3000V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board. See Tech Brief TB379. 5. For JC, the "case temp" location is taken at the package top center. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN CMIR CMRR AVOL VOL VOH ISC IOUT (VS+) - (VS-) IS PSRR VS+ = +5V, VS- = -5V, RL = 1k to 0V, TA = +25C, Unless Otherwise Specified. CONDITIONS MIN TYP MAX UNIT DESCRIPTION Input Offset Voltage Average Offset Voltage Drift (Note 6) Input Bias Current Input Impedance Input Capacitance Common-Mode Input Range Common-Mode Rejection Ratio Open-Loop Gain VCM = 0V VCM = 0V 5 8 2 1 2 -5.5 18 mV V/C 60 nA G pF +5.5 73 78 V dB dB For VIN from -5.5V to 5.5V -4.5V VOUT 4.5V IL = -5mA IL = +5mA VCM = 0V, Source: VOUTx short to VS-, Sink: VOUT short to VS+ 50 62 OUTPUT CHARACTERISTICS Output Swing Low Output Swing High Short-Circuit Current Output Current -4.93 -4.85 4.85 4.93 300 70 V V mA mA POWER SUPPLY PERFORMANCE Supply Voltage Range Supply Current Power Supply Rejection Ratio VCM = 0V, No load Supply is moved from 2.25V to 9.5V 60 4.5 3.1 75 19 4 V mA dB DYNAMIC PERFORMANCE SR tS BW GBWP PM Slew Rate (Note 7) Settling to +0.1% (Note 8) -3dB Bandwidth Gain-Bandwidth Product Phase Margin -4.0V VOUT 4.0V, 20% to 80% AV = +1, VOUTx= 2V step, RL = 1k || 1k (probe), CL = 1.5pF RL = 1k, CL = 1.5pF AV = -10, RF = 1k, RG = 100 RL = 1k || 1k (probe), CL = 1.5pF AV = -10, RF = 1k, RG = 100 RL = 1k || 1k (probe), CL = 1.5pF 100 85 60 32 50 V/s ns MHz MHz 3 FN6894.0 May 27, 2010 EL5111T Electrical Specifications PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN CMIR CMRR AVOL Input Offset Voltage Average Offset Voltage Drift (Note 6) Input Bias Current Input Impedance Input Capacitance Common-Mode Input Range Common-Mode Rejection Ratio Open-Loop Gain For VIN from -0.5V to 5.5V 0.5V VOUT 4.5V -0.5 45 62 68 82 VCM = 2.5V VCM = 2.5V 5 7 2 1 2 +5.5 60 18 mV V/C nA G pF V dB dB VS+ = +5V, VS- = 0V, RL = 1k to 2.5V, TA = +25C, Unless Otherwise Specified. CONDITION MIN TYP MAX UNIT DESCRIPTION OUTPUT CHARACTERISTICS VOL VOH ISC IOUT Output Swing Low Output Swing High Short-circuit Current Output Current IL = -4.2mA IL = +4.2mA VCM = 2.5V, Source: VOUT short to VS-, Sink: VOUT short to VS+ 4.85 60 4.94 110 70 150 mV V mA mA POWER SUPPLY PERFORMANCE (VS+) - (VS-) IS PSRR Supply Voltage Range Supply Current Power Supply Rejection Ratio VCM = 2.5V, No load Supply is moved from 4.5V to 19V 60 4.5 3.3 75 19 4 V mA dB DYNAMIC PERFORMANCE SR tS BW GBWP PM Slew Rate (Note 7) Settling to +0.1% (Note 8) -3dB Bandwidth Gain-Bandwidth Product Phase Margin 1V VOUT 4V, 20% to 80% AV = +1, VOUT = 2V step, RL = 1k || 1k (probe), CL = 1.5pF RL = 1k, CL = 1.5pF AV = -10, RF = 1k, RG = 100 RL = 1k || 1k (probe), CL = 1.5pF AV = -10, RF = 1k, RG = 100 RL = 1k || 1k (probe), CL = 1.5pF 75 90 60 32 50 V/s ns MHz MHz Electrical Specifications PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN CMIR CMRR AVOL VS+ = +18V, VS- = 0V, RL = 1k to 9V, TA = +25C, Unless Otherwise Specified. CONDITION MIN TYP MAX UNIT DESCRIPTION Input Offset Voltage Average Offset Voltage Drift (Note 6) Input Bias Current Input Impedance Input Capacitance Common-Mode Input Range Common-Mode Rejection Ratio Open-Loop Gain VCM = 9V 5 9 18 mV V/C VCM = 9V 2 1 2 -0.5 60 nA G pF +18.5 75 95 V dB dB For VIN from -0.5V to 18.5V 0.5V VOUT 17.5V 53 62 4 FN6894.0 May 27, 2010 EL5111T Electrical Specifications PARAMETER OUTPUT CHARACTERISTICS VOL VOH ISC IOUT Output Swing Low Output Swing High Short-circuit Current Output Current IL = -6mA IL = +6mA VCM = 9V, Source: VOUT short to VS-, Sink: VOUT short to VS+ 90 17.85 17.91 300 70 150 mV V mA mA VS+ = +18V, VS- = 0V, RL = 1k to 9V, TA = +25C, Unless Otherwise Specified. (Continued) CONDITION MIN TYP MAX UNIT DESCRIPTION POWER SUPPLY PERFORMANCE (VS+) - (VS-) IS PSRR Supply Voltage Range Supply Current Power Supply Rejection Ratio VCM = 9V, No load Supply is moved from 4.5V to 19V 60 4.5 3.4 75 19 4 V mA dB DYNAMIC PERFORMANCE SR tS BW GBWP PM NOTES: 6. Measured over -40C to +85C ambient operating temperature range. See the typical TCVOS production distribution shown in the "Typical Performance Curves" on page 6. 7. Typical slew rate is an average of the slew rates measured on the rising (20% to 80%) and the falling (80% to 20%) edges of the output signal. 8. Settling time measured as the time from when the output level crosses the final value on rising/falling edge to when the output level settles within a 0.1% error band. The range of the error band is determined by: Final Value(V)[Full Scale(V)*0.1%]. Slew Rate (Note 7) Settling to +0.1% (Note 8) -3dB Bandwidth Gain-Bandwidth Product Phase Margin 1V VOUTx 17V, 20% to 80% AV = +1, VOUT = 2V step, RL = 1k || 1k (probe), CL = 1.5pF RL = 1k, CL = 1.5pF AV = -10, RF = 1k, RG = 100 RL = 1k || 1k (probe), CL = 1.5pF AV = -10, RF = 1k, RG = 100 RL = 1k || 1k (probe), CL = 1.5pF 100 100 60 32 50 V/s ns MHz MHz 5 FN6894.0 May 27, 2010 EL5111T Typical Performance Curves 1100 VS = 5V 1000 T = +25C A 900 800 700 600 500 400 300 200 100 0 -15 -12 -9 -6 -3 0 3 6 9 12 TYPICAL PRODUCTION DISTRIBUTION 18 16 NUMBER OF DEVICES 14 12 10 8 6 4 2 0 2 6 10 14 18 22 26 30 34 VS = 5V -40C to +85C TYPICAL PRODUCTION DISTRIBUTION NUMBER OF DEVICES INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE DRIFT (|V|C) FIGURE 3. INPUT OFFSET VOLTAGE DISTRIBUTION FIGURE 4. INPUT OFFSET VOLTAGE DRIFT (TSOT) 10 INPUT OFFSET VOLTAGE (mV) INPUT BIAS CURRENT (nA) VS = 5V 5 6 VS = 5V 4 2 0 -2 -4 -6 -50 0 -5 -10 -50 0 50 100 TEMPERATURE (C) 150 0 50 100 TEMPERATURE (C) 150 FIGURE 5. INPUT OFFSET VOLTAGE vs TEMPERATURE FIGURE 6. INPUT BIAS CURRENT vs TEMPERATURE 4.95 OUTPUT HIGH VOLTAGE (V) -4.91 OUTPUT LOW VOLTAGE (V) VS = 5V IOUT = +5mA -4.92 VS = 5V IOUT = -5mA 4.93 -4.93 -4.94 4.91 -4.95 -4.96 -50 4.89 -50 0 50 100 TEMPERATURE (C) 150 0 50 100 TEMPERATURE (C) 150 FIGURE 7. OUTPUT HIGH VOLTAGE vs TEMPERATURE FIGURE 8. OUTPUT LOW VOLTAGE vs TEMPERATURE 6 FN6894.0 May 27, 2010 EL5111T Typical Performance Curves (Continued) 100 90 80 70 60 50 40 -50 80 -50 VS = 5V RL = 1k SLEW RATE (V/s) 120 VS = 5V RL = 1k OPEN LOOP GAIN (dB) 110 100 90 0 50 100 TEMPERATURE (C) 150 0 50 100 TEMPERATURE (C) 150 FIGURE 9. OPEN-LOOP GAIN vs TEMPERATURE FIGURE 10. SLEW RATE vs TEMPERATURE 3.20 SUPPLY CURRENT (mA) 4.5 SUPPLY CURRENT (mA) TA = +25C NO LOAD INPUT AT GND VS = 5V NO LOAD 3.15 INPUT AT GND 3.10 3.05 3.00 3.95 3.90 -50 4.0 3.5 3.0 2.5 2.0 2.5 0 50 100 TEMPERATURE (C) 150 3.5 4.5 5.5 6.5 7.5 8.5 9.5 SUPPLY VOLTAGE (V) FIGURE 11. SUPPLY CURRENT PER AMPLIFIER vs TEMPERATURE FIGURE 12. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE 140 140 TA = +25C RL = 1k 100 OPEN LOOP GAIN (dB) 10 SLEW RATE (V/s) 120 120 100 80 TA = +25C AV = 1 RL = 1k CL = 8pF 2 4 6 SUPPLY VOLTAGE (V) 8 80 60 60 40 40 2 4 6 SUPPLY VOLTAGE (V) 8 10 FIGURE 13. SLEW RATE vs SUPPLY VOLTAGE FIGURE 14. OPEN LOOP GAIN vs SUPPLY VOLTAGE 7 FN6894.0 May 27, 2010 EL5111T Typical Performance Curves (Continued) 100 80 60 40 20 0 -20 10 VS = 5V RF = 5k, RG = 100 RL = 1k CL = 8pF 100 1k 10k 100k 1M 10M GAIN PHASE 200 160 120 80 40 0 -40 100M 100 PHASE OPEN LOOP GAIN (dB) OPEN LOOP GAIN (dB) 80 60 40 20 0 -20 10 GAIN 160 120 80 40 0 -40 100M 200 PHASE () VS = 5V RF = 1k, RG = 100 RL = 1k || 1k (PROBE) CL = 1.5pF 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 15. OPEN LOOP GAIN AND PHASE FIGURE 16. OPEN LOOP GAIN AND PHASE 10 VS = 5V 8 AV = 1 CL = 1.5pF 6 RL || 1k (PROBE) 4 2 0 GAIN (dB) 1k 20 15 10 5 0 -5 -10 -15 100M VS = 5V AV = 1 RL = 1k 1M 10M FREQUENCY (Hz) 100M 1000pF 100pF 47pF 10pF GAIN (dB) -2 -4 -6 -8 -10 100k 1M 560 150 10M -20 100k FREQUENCY (Hz) FIGURE 17. FREQUENCY RESPONSE FOR VARIOUS RL FIGURE 18. FREQUENCY RESPONSE FOR VARIOUS CL OUTPUT IMPEDANCE () 100 VS = 5V RF = 2k RL = 50 SOURCE = 0dBm MAXIMUM OUTPUT SWING (VP-P) 1000 12 10 8 6 4 2 VS = 5V AV = 1 RL = 1k DISTORTION <1% 100k 1M FREQUENCY (Hz) 10M 100M 10 1 0.1 1k 10k 100k 1M 10M 100M 0 10k FREQUENCY (Hz) FIGURE 19. CLOSED LOOP OUTPUT IMPEDANCE FIGURE 20. MAXIMUM OUTPUT SWING vs FREQUENCY 8 FN6894.0 May 27, 2010 PHASE () EL5111T Typical Performance Curves (Continued) -30 -40 DISTORTION (dBc) 2nd HD -50 CMRR (dB) -60 -70 -80 -90 VS = 5V AV = 2 RL = 1k fIN = 1MHz 0 2 4 6 8 10 OUTPUT VOLTAGE (VOP-P) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M VS = 5V TA = +25C VINx = -10dBm 3rd HD FIGURE 21. HARMONIC DISTORTION vs VOP-P FIGURE 22. CMRR -20 PSRR(dB) -30 -40 -50 -60 -70 -80 1k 10k PSRR+ PSRR100k 1M 10M 100M VOLTAGE NOISE (nV/Hz) VS = 5V -10 TA = +25C 0 1000 TA = +25C 100 10 1 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 23. PSRR FIGURE 24. INPUT VOLTAGE NOISE SPECTRAL DENSITY 100 80 OVERSHOOT (%) 60 STEP SIZE (V) 100 1k VS = 5V TA = +25C AV = 1 RL = 1k VINx = 50mV 5 VS = 5V 4 TA = +25C AV = 1 3 R = 1k || 1k (PROBE) L 2 CL =1.5pF 1 0 -1 -2 -3 -4 40 20 0 10 -5 70 80 SETTLING TIME (ns) 90 LOAD CAPACITANCE (pF) FIGURE 25. SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE FIGURE 26. STEP SIZE vs SETTLING TIME 9 FN6894.0 May 27, 2010 EL5111T Typical Performance Curves (Continued) 6V STEP VS = 5V TA = +25C AV = 1 RL= 1k || 1k (PROBE) CL = 1.5pF 50ns/DIV 50mV/DIV 1V/DIV 100mV STEP VS = 5V TA = +25C AV = 1 RL= 1k|| 1k (PROBE) CL = 1.5pF 50ns/DIV FIGURE 27. LARGE SIGNAL TRANSIENT RESPONSE FIGURE 28. SMALL SIGNAL TRANSIENT RESPONSE FIGURE 29. BASIC TEST CIRCUIT 10 FN6894.0 May 27, 2010 EL5111T Applications Information Product Description The EL5111T is a high voltage rail-to-rail input-output amplifier with low power consumption. The EL5111T is a single amplifier which exhibits beyond the rail input capability, rail-to-rail output capability, and is unity gain stable. The EL5111T features a high slew rate of 100V/s, and fast settling time. Also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 60MHz (-3dB). This enables the amplifier to offer maximum dynamic range at any supply voltage. VS = 2.5V, TA = +25C, AV = 1, VINx = 6VP-P, RL = 1k to GND 1V/DIV OUTPUT INPUT 10s/DIV Operating Voltage, Input and Output Capability The EL5111T can operate on a single supply or dual supply configuration. The EL5111T operating voltage ranges from a minimum of 4.5V to a maximum of 19V. This range allows for a standard 5V (or 2.5V) supply voltage to dip to -10%, or a standard 18V (or 9V) to rise by +5.5% without affecting performance or reliability. The input common-mode voltage range of the EL5111T extends 500mV beyond the supply rails. Also, the EL5111T is immune to phase reversal. However, if the common mode input voltage exceeds the supply voltage by more than 0.5V, electrostatic protection diodes in the input stage of the device begin to conduct. Even though phase reversal will not occur, to maintain optimal reliability it is suggested to avoid input overvoltage conditions. Figure 30 shows the input voltage driven 500mV beyond the supply rails and the device output swinging between the supply rails. The EL5111T output typically swings to within 50mV of positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 31 shows the input and output waveforms for the device in a unity-gain configuration. Operation is from 5V supply with a 1k load connected to GND. The input is a 10VP-P sinusoid and the output voltage is approximately 9.9VP-P. Refer to the "Electrical Specifications" Table beginning on page 3 for specific device parameters. Parameter variations with operating voltage, loading and/or temperature are shown in the "Typical Performance Curves" on page 6. FIGURE 30. OPERATION WITH BEYOND-THE-RAILS INPUT VS = 5V, TA = +25C, AV = 1, VINx = 10VP-P, RL = 1k to GND INPUT 5V/DIV 10s/DIV FIGURE 31. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT Output Current The EL5111T is capable of output short circuit currents of 300mA (source and sink), and the device has built-in protection circuitry which limits the output current to 300mA (typical). To maintain maximum reliability, the continuous output current should never exceed 70mA. This 70mA limit is determined by the characteristics of the internal metal interconnects. Also, see "Power Dissipation" on page 12 for detailed information on ensuring proper device operation and reliability for temperature and load conditions. Thermal Shutdown The EL5111T has a built-in thermal protection which ensures safe operation and prevents internal damage to the device due to overheating. When the die temperature reaches +165C (typical) the device automatically shuts OFF the output by putting it in a high impedance state. When the die cools by +15C (typical) the device automatically turns ON the output by putting it in a low impedance (normal) operating state. 11 FN6894.0 May 27, 2010 OUTPUT EL5111T Driving Capacitive Loads As load capacitance increases, the -3dB bandwidth will decrease and peaking can occur. Depending on the application, it may be necessary to reduce peaking and to improve device stability. To improve device stability a snubber circuit or a series resistor may be added to the output of the EL5111T. A snubber is a shunt load consisting of a resistor in series with a capacitor. An optimized snubber can improve the phase margin and the stability of the EL5111T. The advantage of a snubber circuit is that it does not draw any DC load current or reduce the gain. Another method to reduce peaking is to add a series output resistor (typically between 1 to 10). Depending on the capacitive loading, a small value resistor may be the most appropriate choice to minimize any reduction in gain. * VOUT = Output voltage * ILOAD = Load current Device overheating can be avoided by calculating the minimum resistive load condition, RLOAD, resulting in the highest power dissipation. To find RLOAD set the two PDMAX equations equal to each other and solve for VOUT/ILOAD. Reference the package power dissipation curves, Figures 32 and 33, for further information. JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.6 POWER DISSIPATION (W) 0.5 0.4 0.3 0.2 0.1 0.0 417mW TSOT5 JA = +300C/W Power Dissipation With the high-output drive capability of the EL5111T amplifier, it is possible to exceed the +150C absolute maximum junction temperature under certain load current conditions. It is important to calculate the maximum power dissipation of the EL5111T in the application. Proper load conditions will ensure that the EL5111T junction temperature stays within a safe operating region. The maximum power dissipation allowed in a package is determined according to Equation 1: T JMAX - T AMAX P DMAX = ------------------------------------------- JA (EQ. 1) 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) FIGURE 32. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY (4-LAYER) TEST BOARD - EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 0.8 POWER DISSIPATION (W) 581mW TSOT5 JA = +215C/W 0.4 where: * TJMAX = Maximum junction temperature * TAMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation allowed The total power dissipation produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power dissipation in the IC due to the load, or: P DMAX = V S x I SMAX + ( V S + - V OUT ) x I LOAD (EQ. 2) 0.6 0.2 0.0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) when sourcing, and: P DMAX = V S x I SMAX + ( V OUT - V S - ) x I LOAD (EQ. 3) FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE when sinking, where: * VS = Total supply voltage (VS+ - VS-) * VS+ = Positive supply voltage * VS- = Negative supply voltage * ISMAX = Maximum supply current (ISMAX = EL5111T quiescent current) 12 FN6894.0 May 27, 2010 EL5111T Power Supply Bypassing and Printed Circuit Board Layout The EL5111T can provide gain at high frequency, so good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, trace lengths should be as short as possible and the power supply pins must be well bypassed to reduce any risk of oscillation. For normal single supply operation (the VS- pin is connected to ground) a 4.7F capacitor should be placed from VS+ to ground, then a parallel 0.1F capacitor should be connected as close to the amplifier as possible. One 4.7F capacitor may be used for multiple devices. For dual supply operation the same capacitor combination should be placed at each supply pin to ground. Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE 5/27/10 REVISION FN6894.0 Initial Release. CHANGE Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: EL5111T To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php 13 FN6894.0 May 27, 2010 EL5111T TSOT Package Family e1 A N 6 4 MDP0049 D TSOT PACKAGE FAMILY MILLIMETERS SYMBOL A A1 TSOT5 1.00 0.05 0.87 0.38 0.127 2.90 2.80 1.60 0.95 1.90 0.40 0.60 0.20 5 TSOT6 1.00 0.05 0.87 0.38 0.127 2.90 2.80 1.60 0.95 1.90 0.40 0.60 0.20 6 TSOT8 1.00 0.05 0.87 0.29 0.127 2.90 2.80 1.60 0.65 1.95 0.40 0.60 0.13 8 TOLERANCE Max 0.05 0.03 0.07 +0.07/-0.007 Basic Basic Basic Basic Basic 0.10 Reference Reference E1 2 3 E A2 b c 0.15 C D 2X 5 e B b NX ddd M 1 2 (N/2) 0.25 C 2X N/2 TIPS C A-B D D E E1 e e1 L L1 ddd N 0.15 C A-B 2X C D 1 3 A2 SEATING PLANE 0.10 C NX A1 (L1) H Rev. B 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. 2. Plastic interlead protrusions of 0.15mm maximum per side are not included. 3. This dimension is measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (TSOT6 AND TSOT8 only). 6. TSOT5 version has no center lead (shown as a dashed line). A GAUGE PLANE c L 4 4 0.25 For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 FN6894.0 May 27, 2010 |
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