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LRIS2K
2048-bit EEPROM tag IC at 13.56 MHz, with 64-bit UID and Password, ISO15693 and ISO18000-3 Mode 1 compliant
Preliminary Data
Features

ISO15693 standard fully compliant ISO18000-3 mode 1 standard fully compliant 13.56 MHz 7 kHz carrier frequency To Tag: 10% or 100% ASK modulation using 1/4 (26 Kbit/s) or 1/256 (1.6 Kbit/s) pulse position coding From Tag: Load modulation using Manchester coding with 423 kHz and 484 kHz subcarriers in Low (6.6 Kbit/s) or High (26 Kbit/s) data rate mode. Supports the 53Kbit/s data rate with Fast commands Internal tuning capacitor (21 pF, 23.5 pF, 28.5 pF, 97 pF) 1 000 000 Erase/Write cycles (minimum) 40 year data retention (minimum) 2048 bits EEPROM with Block Lock feature 64-bit unique identifier (UID) Electrical article surveillance (EAS) capable (software controlled) Kill function Multipassword protection Read & Write (block of 32 bits) 6 ms programming time Packages - ECOPACK(R) (RoHS compliant) UFDFPN8 (MB) 2 x 3 mm (MLP) Antenna (A7)
Inlay A1
Antenna (A6)

Wafer
April 2008
Rev 4
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www.st.com 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Contents
LRIS2K
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.1 1.2 1.3 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Initial dialogue for vicinity cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.3.1 1.3.2 1.3.3 Power transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Operating field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2 3 4 5
LRIS2K block security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Example of LRIS2K security protection . . . . . . . . . . . . . . . . . . . . . . . . 18 Communication signal from VCD to LRIS2K . . . . . . . . . . . . . . . . . . . . 19 Data rate and data coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1 5.2 5.3 5.4 Data coding mode: 1 out of 256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Data coding mode: 1 out of 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 VCD to LRIS2K frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Start of frame (SOF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6
Communications signal from LRIS2K to VCD . . . . . . . . . . . . . . . . . . . 26
6.1 6.2 6.3 Load modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Data rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7
Bit representation and coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.1 Bit coding using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.1.1 7.1.2 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.2 7.3 7.4
Bit coding using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
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8
LRIS2K to VCD frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 8.10 8.11 8.12 SOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 SOF when using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 EOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 EOF when using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9 10 11
Unique identifier (UID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Application family identifier (AFI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Data storage format identifier (DSFID) . . . . . . . . . . . . . . . . . . . . . . . . . 37
11.1 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
12 13
LRIS2K protocol description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 LRIS2K states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
13.1 13.2 13.3 13.4 Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Quiet state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Selected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
14
Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
14.1 14.2 14.3 Addressed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Non-addressed mode (general request) . . . . . . . . . . . . . . . . . . . . . . . . . 42 Select mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
15
Request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
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15.1
Request_flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
16
Response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
16.1 16.2 Response_flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Response error code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
17
Anticollision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
17.1 Request parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
18 19 20 21
Request processing by the LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Explanation of the possible cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Inventory Initiated command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Timing definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
21.1 21.2 21.3 t1: LRIS2K response delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 t2: VCD new request delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 t3: VCD new request delay in the absence of a response from the LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
22 23 24 25 26 27 28 29 30
Commands codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Lock Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Reset to Ready . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Write AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
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31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Lock AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Write DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Lock DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Get Multiple Block Security Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Kill . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Write Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Lock Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Present Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Fast Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Fast Inventory Initiated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Fast Initiate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Inventory Initiated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Initiate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Appendix A Anticollision algorithm (Informative) . . . . . . . . . . . . . . . . . . . . . . . . 97
A.1 Algorithm for pulsed slots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
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Appendix B CRC (informative) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
B.1 B.2 CRC error detection method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 CRC calculation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Appendix C Application family identifier (AFI) (informative) . . . . . . . . . . . . . . 100 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
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List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Memory block with protection status area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Protect status area organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Read / Write protection bit setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Password Control bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Password system area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 LRIS2K block security protection after power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 LRIS2K block security protection after a valid presentation of password 1 . . . . . . . . . . . . 18 10% modulation parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Response data rates. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 UID format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 CRC transmission rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 VCD request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 LRIS2K response frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 LRIS2K response depending on Request_flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 General request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Definition of request_flags 1 to 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Request_flags 5 to 8 when Bit 3 = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Request_flags 5 to 8 when Bit 3 = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 General response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Definitions of response_flags 1 to 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Response error code definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Inventory request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Example of the addition of 0-bits to an 11-bit mask value . . . . . . . . . . . . . . . . . . . . . . . . . 47 Timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Command codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Inventory request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Inventory response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Stay Quiet request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Read Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 57 Block Locking status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Read Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 57 Write Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Write Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 59 Write Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 59 Lock Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Lock Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Lock Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Select request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Select Block response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . . . . . . . . 63 Select response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Reset to Ready request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Reset to Ready response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . 64 Reset to Ready request format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Write AFI request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Write AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
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List of tables Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92. Table 93. Table 94. Table 95. Table 96. Table 97. Table 98.
LRIS2K
Write AFI response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Lock AFI request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Lock AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Lock AFI response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Write DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Write DSFID response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . 68 Write DSFID response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Lock DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Lock DSFID response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . 70 Lock DSFID response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Get System Info request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Get System Info response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . . . . . 71 Get System Info response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Get Multiple Block Security Status request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Get Multiple Block Security Status response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Block Locking status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Get Multiple Block Security Status response format when Error_flag is set . . . . . . . . . . . . 73 Kill request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Kill response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Kill response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Write Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Write Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . 77 Write Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Lock Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Protect status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Lock Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . 79 Lock Password response format when Error_flag is set. . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Present Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Present Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 81 Present Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 81 Fast Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Fast Read Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . 83 Block Locking status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Fast Read Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . 83 Fast Inventory Initiated request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Fast Inventory Initiated response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Fast Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Fast Initiate response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Inventory Initiated request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Inventory Initiated response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Initiate Initiated response format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 A1 antenna on tape, mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 A6 antenna on tape mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 A7 antenna on tape mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
8/102
LRIS2K Table 99. Table 100. Table 101. Table 102.
List of tables Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 CRC definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 AFI coding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
9/102
List of figures
LRIS2K
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Pad connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 MLP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 100% modulation waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10% modulation waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 1 out of 256 coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Detail of a time period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 1 out of 4 coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 1 out of 4 coding example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SOF to select 1 out of 256 data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SOF to select 1 out of 4 data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 EOF for either data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Logic 0, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 0, high data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 1, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 1, high data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Logic 0, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 0, low data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 1, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 1, low data rate x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Logic 0, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Logic 1, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Logic 0, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Logic 1, low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Start of frame, high data rate, one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Start of frame, high data rate, one subcarrier x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Start of frame, low data rate, one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Start of frame, low data rate, one subcarrier x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Start of frame, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Start of frame, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 End of frame, high data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, high data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, low data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, low data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 End of frame, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 End of frame, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 LRIS2K decision tree for AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 LRIS2K protocol timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 LRIS2K state transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Principle of comparison between the mask, the slot number and the UID . . . . . . . . . . . . . 48 Description of a possible anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Stay Quiet frame exchange between VCD and LRIS2K. . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Read Single Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . 58 Write Single Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . 60 Lock Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Select frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Reset to Ready frame exchange between VCD and LRIS2K. . . . . . . . . . . . . . . . . . . . . . . 64 Write AFI frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Lock AFI frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
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LRIS2K Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. Figure 55. Figure 56. Figure 57. Figure 58. Figure 59. Figure 60. Figure 61. Figure 62. Figure 63. Figure 64.
List of figures Write DSFID frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . 69 Lock DSFID frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . 70 Get System Info frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . 72 Get Multiple Block Security Status frame exchange between VCD and LRIS2K . . . . . . . . 74 Kill frame exchange between VCD and LRIS2K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Write Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . 78 Lock Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . 80 Present Password frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . 82 Fast Read Single Block frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . 84 Fast Initiate frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Initiate frame exchange between VCD and LRIS2K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 LRIS2K synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 A1 antenna on tape outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 A6 antenna on tape outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 A7 antenna on tape outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) outline . . . . . . . . 95
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Description
LRIS2K
1
Description
The LRIS2K is a contactless memory powered by the received carrier electromagnetic wave. It is a 2048-bit electrically erasable programmable memory (EEPROM). The memory is organized as 64 blocks of 32 bits. The LRIS2K is accessed via the 13.56 MHz carrier electromagnetic wave on which incoming data are demodulated from the received signal amplitude modulation (ASK: amplitude shift keying). The received ASK wave is 10% or 100% modulated with a data rate of 1.6 Kbit/s using the 1/256 pulse coding mode or a Data rate of 26 Kbit/s using the 1/4 pulse coding mode. Outgoing data are generated by the LRIS2K load variation using Manchester coding with one or two subcarrier frequencies at 423 KHz and 484 kHz. Data are transferred from the LRIS2K at 6.6 Kbit/s in low data rate mode and 26 Kbit/s high data rate mode. The LRIS2K supports the 53 Kbit/s in high data rate mode in one subcarrier frequency at 423 kHz. The LRIS2K follows the ISO 15693 recommendation for radio frequency power and signal interface. Figure 1. Pad connections
LRIS2K Power Supply Regulator 2048 bit EEPROM memory ASK Demodulator Manchester Load Modulator AC1
AC0
AI12853
Table 1.
Signal names
Signal name Function Antenna coil Antenna coil
AC1 AC0
Figure 2.
MLP connections
AC0 n/c n/c n/c 1 2 3 4 8 7 6 5 AC1 n/c n/c n/c
AI11612
1. n/c means not connected internally.
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LRIS2K
Description
1.1
Memory mapping
The LRIS2K is divided into 64 blocks of 32 bits as shown in Table 2. Each block can be individually read- and/or write-protected using a specific lock or password command. The user area consists of blocks that are always accessible. Read and Write operations are possible if the addressed block is not protected. During a Write, the 32 bits of the block are replaced by the new 32-bit value. The LRIS2K also has a 64-bit block that is used to store the 64-bit unique identifier (UID). The UID is compliant with the ISO 15963 description, and its value is used during the anticollision sequence (Inventory). This block is not accessible by the user and its value is written by ST on the production line. The LRIS2K also includes an AFI register in which the application family identifier is stored, and a DSFID register in which the data storage family identifier used in the anticollision algorithm is stored. The LRIS2K has four additional 32-bit blocks in which the Kill code and the password codes are stored. Table 2.
Add 0 1 2 3 4 5 6 7 8 0
Memory map
78 15 16 User area User area User area User area User area User area User area User area User area User area User area User area 23 24 31 Protect status 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits
60 61 62 63
User area User area User area User area
UID 0 UID 4 AFI 0 1 2 3
UID 1 UID 5 DSFID Kill code
UID 2 UID 6
UID 3 UID 7
5 bits 5 bits 5 bits 5 bits
Password code 1 Password code 2 Password code 3
13/102
Description
LRIS2K
1.2
Commands
The LRIS2K supports the following commands:

Inventory, used to perform the anticollision sequence. Stay Quiet, used to put the LRIS2K in quiet mode, where it does not respond to any inventory command. Select, used to select the LRIS2K. After this command, the LRIS2K processes all Read/Write commands with Select_flag set. Reset To Ready, used to put the LRIS2K in the ready state. Read Block, used to output the 32 bits of the selected block and its locking status. Write Block, used to write the 32-bit value in the selected block, provided that it is not locked. Lock Block, used to lock the selected block. After this command, the block cannot be modified. Write AFI, used to write the 8-bit value in the AFI register. Lock AFI, used to lock the AFI register. Write DSFID, used to write the 8-bit value in the DSFID register. Lock DSFID, used to lock the DSFID register. Get System Info, used to provide the system information value Get Multiple Block Security Status, used to send the security status of the selected block. Initiate, used to trigger the tag response to the Inventory Initiated sequence. Inventory Initiated, used to perform the anticollision sequence triggered by the Initiate command. Kill, used to definitively deactivate the tag. Write Password, used to write the 32 bits of the selected password. Lock Password, used to write the Protect Status bits of the selected block. Present Password, enables the user to present a password to unprotect the user blocks linked to this password. Fast Initiate, used to trigger the tag response to the Inventory Initiated sequence. Fast Inventory Initiated, used to perform the anticollision sequence triggered by the Initiate command. Fast Read Single Block, used to output the 32 bits of the selected block and its locking status.
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LRIS2K
Description
1.3
Initial dialogue for vicinity cards
The dialog between the vicinity coupling device (VCD) and the vicinity integrated circuit Card or VICC (LRIS2K) takes place as follows:

activation of the LRIS2K by the RF operating field of the VCD. transmission of a command by the VCD. transmission of a response by the LRIS2K.
These operations use the RF power transfer and communication signal interface described below (see Power transfer, Frequency and Operating field). This technique is called RTF (Reader Talk First).
1.3.1
Power transfer
Power is transferred to the LRIS2K by radio frequency at 13.56 MHz via coupling antennas in the LRIS2K and the VCD. The RF operating field of the VCD is transformed on the LRIS2K antenna to an AC Voltage which is rectified, filtered and internally regulated. The amplitude modulation (ASK) on this received signal is demodulated by the ASK demodulator.
1.3.2
Frequency
The ISO 15693 standard defines the carrier frequency (fC) of the operating field as 13.56 MHz 7 kHz.
1.3.3
Operating field
The LRIS2K operates continuously between Hmin and Hmax.

The minimum operating field is Hmin and has a value of 150 mA/m rms. The maximum operating field is Hmax and has a value of 5 A/m rms.
A VCD shall generate a field of at least Hmin and not exceeding Hmax in the operating volume.
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LRIS2K block security
LRIS2K
2
LRIS2K block security
The LRIS2K provides a special protection mechanism based on passwords. Each memory block of the LRIS2K can be individually protected by one out of three available passwords, and each block can also have Read/Write access conditions set. Each memory block of the LRIS2K is assigned with a Protect Status area including a Block Lock bit, two Password Control bits and two Read/Write protection bits as shown in Table 4. Table 5 describes the organization of the Protect status area which can be read using the Read Single Block and Read Multiple Block commands with the Option_flag set to `1'. Table 3.
Add 0 1 ... 0
Memory block with protection status area
78 15 16 User area User area User area 23 24 31 Protect status 5 bits 5 bits 5 bits
Table 4.
b7 0
Protect status area organization
b6 0 b5 0 b4 b3 b2 b1 b0 Read / Write protection Block Lock bits
Password Control bits
When the Block Lock bit is set to `1', for instance by issuing a Block Lock command, the 2 Read/Write protection bits (b1, b2) are used to set the Read/Write access of the block as described in Table 5. Table 5.
Block Lock 0 1 1 1 1
Read / Write protection bit setting
b2, b1 xx 00 01 10 11 Block access when password presented READ READ READ READ READ WRITE WRITE WRITE WRITE NO WRITE Block access when password not presented READ READ READ NO READ NO READ WRITE NO WRITE WRITE NO WRITE NO WRITE
The next 2 bits of the Protect Status area (b3, b4) are the Password Control bits. The value these two bits is used to link a password to the block as defined in Table 6. Table 6.
b4, b3 00 01 10 11
Password Control bits
Password The block is not protected by a Password The block is protected by the Password 1 The block is protected by the Password 2 The block is protected by the Password 3
16/102
LRIS2K
LRIS2K block security The LRIS2K password protection is organized around a dedicated set of commands plus a system area of four password blocks where the password values and the Kill code are stored. Each password block also has a Protect Status area, making it possible to set the Read / Write access right of each individual block. This system area is described in Table 7. Table 7.
Add 0 1 2 3 0
Password system area
78 15 16 Kill code Password 1 Password 2 Password 3 23 24 31 Protect status 5 bits 5 bits 5 bits 5 bits
The dedicated password commands are:
Write Password: The Write Password command is used to write a 32-bit block into the password system area. This command must be used to write or update password values and to set the kill code. After the write cycle, the password block, or the kill code, must be activated by issuing the Lock password command. Depending on the Read/Write access set in the Protect Status area, it is possible to modify a password value after issuing a valid Present Password command.
Lock Password: The Lock Password command is used to set the Protect Status area of the selected block. Bits b4 to b1 of the Protect Status are affected by the Lock Password command. The Block Lock bit, b0, is set to `1' automatically. After issuing a Lock Password command, the protection settings of the selected block are activated. The protection of a locked block cannot be changed. A Lock Password command sent to a locked block returns an error code. The Lock Password command is also used to set the Protect Status areas of the password blocks. RFU bit 8 of the Request_flag is used to select either the memory area (bit 8 = `0') or the password area (bit 8 = `1').
Present Password: The Present Password command is used to present one of the three passwords to the LRIS2K in order to modify the access rights of all the memory blocks linked to that password (Table 5) including the password itself. If the presented password is correct, the access rights remain activated until the tag is powered off or until a new Present Password command is issued.
17/102
Example of LRIS2K security protection
LRIS2K
3
Example of LRIS2K security protection
Table 8 and Table 9 show the block security protections before and after a valid Present Password command. The Table 8 shows blocks access rights of an LRIS2K after power-up. After a valid Present Password command with password 1, the memory block access is changed as given in Table 9. Table 8. LRIS2K block security protection after power-up
Protect status Add 0 0 1 2 4 78 15 16 - No Write - Write 23 24 31 b7b6b5 xxx xxx xxx xxx b4 b3 b2 b1 b0 0 0 0 0 0 1 1 1 0 0 1 1 0 1 0 1 1 1 1 1
Protection: Standard,Read Protection: Pswd 1,Read
Protection: Pswd 1,No Read - No Write Protection: Pswd 1,No Read - No Write
Table 9.
LRIS2K block security protection after a valid presentation of password 1
Protect status
Add 0 0 1 2 4
78
15 16 - No Write - Write - Write - No Write
23 24
31 b7b6b5 xxx xxx xxx xxx
b4 b3 b2 b1 b0 0 0 0 0 0 1 1 1 0 0 1 1 0 1 0 1 1 1 1 1
Protection: Standard,Read Protection: Pswd 1,Read Protection: Pswd 1,Read Protection: Pswd 1,Read
18/102
LRIS2K
Communication signal from VCD to LRIS2K
4
Communication signal from VCD to LRIS2K
Communications between the VCD and the LRIS2K takes place using the modulation principle of ASK (Amplitude Shift Keying). Two modulation indexes are used, 10% and 100%. The LRIS2K decodes both. The VCD determines which index is used. The modulation index is defined as [a - b]/[a + b] where a is the peak signal amplitude and b, the minimum signal amplitude of the carrier frequency. Depending on the choice made by the VCD, a "pause" will be created as described in Figure 3 and Figure 4. The LRIS2K is operational for any degree of modulation index from between 10% and 30%. Figure 3. 100% modulation waveform
a 105% 100% 95% 60%
5% tRFF tRFR tRFSBL t
AI06683
Table 10.
10% modulation parameters
Parameter definition 0.1 x (a - b) 0.1 x (a - b) Value max max
Symbol hr hf
19/102
Communication signal from VCD to LRIS2K Figure 4. 10% modulation waveform
LRIS2K
hf hr tRFF tRFSFL tRFR
a
b
t
AI06655
20/102
LRIS2K
Data rate and data coding
5
Data rate and data coding
The data coding implemented in the LRIS2K uses pulse position modulation. Both data coding modes that are described in the ISO15693 are supported by the LRIS2K. The selection is made by the VCD and indicated to the LRIS2K within the start of frame (SOF).
5.1
Data coding mode: 1 out of 256
The value of one single byte is represented by the position of one pause. The position of the pause on 1 of 256 successive time periods of 18.88 s (256/fC), determines the value of the byte. In this case the transmission of one byte takes 4.833 ms and the resulting data rate is 1.65 kbits/s (fC/8192). Figure 5 illustrates this pulse position modulation technique. In this figure, data E1h (225 decimal) is sent by the VCD to the LRIS2K. The pause occurs during the second half of the position of the time period that determines the value, as shown in Figure 6. A pause during the first period transmits the data value 00h. A pause during the last period transmit the data value FFh (255 decimal).
Figure 5.
1 out of 256 coding mode
9.44 s Pulse Modulated Carrier 18.88 s
01
2
3
.. . . . . . . .. . . . . . . . .. . . . . . . .
2 2 5
..................... ..................... ..................... 4.833 ms
2 5 2
2 5 3
2 5 4
2 5 5
AI06656
21/102
Data rate and data coding Figure 6. Detail of a time period
9.44 s
LRIS2K
18.88 s
Pulse Modulated Carrier
.
.
.
.
.
.
. 2 2 4 2 2 5 2 2 6
.
.
.
.
.
.
.
Time Period one of 256
AI06657
22/102
LRIS2K
Data rate and data coding
5.2
Data coding mode: 1 out of 4
The value of 2 bits is represented by the position of one pause. The position of the pause on 1 of 4 successive time periods of 18.88 s (256/fC), determines the value of the 2 bits. Four successive pairs of bits form a byte, where the least significant pair of bits is transmitted first. In this case the transmission of one byte takes 302.08 s and the resulting data rate is 26.48 Kbits/s (fC/512). Figure 7 illustrates the 1 out of 4 pulse position technique and coding. Figure 8 shows the transmission of E1h (225d - 1110 0001b) by the VCD. Figure 7. 1 out of 4 coding mode
Pulse position for "00"
9.44 s
9.44 s 75.52 s
Pulse position for "01" (1=LSB)
28.32 s
9.44 s 75.52 s
Pulse position for "10" (0=LSB)
47.20s
9.44 s
Pulse position for "11"
75.52 s
66.08 s 75.52 s
9.44 s
AI06658
Figure 8.
1 out of 4 coding example
10 00 01 11
75.52s
75.52s
75.52s
75.52s
AI06659
23/102
Data rate and data coding
LRIS2K
5.3
VCD to LRIS2K frames
Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are implemented using code violation. Unused options are reserved for future use. The LRIS2K is ready to receive a new command frame from the VCD 311.5 s (t2) after sending a response frame to the VCD. The LRIS2K takes a power-up time of 0.1 ms after being activated by the powering field. After this delay, the LRIS2K is ready to receive a command frame from the VCD.
5.4
Start of frame (SOF)
The SOF defines the data coding mode the VCD is to use for the following command frame. The SOF sequence described in Figure 9 selects the 1 out of 256 data coding mode. The SOF sequence described in Figure 10 selects the 1 out of 4 data coding mode. The EOF sequence for either coding mode is described in Figure 11. Figure 9. SOF to select 1 out of 256 data coding mode
9.44s
9.44s
37.76s
37.76s
AI06661
Figure 10. SOF to select 1 out of 4 data coding mode
9.44s
9.44s
9.44s
37.76s
37.76s
AI06660
24/102
LRIS2K Figure 11. EOF for either data coding mode
Data rate and data coding
9.44s
9.44s
37.76s
AI06662
25/102
Communications signal from LRIS2K to VCD
LRIS2K
6
Communications signal from LRIS2K to VCD
The LRIS2K has several modes defined for some parameters, owing to which it can operate in different noise environments and meet different application requirements.
6.1
Load modulation
The LRIS2K is capable of communication to the VCD via an inductive coupling area whereby the carrier is loaded to generate a subcarrier with frequency fS. The subcarrier is generated by switching a load in the LRIS2K. The load-modulated amplitude received on the VCD antenna must be of at least 10mV when measured as described in the test methods defined in International Standard ISO10373-7.
6.2
Subcarrier
The LRIS2K supports the one-subcarrier and two-subcarrier response formats. These formats are selected by the VCD using the first bit in the protocol header. When one subcarrier is used, the frequency fS1 of the subcarrier load modulation is 423.75 kHz (fC/32). When two subcarriers are used, the frequency fS1 is 423.75 kHz (fC/32), and frequency fS2 is 484.28 kHz (fC/28). When using the two-subcarrier mode, the LRIS2K generates a continuous phase relationship between fS1 and fS2.
6.3
Data rates
The LRIS2K can respond using the low or the high data rate format. The selection of the data rate is made by the VCD using the second bit in the protocol header. It also supports the x2 mode available on all the Fast commands. Table 11 shows the different data rates produced by the LRIS2K using the different response format combinations. Table 11. Response data rates
Data rate Standard commands Low Fast commands Standard commands High Fast commands One subcarrier 6.62 Kbits/s (fc/2048) 13.24 Kbits/s (fc/1024) 26.48 Kbits/s (fc/512) 52.97 Kbits/s (fc/256) Two subcarriers 6.67 Kbits/s (fc/2032) not applicable 26.69 Kbits/s (fc/508) not applicable
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LRIS2K
Bit representation and coding
7
Bit representation and coding
Data bits are encoded using Manchester coding, according to the following schemes. For the low data rate, same subcarrier frequency or frequencies is/are used, in this case the number of pulses is multiplied by 4 and all times will increase by this factor. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2.
7.1
7.1.1
Bit coding using one subcarrier
High data rate
A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 18.88 s as shown in Figure 12. Figure 12. Logic 0, high data rate
37.76s
ai12076
For the fast commands, a logic 0 starts with 4 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 9.44 s as shown in Figure 13. Figure 13. Logic 0, high data rate x2
18.88s
ai12066
A logic 1 starts with an unmodulated time of 18.88 s followed by 8 pulses at 423.75 kHz (fC/32) as shown in Figure 14. Figure 14. Logic 1, high data rate
37.76s
ai12077
For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 s followed by 4 pulses of 423.75 kHz (fC/32) as shown in Figure 15. Figure 15. Logic 1, high data rate x2
18.88s
ai12067
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Bit representation and coding
LRIS2K
7.1.2
Low data rate
A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 75.52 s as shown in Figure 16. Figure 16. Logic 0, low data rate
151.04s
ai12068
For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of 37.76 s as shown in Figure 17. Figure 17. Logic 0, low data rate x2
75.52s
ai12069
A logic 1 starts with an unmodulated time of 75.52 s followed by 32 pulses at 423.75 kHz (fC/32) as shown in Figure 18. Figure 18. Logic 1, low data rate
151.04s
ai12070
For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 s followed by 16 pulses at 423.75 kHz (fC/32) as shown in Figure 18. Figure 19. Logic 1, low data rate x2
75.52s
ai12071
28/102
LRIS2K
Bit representation and coding
7.2 7.3
Bit coding using two subcarriers High data rate
A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by 9 pulses at 484.28 kHz (fC/28) as shown in Figure 20. For the Fast commands, the x2 mode is not available. Figure 20. Logic 0, high data rate
37.46s
ai12074
A logic 1 starts with 9 pulses at 484.28 kHz (fC/28) followed by 8 pulses at 423.75 kHz (fC/32) as shown in Figure 21. For the Fast commands, the x2 mode is not available. Figure 21. Logic 1, high data rate
37.46s
ai12073
7.4
Low data rate
A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by 36 pulses at 484.28 kHz (fC/28) as shown in Figure 22. For the Fast commands, the x2 mode is not available. Figure 22. Logic 0, low data rate
149.84s
ai12072
A logic 1 starts with 36 pulses at 484.28 kHz (fC/28) followed by 32 pulses at 423.75 kHz (fC/32) as shown in Figure 23. For the Fast commands, the x2 mode is not available. Figure 23. Logic 1, low data rate
149.84s
ai12075
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LRIS2K to VCD frames
LRIS2K
8
LRIS2K to VCD frames
Frames are delimited by an SOF and an EOF. They are implemented using code violation. Unused options are reserved for future use. For the low data rate, the same subcarrier frequency or frequencies is/are used. In this case the number of pulses is multiplied by 4. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2.
8.1 8.2
SOF when using one subcarrier High data rate
The SOF includes an unmodulated time of 56.64 s, followed by 24 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 18.88 s followed by 8 pulses at 423.75 kHz as shown in Figure 24. Figure 24. Start of frame, high data rate, one subcarrier
113.28s
37.76s
ai12078
For the Fast commands, the SOF comprises an unmodulated time of 28.32 s, followed by 12 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 9.44s followed by 4 pulses at 423.75 kHz as shown in Figure 25. Figure 25. Start of frame, high data rate, one subcarrier x2
56.64s
18.88s
ai12079
30/102
LRIS2K
LRIS2K to VCD frames
8.3
Low data rate
The SOF comprises an unmodulated time of 226.56 s, followed by 96 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 75.52 s followed by 32 pulses at 423.75 kHz as shown in Figure 26. Figure 26. Start of frame, low data rate, one subcarrier
453.12s
151.04s
ai12080
For the Fast commands, the SOF comprises an unmodulated time of 113.28 s, followed by 48 pulses at 423.75 kHz (fC/32), and a logic 1 that includes an unmodulated time of 37.76 s followed by 16 pulses at 423.75 kHz as shown in Figure 27. Figure 27. Start of frame, low data rate, one subcarrier x2
226.56s
75.52s
ai12081
31/102
LRIS2K to VCD frames
LRIS2K
8.4 8.5
SOF when using two subcarriers High data rate
The SOF comprises 27 pulses at 484.28 kHz (fC/28), followed by 24 pulses at 423.75 kHz (fC/32), and a logic 1 that includes 9 pulses at 484.28 kHz followed by 8 pulses at 423.75 kHz as shown in Figure 28. For the Fast commands, the x2 mode is not available. Figure 28. Start of frame, high data rate, two subcarriers
112.39s
37.46s
ai12082
8.6
Low data rate
The SOF comprises 108 pulses at 484.28 kHz (fC/28), followed by 96 pulses at 423.75 kHz (fC/32), and a logic 1 that includes 36 pulses at 484.28 kHz followed by 32 pulses at 423.75 kHz as shown in Figure 29. For the Fast commands, the x2 mode is not available. Figure 29. Start of frame, low data rate, two subcarriers
449.56s
149.84s
ai12083
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LRIS2K
LRIS2K to VCD frames
8.7 8.8
EOF when using one subcarrier High data rate
The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and an unmodulated time of 18.88 s, followed by 24 pulses at 423.75 kHz (fC/32), and by an unmodulated time of 56.64 s as shown in Figure 30. Figure 30. End of frame, high data rate, one subcarriers
37.76s
113.28s
ai12084
For the Fast commands, the EOF comprises a logic 0 that includes 4 pulses at 423.75 kHz and an unmodulated time of 9.44 s, followed by 12 pulses at 423.75 kHz (fC/32) and an unmodulated time of 37.76 s as shown in Figure 31. Figure 31. End of frame, high data rate, one subcarriers x2
18.88s
56.64s
ai12085
8.9
Low data rate
The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and an unmodulated time of 75.52 s, followed by 96 pulses at 423.75 kHz (fC/32) and an unmodulated time of 226.56 s as shown in Figure 32. Figure 32. End of frame, low data rate, one subcarriers
151.04s
453.12s
ai12086
For the Fast commands, the EOF comprises a logic 0 that includes 16 pulses at 423.75 kHz and an unmodulated time of 37.76 s, followed by 48 pulses at 423.75 kHz (fC/32) and an unmodulated time of 113.28 s as shown in Figure 33. Figure 33. End of frame, low data rate, one subcarriers x2
75.52s
226.56s
ai12087
33/102
LRIS2K to VCD frames
LRIS2K
8.10 8.11
EOF when using two subcarriers High data rate
The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and 9 pulses at 484.28 kHz, followed by 24 pulses at 423.75 kHz (fC/32) and 27 pulses at 484.28 kHz (fC/28) as shown in Figure 34. For the Fast commands, the x2 mode is not available. Figure 34. End of frame, high data rate, two subcarriers
37.46s
112.39s
ai12088
8.12
Low data rate
The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and 36 pulses at 484.28 kHz, followed by 96 pulses at 423.75 kHz (fC/32) and 108 pulses at 484.28 kHz (fC/28) as shown in Figure 35. For the Fast commands, the x2 mode is not available. Figure 35. End of frame, low data rate, two subcarriers
149.84s
449.56s
ai12089
34/102
LRIS2K
Unique identifier (UID)
9
Unique identifier (UID)
The LRIS2Ks are uniquely identified by a 64-bit Unique Identifier (UID). This UID complies with ISO/IEC 15963 and ISO/IEC 7816-6. The UID is a read-only code and comprises:

8 MSBs with a value of E0h The IC Manufacturer code of ST 02h, on 8 bits (ISO/IEC 7816-6/AM1) a Unique Serial Number on 48 bits UID format
LSB 56 55 0xE0 0x02 48 47 Unique serial number 0
Table 12.
MSB 63
With the UID each LRIS2K can be addressed uniquely and individually during the anticollision loop and for one-to-one exchanges between a VCD and an LRIS2K.
35/102
Application family identifier (AFI)
LRIS2K
10
Application family identifier (AFI)
The AFI (application family identifier) represents the type of application targeted by the VCD and is used to identify, among all the LRIS2Ks present, only the LRIS2Ks that meet the required application criteria. Figure 36. LRIS2K decision tree for AFI
Inventory Request Received
No
AFI Flag Set ? Yes AFI value =0? Yes AFI value = Internal value ? Yes No No
Answer given by the LRIS2K to the Inventory Request
No Answer
AI13238
The AFI is programmed by the LRIS2K issuer (or purchaser) in the AFI register. Once programmed and Locked, it can no longer be modified. The most significant nibble of the AFI is used to code one specific or all application families. The least significant nibble of the AFI is used to code one specific or all application subfamilies. Subfamily codes different from 0 are proprietary. (See ISO 15693-3 documentation)
36/102
LRIS2K
Data storage format identifier (DSFID)
11
Data storage format identifier (DSFID)
The data storage format identifier indicates how the data is structured in the LRIS2K memory. The logical organization of data can be known instantly using the DSFID. It can be programmed and locked using the Write DSFID and Lock DSFID commands.
11.1
CRC
The CRC used in the LRIS2K is calculated as per the definition in ISO/IEC 13239. The initial register contents are all ones: "FFFF". The two-byte CRC are appended to each request and response, within each frame, before the EOF. The CRC is calculated on all the bytes after the SOF up to the CRC field. Upon reception of a request from the VCD, the LRIS2K verifies that the CRC value is valid. If it is invalid, the LRIS2K discards the frame and does not answer to the VCD. Upon reception of a request from the LRIS2K, it is recommended that the VCD verifies whether the CRC value is valid. If it is invalid, actions to be performed are left to the discretion of the VCD designer. The CRC is transmitted least significant byte first. Each byte is transmitted least significant bit first. Table 13. CRC transmission rules
LSByte LSBit CRC 16 (8 bits) MSBit LSBit CRC 16 (8 bits) MSByte MSBit
37/102
LRIS2K protocol description
LRIS2K
12
LRIS2K protocol description
The Transmission protocol (or simply protocol) defines the mechanism used to exchange instructions and data between the VCD and the LRIS2K, in both directions. It is based on the concept of "VCD talks first". This means that an LRIS2K will not start transmitting unless it has received and properly decoded an instruction sent by the VCD. The protocol is based on an exchange of:

a request from the VCD to the LRIS2K a response from the LRIS2K to the VCD
Each request and each request are contained in a frame. The frame delimiters (SOF, EOF) are described in Section 8: LRIS2K to VCD frames. Each request consists of:

a request SOF (see Figure 9 and Figure 10) flags a command code parameters, depending on the command application data a 2-byte CRC a request EOF (see Figure 11) an Answer SOF (see Figure 24 to Figure 29) flags parameters, depending on the command application data a 2-byte CRC an Answer EOF (see Figure 30 to Figure 35)
Each request consists of:

The protocol is bit-oriented. The number of bits transmitted in a frame is a multiple of eight (8), i.e. an integer number of bytes. A single-byte field is transmitted least significant bit (LSBit) first. A multiple-byte field is transmitted least significant byte (LSByte) first, each byte is transmitted least significant bit (LSBit) first. The setting of the flags indicates the presence of the optional fields. When the flag is set (to one), the field is present. When the flag is reset (to zero), the field is absent. Table 14. VCD request frame format
Command code Parameters Data 2-byte CRC Request EOF
Request SOF Request_flags
Table 15.
Response SOF
LRIS2K response frame format
Response _flags Parameters Data 2-byte CRC Response EOF
38/102
LRIS2K Figure 37. LRIS2K protocol timing
LRIS2K protocol description
VCD
Request frame (Table 14) Response frame (Table 15)
Request frame (Table 14) Response frame (Table 15)
LRIS2K
Timing
t1
t2
t1
t2
39/102
LRIS2K states
LRIS2K
13
LRIS2K states
An LRIS2K can be in one of 4 states:

Power-off Ready Quiet Selected
Transitions between these states are specified in Figure 38: LRIS2K state transition diagram and Table 16: LRIS2K response depending on Request_flags.
13.1
Power-off state
The LRIS2K is in the Power-off state when it does not receive enough energy from the VCD.
13.2
Ready state
The LRIS2K is in the Ready state when it receives enough energy from the VCD. When in the Ready state, the LRIS2K answers any request where the Select_flag is not set.
13.3
Quiet state
When in the Quiet state, the LRIS2K answers any request except for Inventory requests with the Address_flag set.
13.4
Selected state
In the Selected state, the LRIS2K answers any request in all modes (see Section 14: Modes):

request in Select mode with the Select_flag set request in Addressed mode if the UID matches request in Non-Addressed mode as it is the mode for general requests
40/102
LRIS2K Table 16. LRIS2K response depending on Request_flags
Address_flag Flags 1 Addressed 0 Non addressed X X X X X X
LRIS2K states
Select_flag 1 Selected 0 Non selected X
LRIS2K in Ready or Selected state (Devices in Quiet state do not answer) LRIS2K in Selected state LRIS2K in Ready, Quiet or Selected state (the device which matches the UID) Error (03h)
X
Figure 38. LRIS2K state transition diagram
Power Off In field Out of field Any other Command where Select_Flag is not set Out of field Selected
AI06681
Ready Out of field
ID ad Re se tt o re
)
e er r ) ID wh o y et D) (U ad s UI ct le re is t o ag en Se t t Fl er se ct_ diff Re ele ect( S el S
Select (UID) Quiet Stay quiet(UID)
Any other command where the Address_Flag is set AND where Inventory_Flag is not set
St
ay
y
qu
iet
(U
Any other command
1. The intention of the state transition method is that only one LRIS2K should be in the selected state at a time.
41/102
Modes
LRIS2K
14
Modes
The term "mode" refers to the mechanism used in a request to specify the set of LRIS2Ks that will answer the request.
14.1
Addressed mode
When the Address_flag is set to 1 (Addressed mode), the request contains the Unique ID (UID) of the addressed LRIS2K. Any LRIS2K that receives a request with the Address_flag set to 1 compares the received Unique ID to its own. If it matches, then the LRIS2K executes the request (if possible) and returns a request to the VCD as specified in the command description. If the UID does not match, then it remains silent.
14.2
Non-addressed mode (general request)
When the Address_flag is cleared to 0 (Non-Addressed mode), the request does not contain a Unique ID. Any LRIS2K receiving a request with the Address_flag cleared to 0 executes it and returns a request to the VCD as specified in the command description.
14.3
Select mode
When the Select_flag is set to 1 (Select mode), the request does not contain an LRIS2K Unique ID. The LRIS2K in the Selected state that receives a request with the Select_flag set to 1 executes it and returns a request to the VCD as specified in the command description. Only LRIS2Ks in the Selected state answer a request where the Select_flag set to 1. The system design ensures in theory that only one LRIS2K can be in the Select state at a time.
42/102
LRIS2K
Request format
15
Request format
The request consists of:

an SOF flags a command code parameters and data a CRC an EOF General request format
Command code Parameters Data CRC E O F
Table 17.
S O F
Request_flags
15.1
Request_flags
In a request, the "flags" field specifies the actions to be performed by the LRIS2K and whether corresponding fields are present or not. The flag field consists of eight bits. The bit 3 (Inventory_flag) of the request_flag defines the contents of the 4 MSBs (bits 5 to 8). When bit 3 is reset (0), bits 5 to 8 define the LRIS2K selection criteria. When bit 3 is set (1), bits 5 to 8 define the LRIS2K Inventory parameters. Table 18.
Bit No Bit 1
Definition of request_flags 1 to 4
Flag Level 0 1 Description A single subcarrier frequency is used by the LRIS2K Two subcarrier are used by the LRIS2K Low data rate is used High data rate is used The meaning of flags 5 to 8 is described in Table 19 The meaning of flags 5 to 8 is described in Table 20 No Protocol format extension
Subcarrier_flag(1)
Bit 2
Data_rate_flag(2)
0 1 0
Bit 3 Bit 4
Inventory_flag 1 Protocol Extension_flag 0
1. Subcarrier_flag refers to the LRIS2K-to-VCD communication. 2. Data_rate_flag refers to the LRIS2K-to-VCD communication
43/102
Request format Table 19.
Bit No
.
LRIS2K Request_flags 5 to 8 when Bit 3 = 0
Flag Select_flag(1) Level 0 1 0 Description Request is executed by any LRIS2K according to the setting of Address_flag Request is executed only by the LRIS2K in Selected state Request is not addressed. UID field is not present. The request is executed by all LRIS2Ks. Request is addressed. UID field is present. The request is executed only by the LRIS2K whose UID matches the UID specified in the request.
Bit 5
Bit 6
Address_flag(1) 1
Bit 7 Bit 8
Option_flag RFU
0 0
1. If the Select_flag is set to 1, the Address_flag is set to 0 and the UID field is not present in the request.
Table 20.
Bit No Bit 5
Request_flags 5 to 8 when Bit 3 = 1
Flag AFI_flag 1 0 AFI field is present 16 slots 1 slot Level 0 AFI field is not present Description
Bit 6 Bit 7 Bit 8
Nb_slots_flag 1 Option_flag RFU 0 0
44/102
LRIS2K
Response format
16
Response format
The request consists of:

an SOF flags parameters and data a CRC an EOF General response format
Response_flags Parameters Data CRC E O F
Table 21.
S O F
16.1
Response_flags
In a request, the flags indicate how actions have been performed by the LRIS2K and whether corresponding fields are present or not. The request_flags consist of eight bits. Table 22.
Bit No Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8
Definitions of response_flags 1 to 8
Flag Error_flag 1 RFU RFU Extension_flag RFU RFU RFU RFU 0 0 0 0 0 0 0 No extension Error detected. Error code is in the "Error" field. Level 0 No error Description
45/102
Response format
LRIS2K
16.2
Response error code
If the Error_flag is set by the LRIS2K in the request, the Error code field is present and provides information about the error that occurred. Error codes not specified in Table 23 are reserved for future use. Table 23. Response error code definition
Meaning The option is not supported Error with no information given The specified block is not available The specified block is already locked and thus cannot be locked again The specified block is locked and its contents cannot be changed. The specified block was not successfully programmed The specified block was not successfully locked
Error code 03h 0Fh 10h 11h 12h 13h 14h
46/102
LRIS2K
Anticollision
17
Anticollision
The purpose of the anticollision sequence is to inventory the LRIS2Ks present in the VCD field using their unique ID (UID). The VCD is the master of communications with one or several LRIS2Ks. It initiates LRIS2K communication by issuing the Inventory request. The LRIS2K sends its request in the determined slot or does not respond.
17.1
Request parameters
When issuing the Inventory command, the VCD:

sets the Nb_slots_flag as desired adds the mask length and the mask value after the command field The mask length is the number of significant bits of the mask value. The mask value is contained in an integer number of bytes. The mask length indicates the number of significant bits. LSB is transmitted first If the mask length is not a multiple of 8 (bits), as many 0-bits as required will be added to the mask value MSB so that the mask value is contained in an integer number of bytes The next field starts at the next byte boundary. Inventory request format
LSB Request_ flags 8 bits Command 8 bits Optional AFI 8 bits Mask length 8 bits Mask value 0 to 8 bytes CRC 16 bits EOF
Table 24.
MSB SOF
In the example of the Table 25 and Figure 39, the mask length is 11 bits. Five 0-bits are added to the mask value MSB. The 11-bit Mask and the current slot number are compared to the UID. Table 25. Example of the addition of 0-bits to an 11-bit mask value
LSB (b0) 100 1100 1111 11-bit mask value
(b15) MSB 0000 0 0-bits added
47/102
Anticollision
LRIS2K
Figure 39. Principle of comparison between the mask, the slot number and the UID
MSB LSB 0000 0100 1100 1111 b 16 bits MSB LSB 100 1100 1111 b 11 bits
Mask value received in the Inventory command
The Mask value less the padding 0s is loaded into the Tag comparator The Slot counter is calculated Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits
MSB LSB xxxx
4 bits
The Slot counter is concatened to the Mask value Nb_slots_flags = 0
MSB LSB xxxx 100 1100 1111 b 15 bits
The concatenated result is compared with the least significant bits of the Tag UID.
UID b63 b0 xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx b Bits ignored Compare
64 bits
AI06682
The AFI field is present if the AFI_flag is set. The pulse is generated according to the definition of the EOF in ISO/IEC 15693-2. The first slot starts immediately after the reception of the request EOF. To switch to the next slot, the VCD sends an EOF. The following rules and restrictions apply:

if no LRIS2K answer is detected, the VCD may switch to the next slot by sending an EOF, if one or more LRIS2K answers are detected, the VCD waits until the complete frame has been received before sending an EOF for switching to the next slot.
48/102
LRIS2K
Request processing by the LRIS2K
18
Request processing by the LRIS2K
Upon reception of a valid request, the LRIS2K performs the following algorithm:

NbS is the total number of slots (1 or 16) SN is the current slot number (0 to 15) LSB (value, n) function returns the n Less Significant Bits of value MSB (value, n) function returns the n Most Significant Bits of value "&" is the concatenation operator Slot_frame is either an SOF or an EOF
SN = 0 if (Nb_slots_flag) then NbS = 1 SN_length = 0 endif else NbS = 16 SN_length = 4 endif label1: if LSB(UID, SN_length + Mask_length) = LSB(SN,SN_length)&LSB(Mask,Mask_length) then answer to inventory request endif wait (Slot_frame) if Slot_frame = SOF then Stop Anticollision decode/process request exit endif if Slot_frame = EOF if SN < NbS-1 then SN = SN + 1 goto label1 exit endif endif
49/102
Explanation of the possible cases
LRIS2K
19
Explanation of the possible cases
Figure 40 summarizes the main possible cases that can occur during an anticollision sequence when the slot number is 16. The different steps are:

The VCD sends an Inventory request, in a frame terminated by an EOF. The number of slots is 16. LRIS2K 1 transmits its request in Slot 0. It is the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; The VCD sends an EOF in order to switch to the next slot. In slot 1, two LRIS2Ks, LRIS2K 2 and LRIS2K 3 transmit a request, thus generating a collision. The VCD records the event and remembers that a collision was detected in Slot 1. The VCD sends an EOF in order to switch to the next slot. In Slot 2, no LRIS2K transmits a request. Therefore the VCD does not detect any LRIS2K SOF and decides to switch to the next slot by sending an EOF. In slot 3, there is another collision caused by requests from LRIS2K 4 and LRIS2K 5 The VCD then decides to send a request (for instance a Read Block) to LRIS2K 1 whose UID has already been correctly received. All LRIS2Ks detect an SOF and exit the anticollision sequence. They process this request and since the request is addressed to LRIS2K 1, only LRIS2K 1 transmits a request. All LRIS2Ks are ready to receive another request. If it is an Inventory command, the slot numbering sequence restarts from 0.

Note:
The decision to interrupt the anticollision sequence is made by the VCD. It could have continued to send EOFs until Slot 16 and only then sent the request to LRIS2K 1.
50/102
LRIS2K
Slot 0
Slot 1
Slot 2
Slot 3
VCD
SOF
Inventory EOF Request EOF EOF EOF Response 2
SOF
Request to EOF LRIS2K 1
Response 4
LRIS2Ks
Response from LRIS2K 1 Response 1 Response 3 Response 5
Figure 40. Description of a possible anticollision sequence
Timing
t1
t2
t1
t2
t3
t1
t2
t1
Comment
No collision
Collision
No Response
Collision
Time
AI12885
Explanation of the possible cases
51/102
Inventory Initiated command
LRIS2K
20
Inventory Initiated command
The LRIS2K provides a special feature to improve the inventory time response of moving tags using the Initiate_flag value. This flag, controlled by the Initiate command, allows tags to answer to Inventory Initiated commands. For applications in which multiple tags are moving in front of a reader, it is possible to miss tags using the standard inventory command. The reason is that the inventory sequence has to be performed on a global tree search. For example, a tag with a particular UID value may have to wait the run of a long tree search before being inventoried. If the delay is too long, the tag may be out of the field before it has been detected. Using the Initiate command, the inventory sequence is optimized. When multiple tags are moving in front of a reader, the ones which are within the reader field will be initiated by the Initiate command. In this case, a small batch of tags will answer to the Inventory Initiated command which will optimize the time necessary to identify all the tags. When finished, the reader has to issue a new Initiate command in order to initiate a new small batch of tags which are new inside the reader field. It is also possible to reduce the inventory sequence time using the Fast Initiate and Fast Inventory Initiated commands. These commands allow the LRIS2Ks to increase their response data rate by a factor of 2, up to 53kbit/s.
52/102
LRIS2K
Timing definition
21
21.1
Timing definition
t1: LRIS2K response delay
Upon detection of the rising edge of the EOF received from the VCD, the LRIS2K waits for a time t1nom before transmitting its response to a VCD request or before switching to the next slot during an inventory process. Values of t1 are given in Table 26. The EOF is defined in Figure 11 on page 25.
21.2
t2: VCD new request delay
t2 is the time after which the VCD may send an EOF to switch to the next slot when one or more LRIS2K responses have been received during an Inventory command. It starts from the reception of the EOF from the LRIS2Ks. The EOF sent by the VCD may be either 10% or 100% modulated regardless of the modulation index used for transmitting the VCD request to the LRIS2K. t2 is also the time after which the VCD may send a new request to the LRIS2K as described in Table 37: LRIS2K protocol timing. Values of t2 are given in Table 26.
21.3
t3: VCD new request delay in the absence of a response from the LRIS2K
t3 is the time after which the VCD may send an EOF to switch to the next slot when no LRIS2K response has been received. The EOF sent by the VCD may be either 10% or 100% modulated regardless of the modulation index used for transmitting the VCD request to the LRIS2K. From the time the VCD has generated the rising edge of an EOF:

If this EOF is 100% modulated, the VCD waits a time at least equal to t3min before sending a new EOF. If this EOF is 10% modulated, the VCD waits a time at least equal to the sum of t3min + the LRIS2K nominal response time (which depends on the LRIS2K data rate and subcarrier modulation mode) before sending a new EOF. Timing values(1)
Minimum (min) values t1 t2 t3 318.6 s 309.2 s t1max
(2)
Table 26.
Nominal (nom) values 320.9 s No tnom No tnom
Maximum (max) values 323.3 s No tmax No tmax
+
tSOF(3)
1. The tolerance of specific timings is 32/fC. 2. t1max does not apply for write alike requests. Timing conditions for write alike requests are defined in the command description. 3. tSOF is the time taken by the LRIS2K to transmit an SOF to the VCD. tSOF depends on the current data rate: High data rate or Low data rate.
53/102
Commands codes
LRIS2K
22
Commands codes
The LRIS2K supports the commands described in this section. Their codes are given in Table 27. Table 27. Command codes
Function Inventory Stay Quiet Read Single Block Write Single Block Lock Block Select Reset to Ready Write AFI Lock AFI Write DSFID Lock DSFID Get System Info Get Multiple Block Security Status Command code custom A6h B1h B2h B3h C0h C1h C2h D1h D2h Kill Write password Lock Password Present Password Fast Read Single Block Fast Inventory Initiated Fast Initiate Inventory Initiated Initiate Function
Command code standard 01h 02h 20h 21h 22h 25h 26h 27h 28h 29h 2Ah 2Bh 2Ch
54/102
LRIS2K
Inventory
23
Inventory
When receiving the Inventory request, the LRIS2K runs the anticollision sequence. The Inventory_flag is set to 1. The meaning of flags 5 to 8 is shown in Table 20: Request_flags 5 to 8 when Bit 3 = 1. The request contains the:

flags Inventory command code (see Table 27: Command codes) AFI if the AFI flag is set mask length mask value CRC
The LRIS2K does not generate any answer in case of error. Table 28. Inventory request format
Optional AFI 8 bits Mask length 8 bits Mask value 0 - 64 bits CRC16 16 bits Request EOF
Request Request_flags Inventory SOF 8 bits 01h
The response contains the:

flags unique ID Inventory response format
DSFID 8 bits UID 64 bits CRC16 16 bits Response EOF
Table 29.
Response Response_ SOF flags 8 bits
During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a time t3 before sending an EOF to switch to the next slot. t3 starts from the rising edge of the request EOF sent by the VCD.

If the VCD sends a 100% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3s) + tSOF If the VCD sends a 10% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3s) + tNRT tSOF is the time required by the LRIS2K to transmit an SOF to the VCD tNRT is the nominal response time of the LRIS2K
where:

tNRT and tSOF are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation mode.
55/102
Stay Quiet
LRIS2K
24
Stay Quiet
Command code = 0x02 On receiving the Stay Quiet command, the LRIS2K enters the Quiet state and does NOT send back a request. There is NO response to the Stay Quiet command even if an error occurs. When in the Quiet state:

the LRIS2K does not process any request if the Inventory_flag is set, the LRIS2K processes any Addressed request it is reset (power off), receiving a Select request. It then goes to the Selected state, receiving a Reset to Ready request. It then goes to the Ready state. Stay Quiet request format
Request_flags 8 bits Stay Quiet 02h UID 64 bits CRC16 16 bits Request EOF
The LRIS2K exits the Quiet state when:

Table 30.
Request SOF
The Stay Quiet command must always be executed in Addressed mode (Select_flag is reset to 0 and Address_flag is set to 1). Figure 41. Stay Quiet frame exchange between VCD and LRIS2K
VCD LRIS2K Timing
SOF
Stay Quiet request
EOF
56/102
LRIS2K
Read Single Block
25
Read Single Block
On receiving the Read Single Block command, the LRIS2K reads the requested block and sends back its 32 bits value in the request. The Option_flag is supported. Table 31.
Request SOF
Read Single Block request format
Request_flags 8 bits Read Single Block 20h UID 64 bits Block number 8 bits CRC16 16 bits Request EOF
Request parameters:

Option_flag UID (optional) Block number Read Single Block response format when Error_flag is NOT set
Response_flags 8 bits Block locking status 8 bits Data 32 bits CRC16 16 bits Response EOF
Table 32.
Response SOF
Response parameters:

Block Locking Status if Option_flag is set (see Table 33: Block Locking status) 4 bytes of block data Block Locking status
b6 b5 b4 b3 b2 b1 b0 0: Current Block not locked 1: Current Block locked password control bits Read / Write protection bits
Table 33.
b7
Reserved for future use. All at 0
Table 34.
Response SOF
Read Single Block response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Response parameter:
Error code as Error_flag is set - - 0Fh: other error 10h: block address not available
57/102
Read Single Block Figure 42. Read Single Block frame exchange between VCD and LRIS2K
Read Single Block request
LRIS2K
VCD LRIS2K
SOF
EOF <-t1-> SOF Read Single Block response EOF
58/102
LRIS2K
Write Single Block
26
Write Single Block
On receiving the Write Single Block command, the LRIS2K writes the data contained in the request to the requested block and reports whether the write operation was successful in the request. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not program correctly the data into the memory. The tW time is equal to t1nom + 18 x 302 s. Table 35. Write Single Block request format
Write Single Block 21h UID 64 bits Block number 8 bits Data 32 bits CRC16 16 bits Request EOF
Request Request_ SOF flags 8 bits
Request parameters:

UID (optional) Block number Data Write Single Block response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 36.
Response SOF
Response parameter:
No parameter. The response is send back after the writing cycle. Write Single Block response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 37.
Response SOF
Response parameter:
Error code as Error_flag is set: - - - 10h: block address not available 12h: block is locked 13h: block not programmed
59/102
Write Single Block Figure 43. Write Single Block frame exchange between VCD and LRIS2K
LRIS2K
VCD LRIS2K
SOF
Write Single Block request
EOF <-t1-> SOF Write Single Block response EOF Write sequence when error
LRIS2K
<------------ tW ------------><- t1 ->
SOF
Write Single Block response
EOF
60/102
LRIS2K
Lock Block
27
Lock Block
On receiving the Lock Block command, the LRIS2K permanently locks the selected block. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not lock correctly the memory block. The tW time is equal to t1nom + 18 x 302s. Table 38. Lock Single Block request format
Lock Block 22h UID 64 bits Block number 8 bits CRC16 16 bits Request EOF
Request Request_ SOF flags 8 bits
Request parameters:

(Optional) UID Block number Lock Block response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 39.
Response SOF
Response parameter:
No parameter. Lock Block response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 40.
Response SOF
Response parameter:
Error code as Error_flag is set: - - - 10h: block address not available 11h: block is locked 14h: block not locked
61/102
Lock Block Figure 44. Lock Block frame exchange between VCD and LRIS2K
Lock Block EOF request <-t1-> SOF Lock Block response EOF
LRIS2K
VCD LRIS2K
SOF
Lock sequence when error
LRIS2K
<------------ tW ------------><- t1 -> SOF
Lock Block response
EOF
62/102
LRIS2K
Select
28
Select
When receiving the Select command:

if the UID is equal to its own UID, the LRIS2K enters or stays in the Selected state and sends a request. if the UID does not match its own, the selected LRIS2K returns to the Ready state and does not send a request.
The LRIS2K answers an error code only if the UID is equal to its own UID. If not, no response is generated. Table 41. Select request format
Select 25h UID 64 bits CRC16 16 bits Request EOF
Request Request_ SOF flags 8 bits
Request parameter:
UID Select Block response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 42.
Response SOF
Response parameter:
No parameter. Select response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 43.
Response SOF
Response parameter:
Error code as Error_flag is set: - 0Fh: other error
Figure 45. Select frame exchange between VCD and LRIS2K
VCD LRIS2K
SOF
Select request
EOF <-t1-> SOF Select response EOF
63/102
Reset to Ready
LRIS2K
29
Reset to Ready
On receiving a Reset to Ready command, the LRIS2K returns to the Ready state. In the Addressed mode, the LRIS2K answers an error code only if the UID is equal to its own UID. If not, no response is generated. Table 44. Reset to Ready request format
UID 64 bits CRC16 16 bits Request EOF
Request Request_ Reset to SOF flags Ready 8 bits 26h
Request parameter:
UID (Optional) Reset to Ready response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 45.
Response SOF
Response parameter:
No parameter Reset to Ready request format when Error_flag is set
Error code 8 bits CRC16 16 bits Response EOF
Table 46.
Response Response_ SOF flags 8 bits
Response parameter:
Error code as Error_flag is set: - 0Fh: other error
Figure 46. Reset to Ready frame exchange between VCD and LRIS2K
VCD
SOF
Reset to Ready request
EOF Reset to Ready response
LRIS2K
<-t1->
SOF
EOF
64/102
LRIS2K
Write AFI
30
Write AFI
On receiving the Write AFI request, the LRIS2K programs the 8-bit AFI value to its memory. Only bits set to `1' are programmed to the AFI Register. Bits set to `0' are not updated by the LRIS2K. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not write correctly the AFI value into the memory. The tW time is equal to t1nom + 18 x 302 s. Table 47. Write AFI request format
UID 64 bits AFI 8 bits CRC16 16 bits Request EOF
Request Request Write SOF _flags AFI 8 bits 27h
Request parameters:

UID (Optional) AFI Write AFI response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 48.
Response SOF
Response parameter:
No parameter. Write AFI response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 49.
Response SOF
Response parameter:
Error code as Error_flag is set - - 12h: block is locked 13h: block not programmed
65/102
Write AFI Figure 47. Write AFI frame exchange between VCD and LRIS2K
LRIS2K
VCD LRIS2K
SOF
Write AFI request
EOF <-t1-> SOF Write AFI response EOF Write sequence when error
LRIS2K
<------------ tW ------------><- t1 -> SOF
Write AFI response
EOF
66/102
LRIS2K
Lock AFI
31
Lock AFI
On receiving the Lock AFI request, the LRIS2K locks the AFI value permanently. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not Lock correctly the AFI value in memory. The tW time is equal to t1nom + 18 x 302 s. Table 50. Lock AFI request format
Lock AFI 28h UID 64 bits CRC16 16 bits Request EOF
Request Request_ SOF flags 8 bits
Request parameter:
UID (optional) Lock AFI response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 51.
Response SOF
Response parameter:
No parameter Lock AFI response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 52.
Response SOF
Response parameter:
Error code as Error_flag is set - - 11h: block is locked 14h: block not locked
Figure 48. Lock AFI frame exchange between VCD and LRIS2K
VCD LRIS2K
SOF
Lock AFI request
EOF <-t1-> SOF Lock AFI response EOF Lock sequence when error
LRIS2K
<------------ tW ------------><- t1 -> SOF
Lock AFI response
EOF
67/102
Write DSFID
LRIS2K
32
Write DSFID
On receiving the Write DSFID request, the LRIS2K programs the 8-bit DSFID value to its memory. Only bits set to `1' are programmed to the DSFID Register. Bits at `0' are not updated by the LRIS2K. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not write correctly the DSFID value in memory. The tW time is equal to t1nom + 18 x 302 s. Table 53. Write DSFID request format
UID 64 bits DSFID 8 bits CRC16 16 bits Request EOF
Request Request_ Write SOF flags DSFID 8 bits 29h
Request parameters:

UID (optional) DSFID Write DSFID response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 54.
Response SOF
Response parameter:
No parameter Write DSFID response format when Error_flag is set
Error code 8 bits CRC16 16 bits Response EOF
Table 55.
Response Response_flags SOF 8 bits
Response parameter:
Error code as Error_flag is set - - 12h: block is locked 13h: block not programmed
68/102
LRIS2K Figure 49. Write DSFID frame exchange between VCD and LRIS2K
Write DSFID
VCD LRIS2K
SOF
Write DSFID EOF request <-t1-> SOF Write DSFID response EOF Write sequence when error
LRIS2K
<------------ tW ------------><- t1 -> SOF
Write DSFID EOF response
69/102
Lock DSFID
LRIS2K
33
Lock DSFID
On receiving the Lock DSFID request, the LRIS2K locks the DSFID value permanently. The Option_flag is supported. During the write cycle tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not lock correctly the DSFID value in memory. The tW time is equal to t1nom + 18 x 302 s. Table 56. Lock DSFID request format
Lock DSFID 2Ah UID 64 bits CRC16 16 bits Request EOF
Request Request_ SOF flags 8 bits
Request parameter:
UID (optional) Lock DSFID response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 57.
Response SOF
Response parameter:
No parameter. Lock DSFID response format when Error_flag is set
Error code 8 bits CRC16 16 bits Response EOF
Table 58.
Response Response_flags SOF 8 bits
Response parameter:
Error code as Error_flag is set: - - 11h: block is locked 14h: block not locked
Figure 50. Lock DSFID frame exchange between VCD and LRIS2K
VCD LRIS2K
SOF
Lock DSFID EOF request <-t1-> SOF Lock DSFID response EOF Lock sequence when error
LRIS2K
<------------ tW ------------><- t1 -> SOF
Lock DSFID EOF response
70/102
LRIS2K
Get System Info
34
Get System Info
When receiving the Get System Info command, the LRIS2K sends back its information data in the request.The Option_flag is supported and must be reset to 0. The Get System Info can be issued in both Addressed and Non Addressed modes. Table 59. Get System Info request format
UID 64 bits CRC16 16 bits Request EOF
Request Request Get System SOF _flags Info 8 bits 2Bh
Request parameter:
UID (optional) Get System Info response format when Error_flag is NOT set
UID 64 bits DSFID AFI Memory IC Response CRC16 Size reference EOF
Table 60.
Response Response Information SOF _flags _flags 00h 0Fh
8 bits 8 bits 033Fh 001000xxb 16 bits
Response parameters:

Information flags set to 0Fh. DSFID, AFI, memory size and IC reference fields are present UID code on 64 bits DSFID value AFI value Memory size. The LRIS2K provides 64 blocks (3Fh) of 4 byte (03h) IC Reference. Only the 6 MSB are significant. The product code of the LRIS2K is 00 1010b=10d Get System Info response format when Error_flag is set
Response_ flags 01h Error code 0Fh CRC16 16 bits Response EOF
Table 61.
Response SOF
Response parameter:
Error code as Error_flag is set: - - 03h: Option not supported 0Fh: other error
71/102
Get System Info Figure 51. Get System Info frame exchange between VCD and LRIS2K
Get System Info request
LRIS2K
VCD LRIS2K
SOF
EOF <-t1-> SOF Get System Info response EOF
72/102
LRIS2K
Get Multiple Block Security Status
35
Get Multiple Block Security Status
When receiving the Get Multiple Block Security Status command, the LRIS2K sends back the block security status. The blocks are numbered from '00 to '3F' in the request and the value is minus one (-1) in the field. For example, a value of '06' in the "Number of blocks" field requests to return the security status of 7 blocks. Table 62. Get Multiple Block Security Status request format
First Number block of number blocks 8 bits 8 bits
Get Multiple Request Request Block SOF _flags Security Status 8 bits 2Ch
UID
CRC16
Request EOF
64 bits
16 bits
Request parameters:

NOT set
UID (optional) First block number Number of blocks Get Multiple Block Security Status response format when Error_flag is NOT set
Response_ Flags 8 bits Block locking status 8 bits(1) CRC16 16 bits Response EOF
Table 63.
Response SOF
1. Repeated as needed.
Response parameters:

Block Locking Status (see Table 64: Block Locking status) N blocks of data Block Locking status
b6 b5 b4 b3 b2 b1 b0 0: Current Block not locked 1: Current Block locked password control bits Read / Write protection bits
Table 64.
b7
Reserved for future use. All at 0
Table 65.
Response SOF
Get Multiple Block Security Status response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Response parameter:
Error code as Error_flag is set: - - 03h: Option not supported 0Fh: other error
73/102
Get Multiple Block Security Status
LRIS2K
Figure 52. Get Multiple Block Security Status frame exchange between VCD and LRIS2K
VCD LRIS2K
SOF
Get Multiple Block Security Status
EOF <-t1-> SOF Get Multiple Block EOF Security Status
74/102
LRIS2K
Kill
36
Kill
On receiving the Kill command, in the Addressed mode only, the LRIS2K compares the kill code with the data contained in the request and reports whether the operation was successful in the request. The Option_flag is supported. If the command is received in the Non Addressed or the Selected mode, the LRIS2K returns an error response. During the comparison cycle equal to tW, there should be no modulation (neither 100% nor 10%). Otherwise, the LRIS2K may not match the kill code correctly. The tW time is equal to t1nom + 18 x 302 s. After a successful Kill command, the LRIS2K is deactivated and does not interpret any other command. Table 66. Kill request format
Kill A6h IC Mfg Code 0x02 UID 64 bits Kill access 00h Kill code 32 bits CRC16 16bits Request EOF
Request Request SOF _flags 8 bits
Request parameters:

UID (optional) Kill code Kill response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 67.
Response SOF
Response parameter:
No parameter. The response is send back after the writing cycle Kill response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 68.
Response SOF
Response parameter:
Error code as Error_flag is set: - - 0Fh: other error 14h: block not locked
75/102
Kill Figure 53. Kill frame exchange between VCD and LRIS2K
LRIS2K
VCD LRIS2K
SOF Kill request EOF <-t1-> SOF Kill response EOF Kill sequence when error
LRIS2K
<------------ tW ------------><- t1 -> SOF
Kill response
EOF
76/102
LRIS2K
Write Password
37
Write Password
On receiving the Write Password command, the LRIS2K uses the data contained in the request to write the password and reports whether the operation was successful in the request. The Option_flag is supported. During the write cycle time, tW, there must be no modulation at all (neither 100% nor 10%). Otherwise, the LRIS2K may not correctly program the data into the memory. The tW time is equal to t1nom + 18 x 302 s. After a successful write, the selected password must be locked again by issuing a Lock Password command to re-activate the block protection. Prior to writing the password for a block, the Write Password command erases the Protect Status area of the block. Table 69. Write Password request format
UID 64 bits Password number 8 bits Data 32 bits CRC16 16 bits Request EOF
Request Request Write IC Mfg SOF _flags Password code 8 bits B1h 02h
Request parameters:

UID (optional) Password number (00h = Kill, 01h = Pswd1, 02h = Pswd2, 03h = Pswd3, other = Error) Data Write Password response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 70.
Response SOF
Response parameter:
32-bit password value. The response is sent back after the write cycle. Write Password response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 71.
Response SOF
Response parameter:
Error code as Error_flag is set: - - - 10h: block address not available 12h: block is locked 13h: block not programmed
77/102
Write Password Figure 54. Write Password frame exchange between VCD and LRIS2K
LRIS2K
VCD
SOF
Write Password request
EOF Write Password response Write sequence when error
LRIS2K
<-t1-> SOF
EOF
LRIS2K
<------------ tW ------------><- t1 -> SOF
Write Password response
EOF
78/102
LRIS2K
Lock Password
38
Lock Password
On receiving the Lock Password command, the LRIS2K sets the access rights and permanently locks the selected block. The Option_flag is supported. RFU bit 8 of the request_flag is used to select either the memory area (bit 8 = `0') or the password area (bit 8 = `1'). During the write cycle tW, there should be no modulation (neither 100% nor 10%) otherwise, the LRIS2K may not correctly lock the memory block. The tW time is equal to t1nom + 18 x 302 s. Table 72. Lock Password request format
UID 64 bits Block Protect Request CRC16 number Status EOF 8 bits 8 bits 16 bits
Request Request Lock IC Mfg SOF _flags Password code 8 bits B2h 02h
Request parameters:

(Optional) UID Block number (bit 8 = `1': 00h = Kill, 01h = Pswd1, 02h = Pswd2, 03h = Pswd3, other = Error) Protect status (refer to Table 73) Protect status
b6 0 b5 0 b4 b3 b2 b1 b0 1 Read / Write protection bits
Table 73.
b7 0
password control bits
Table 74.
Response SOF
Lock Password response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Response parameter:
No parameter. Lock Password response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 75.
Response SOF
Response parameter:
Error code as Error_flag is set: - - - 10h: block address not available 11h: block is locked 14: block not locked
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Lock Password Figure 55. Lock Password frame exchange between VCD and LRIS2K
LRIS2K
VCD
SOF
Lock Password request
EOF Lock Password response Lock sequence when error
LRIS2K
<-t1-> SOF
EOF
LRIS2K
<------------ tW ------------><- t1 -> SOF
Lock Password response
EOF
80/102
LRIS2K
Present Password
39
Present Password
On receiving the Present Password command, the LRIS2K compares the requested password with the data contained in the request and reports whether the operation has been successful in the request. The Option_flag is supported. During the comparison cycle equal to tW, there should be no modulation (neither 100% nor 10%) otherwise, the LRIS2K the Password value may not be correctly compared. The tW time is equal to t1nom + 18 x 302 s. After a successful command, the access to all the memory blocks linked to the password is changed as described in Section 2: LRIS2K block security. Table 76. Present Password request format
UID 64 bits Password number 8 bits Data 32 bits CRC16 16 bits Request EOF
IC Request Request Present Mfg SOF _flags Password code 8 bits B3h 02h
Request parameters:

UID (optional) Password number (0x01 = Pswd1, 0x02 = Pswd2, 0x03 = Pswd3, other = Error) Data Present Password response format when Error_flag is NOT set
Response_flags 8 bits CRC16 16 bits Response EOF
Table 77.
Response SOF
Response parameter:
No parameter. The response is send back after the writing cycle Present Password response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Table 78.
Response SOF
Response parameter:
Error code as Error_flag is set: - 0Fh: other error
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Present Password Figure 56. Present Password frame exchange between VCD and LRIS2K
LRIS2K
VCD
SOF
Present Password request
EOF Present Password response
LRIS2K
<-t1-> SOF
EOF
sequence when error
LRIS2K
<------------ tW ------------><- t1 -> SOF
Present Password response
EOF
82/102
LRIS2K
Fast Read Single Block
40
Fast Read Single Block
On receiving the Fast Read Single Block command, the LRIS2K reads the requested block and sends back its 32-bit value in the request. The Option_flag is supported. The data rate of the response is multiplied by 2. Table 79. Fast Read Single Block request format
Fast Read IC Mfg Single code Block C0h 02h UID 64 bits Block number 8 bits CRC16 16 bits Request EOF
Request Request_ SOF flags 8 bits
Request parameters:

Option_flag UID (optional) Block number Fast Read Single Block response format when Error_flag is NOT set
Block Locking Status 8 bits Data 32 bits CRC16 16 bits Response EOF
Table 80.
Response Response SOF _flags 8 bits
Response parameters:

Block Locking Status if Option_flag is set (see Table 81) 4 bytes of block data Block Locking status
b6 b5 b4 b3 b2 b1 b0 0: Current Block not locked 1: Current Block locked password control bits Read / Write protection bits
Table 81.
b7
Reserved for future used. All at 0
Table 82.
Response SOF
Fast Read Single Block response format when Error_flag is set
Response_ Flags 8 bits Error code 8 bits CRC16 16 bits Response EOF
Response parameter:
Error code as Error_flag is set: - - 0Fh: other error 10h: block address not available
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Fast Read Single Block
LRIS2K
Figure 57. Fast Read Single Block frame exchange between VCD and LRIS2K
VCD LRIS2K
SOF
Fast Read Single Block request
EOF <-t1-> SOF Fast Read Single Block response EOF
84/102
LRIS2K
Fast Inventory Initiated
41
Fast Inventory Initiated
Before receiving the Fast Inventory Initiated command, the LRIS2K must have received an Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does not answer to the Fast Inventory Initiated command. On receiving the Fast Inventory Initiated request, the LRIS2K runs the anticollision sequence. The Inventory_flag must be set to 1. The meaning of flags 5 to 8 is shown in Table 20: Request_flags 5 to 8 when Bit 3 = 1. The data rate of the response is multiplied by 2. The request contains the:

flags Inventory command code AFI if the AFI_flag is set mask length mask value CRC
The LRIS2K does not generate any answer in case of error. Table 83. Fast Inventory Initiated request format
Mask value 0 - 64 bits CRC16 16 bits Request EOF
Fast Request Request IC Mfg Optional Mask Inventory SOF Flags code AFI length Initiated 8 bits C1h 02h 8 bits 8 bits
The response contains:

the flags the Unique ID Fast Inventory Initiated response format
UID 64 bits CRC16 16 bits Response EOF
Table 84.
Response Response DSFID SOF _flags 8 bits 00h
During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a time t3 before sending an EOF to switch to the next slot. t3 starts from the rising edge of the request EOF sent by the VCD.

If the VCD sends a 100% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3s) + tSOF If the VCD sends a 10% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3s) + tNRT tSOF is the time required by the LRIS2K to transmit an SOF to the VCD tNRT is the nominal response time of the LRIS2K
where:

tNRT and tSOF are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation mode.
85/102
Fast Initiate
LRIS2K
42
Fast Initiate
On receiving the Fast Initiate command, the LRIS2K sets the internal Initiate_flag and sends back a request. The command has to be issued in the Non Addressed mode only (Select_flag is reset to 0 and Address_flag is reset to 0). If an error occurs, the LRIS2K does not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K. The data rate of the response is multiplied by 2. The request contains:
No data Fast Initiate request format
Request_flags 8 bits Fast Initiate C2h IC Mfg Code 02h CRC16 16 bits Request EOF
Table 85.
Request SOF
The response contains:

the flags the Unique ID Fast Initiate response format
UID 64 bits CRC16 16 bits Response EOF
Table 86.
Response Response DSFID SOF _flags 8 bits 00h
Figure 58. Fast Initiate frame exchange between VCD and LRIS2K
VCD LRIS2K
SOF
Fast Initiate request
EOF <-t1-> SOF Fast Initiate response EOF
86/102
LRIS2K
Inventory Initiated
43
Inventory Initiated
Before receiving the Inventory Initiated command, the LRIS2K must have received an Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does not answer to the Inventory Initiated command. On receiving the Inventory Initiated request, the LRIS2K runs the anticollision sequence. The Inventory_flag must be set to 1. The meaning of flags 5 to 8 is given in Table 20: Request_flags 5 to 8 when Bit 3 = 1. The request contains the:

flags Inventory command code AFI if the AFI_flag is set mask length mask value CRC
The LRIS2K does not generate any answer in case of error. Table 87. Inventory Initiated request format
IC Optional Mask Mfg AFI length code 02h 8 bits 8 bits Mask value 0 - 64 bits CRC16 16 bits Request EOF
Request Request Inventory SOF _flags Initiated 8 bits D1h
The response contains the:

flags unique ID Inventory Initiated response format
UID 64 bits CRC16 16 bits Response EOF
Table 88.
Response Response DSFID SOF _flags 8 bits 0x00
During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a time t3 before sending an EOF to switch to the next slot. t3 starts from the rising edge of the request EOF sent by the VCD.

If the VCD sends a 100% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3s) + tSOF If the VCD sends a 10% modulated EOF, the minimum value of t3 is: t3min = 4384/fC (323.3s) + tNRT tSOF is the time required by the LRIS2K to transmit an SOF to the VCD tNRT is the nominal response time of the LRIS2K
where:

tNRT and tSOF are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation mode.
87/102
Initiate
LRIS2K
44
Initiate
On receiving the Initiate command, the LRIS2K sets the internal Initiate_flag and sends back a request. The command has to be issued in the Non Addressed mode only (Select_flag is reset to 0 and Address_flag is reset to 0). If an error occurs, the LRIS2K does not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K. The request contains:
No data Initiate request format
Initiate D2h IC Mfg code 02h CRC16 16 bits Request EOF
Table 89.
Request Request_flags SOF 8 bits
The response contains the:

flags unique ID Initiate Initiated response format
DSFID 00h UID 64 bits CRC16 16 bits Response EOF
Table 90.
Response Response SOF _flags 8 bits
Figure 59. Initiate frame exchange between VCD and LRIS2K
VCD LRIS2K
SOF
Initiate request
EOF <-t1-> SOF Initiate response EOF
88/102
LRIS2K
Maximum rating
45
Maximum rating
Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 91.
Symbol
Absolute maximum ratings
Parameter Min. 15 Wafer Max. 25 23 Unit C months
TSTG, hSTG, Storage conditions tSTG A1, A6, A7
kept in its antistatic bag 15 40% 25 60% 2 C RH years mA V V V V
ICC VMAX
Supply current on AC0 / AC1 Input voltage on AC0 / AC1 A1, A6, A7
-20 -7 -7000 -1000 -100
20 7 7000 1000 100
VESD
Electrostatic discharge voltage(1) (2)
MLP (HBM) MLP (MM)
1. Mil. Std. 883 - Method 3015. 2. ESD test: ISO10373-7 specification.
89/102
DC and AC parameters
LRIS2K
46
DC and AC parameters
This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 92.
Symbol fCC
AC characteristics(1) (2)
Parameter External RF signal frequency MI=(A-B)/(A+B) Condition Min Typ Max Unit
13.553 13.56 13.567 MHz 10 0.5 7.1 MI=(A-B)/(A+B) 95 0.5 7.1 -2 From H-field min FCC/32 FCC/28 4224/FS 4224/FS 318.6 309 0.1 423.75 484.28 320.9 311.5 323.3 314 5.8 30 3.0 9.44 100 3.5 9.44 +2 1 % s s % s s s ms KHz KHz s s ms
MICARRIER 10% carrier modulation index tRFR, tRFF tRFSBL 10% rise and fall time 10% minimum pulse width for bit
MICARRIER 100% carrier modulation index tRFR, tRFF tRFSBL tJIT tMIN CD fSH fSL t1 t2 tW 100% rise and fall time 100% minimum pulse width for bit Bit pulse jitter Minimum time from carrier generation to first data Subcarrier frequency high Subcarrier frequency low Time for LRIS2K response Time between commands Programming time
1. TA = -20 to 85 C. 2. All timing measurements were performed on a reference antenna with the following characteristics: External size: 75 mm x 48 mm Number of turns: 6 Width of conductor: 1 mm Space between 2 conductors: 0.4 mm Value of the tuning capacitor: 28.5 pF (LRIS2K-W4) Value of the coil: 4.3 H Tuning frequency: 13.8 MHz.
90/102
LRIS2K Table 93.
Symbol VCC VRET ICC
DC and AC parameters DC characteristics(1)
Parameter Regulated voltage Retromodulated induced voltage Read Supply current Write ISO10373-7 VCC = 3.0 V VCC = 3.0 V f = 13.56 MHz for W4/1 f = 13.56 MHz for W4/2 CTUN Internal tuning capacitor f = 13.56 MHz for W4/3 f = 13.56 MHz for W4/4
1. TA = -20 to 85 C.
Test conditions
Min. 1.5 10
Typ.
Max. 3.0
Unit V mV
50 150 21 28.5 97 23.5
A A pF pF pF pF
Table 94.
Symbol TA
Operating conditions
Parameter Ambient operating temperature Min. -20 Max. 85 Unit C
Figure 60 shows an ASK modulated signal, from the VCD to the LRIS2K. The test condition for the AC/DC parameters are:

Close coupling condition with tester antenna (1mm) LRIS2K performance measured at the tag antenna
Figure 60. LRIS2K synchronous timing, transmit and receive
A
B
tRFF
tRFR
fCC
tRFSBL
tMAX
tMIN CD
AI06680
91/102
Package mechanical data
LRIS2K
47
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 61. A1 antenna on tape outline
C1 A1 B1
C2 A2 B2
ai10119
1. Drawing is not to scale.
Table 95.
Symbol A1 A2 B1 B2 C1 C2
A1 antenna on tape, mechanical data
Parameter Coil width Coil length Antenna cut width Antenna cut length Die position from antenna Die position from antenna Silicon thickness Typ 45 76 49 82 23 56 180 35 15.1 0.03 90 MHz A/m dbA/m Min 44.5 75.5 48.8 81.8 22.8 55.8 165 Max 45.5 76.5 49.2 82.2 23.2 56.2 195 Unit mm mm mm mm mm mm m
Q FNOM PA
Unloaded Q value Unloaded free-air resonance H-field energy for device operation
92/102
LRIS2K Figure 62. A6 antenna on tape outline
I
Package mechanical data
A
B
ai10120
1. Drawing is not to scale.
Table 96.
Symbol A B I
A6 antenna on tape mechanical data
Parameter Coil diameter Antenna cut diameter Hole diameter Overall thickness of copper antenna coil Silicon thickness Typ 35 40 16 80 180 35 15.1 0.5 114 MHz A/m dbA/m Min 34.5 38.8 15.8 70 165 Max 35.5 40.2 16.2 90 195 Unit mm mm mm m m
Q FNOM PA
Unloaded Q value Unloaded free-air resonance H-field energy for device operation
93/102
Package mechanical data Figure 63. A7 antenna on tape outline
LRIS2K
A1 C1
B1
C2 A2 B2
ai10121
1. Drawing is not to scale.
Table 97.
Symbol A1 A2 B1 B2 C1 C2
A7 antenna on tape mechanical data
Parameter Coil width Coil length Antenna cut width Antenna cut length Die position from antenna Die position from antenna Overall thickness of copper antenna coil Silicon thickness Typ 40 20 44 24 10 20 160 180 35 15.1 1 120 MHz A/m dbA/m Min 39.5 19.5 43.8 23.8 9.8 19.8 145 165 Max 40.5 20.5 44.2 24.2 10.2 20.2 175 195 Unit mm mm mm mm mm mm m m
Q FNOM PA
Unloaded Q value Unloaded free-air resonance H-field energy for device operation
94/102
LRIS2K
Package mechanical data Figure 64. UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) outline
D L3 e b L1
E
E2
L A D2 ddd A1
UFDFPN-01
1. Drawing is not to scale.
Table 98.
UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) mechanical data
Millimeters Inches(1) Max. 0.6 0.05 0.3 2.1 1.7 3.1 0.3 0.5 0.15 0.3 0.08 0.0118 0.0031 Typ. 0.0217 0.0008 0.0098 0.0787 0.063 0.1181 0.0079 0.0197 0.0177 Min. 0.0177 0 0.0079 0.0748 0.0591 0.1142 0.0039 0.0157 Max. 0.0236 0.002 0.0118 0.0827 0.0669 0.122 0.0118 0.0197 0.0059
Symbol Typ. A A1 b D D2 E E2 e L L1 L3 ddd
(2)
Min. 0.45 0 0.2 1.9 1.5 2.9 0.1 0.4
0.55 0.02 0.25 2 1.6 3 0.2 0.5 0.45
1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring.
95/102
Part numbering
LRIS2K
48
Part numbering
Table 99.
Example:
Ordering information scheme
LRIS2K W4/2
Device type LRIS2K
Package W4 =180 m 15 m unsawn wafer SBN18 = 180 m 15 m bumped and sawn wafer on 8-inch frame A1T = 45 mm x 76 mm copper antenna on continuous tape A1S = 4 5mm x 76 mm copper singulated adhesive antenna on tape A6S2U = 35 mm copper singulated adhesive CD antenna on white PET tape and no marking A7T = 20 mm x 40 mm copper antenna on continuous tape MBTG = UFDFPN8 (MLP8), tape & reel packing, ECOPACK(R), RoHS compliant, Sb2O3-free and TBBA-free
For further information on any aspect of this device, please contact your nearest ST sales office.
96/102
LRIS2K
Anticollision algorithm (Informative)
Appendix A
Anticollision algorithm (Informative)
The following pseudocode describes how anticollision could be implemented on the VCD, using recursivity.
A.1
Algorithm for pulsed slots
function function function function push (mask, address); pushes on private stack pop (mask, address); pops from private stack pulse_next_pause; generates a power pulse store(LRIS2K_UID); stores LRIS2K_UID
function poll_loop (sub_address_size as integer) pop (mask, address) mask = address & mask; generates new mask ; send the request mode = anticollision send_Request (Request_cmd, mode, mask length, mask value) for sub_address = 0 to (2^sub_address_size - 1) pulse_next_pause if no_collision_is_detected ; LRIS2K is inventoried then store (LRIS2K_UID) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty ; if some collisions have been detected and then ; not yet processed, the function calls itself poll_loop (sub_address_size); recursively to process the last stored collision endif end poll_loop main_cycle: mask = null address = null push (mask, address) poll_loop(sub_address_size) end_main_cycle
97/102
CRC (informative)
LRIS2K
Appendix B
B.1
CRC (informative)
CRC error detection method
The cyclic redundancy check (CRC) is calculated on all data contained in a message, from the start of the flags through to the end of data. The CRC is used from VCD to LRIS2K and from LRIS2K to VCD. Table 100. CRC definition
CRC definition CRC type ISO/IEC 13239 Length 16 bits X
16
Polynomial + X12 + X5 + 1 = 8408h
Direction Backward
Preset FFFFh
Residue F0B8h
To add extra protection against shifting errors, a further transformation on the calculated CRC is made. The One's Complement of the calculated CRC is the value attached to the message for transmission. To check received messages the 2 CRC bytes are often also included in the re-calculation, for ease of use. In this case, the expected value for the generated CRC is the residue F0B8h.
B.2
CRC calculation example
This example in C language illustrates one method of calculating the CRC on a given set of bytes comprising a message.
C-example to calculate or check the CRC16 according to ISO/IEC 13239
#define #define #define #define #define #define POLYNOMIAL0x8408// PRESET_VALUE0xFFFF CHECK_VALUE0xF0B8 x^16 + x^12 + x^5 + 1
NUMBER_OF_BYTES4// Example: 4 data bytes CALC_CRC1 CHECK_CRC0
void main() { unsigned int current_crc_value; unsigned char array_of_databytes[NUMBER_OF_BYTES + 2] = {1, 2, 3, 4, 0x91, 0x39}; int number_of_databytes = NUMBER_OF_BYTES; int calculate_or_check_crc; int i, j; calculate_or_check_crc = CALC_CRC; // calculate_or_check_crc = CHECK_CRC;// This could be an other example if (calculate_or_check_crc == CALC_CRC) { number_of_databytes = NUMBER_OF_BYTES;
98/102
LRIS2K } else // check CRC { number_of_databytes = NUMBER_OF_BYTES + 2; } current_crc_value = PRESET_VALUE;
CRC (informative)
for (i = 0; i < number_of_databytes; i++) { current_crc_value = current_crc_value ^ ((unsigned int)array_of_databytes[i]); for (j = 0; j < 8; j++) { if (current_crc_value & 0x0001) { current_crc_value = (current_crc_value >> 1) ^ POLYNOMIAL; } else { current_crc_value = (current_crc_value >> 1); } } } if (calculate_or_check_crc == CALC_CRC) { current_crc_value = ~current_crc_value; printf ("Generated CRC is 0x%04X\n", current_crc_value); // stream // } else { if { current_crc_value is now ready to be appended to the data (first LSByte, then MSByte) // check CRC (current_crc_value == CHECK_VALUE)
printf ("Checked CRC is ok (0x%04X)\n", current_crc_value); } else { printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value); } } }
99/102
Application family identifier (AFI) (informative)
LRIS2K
Appendix C
Application family identifier (AFI) (informative)
The AFI (application family identifier) represents the type of application targeted by the VCD and is used to extract from all the LRIS2K present only the LRIS2K meeting the required application criteria. It is programmed by the LRIS2K issuer (the purchaser of the LRIS2K). Once locked, it cannot be modified. The most significant nibble of the AFI is used to code one specific or all application families, as defined in Table 101. The least significant nibble of the AFI is used to code one specific or all application subfamilies. Subfamily codes different from 0 are proprietary. Table 101. AFI coding(1)
AFI Most significant nibble `0' `X' 'X `0' `1 '2 '3 '4 `5' '6 '7 8 '9 'A 'B 'C 'D 'E `F' AFI Least significant nibble `0' '0 '`Y' `Y' '`0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' `0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' '`0', `Y' `0', `Y' Meaning VICCs respond from All families and subfamilies 'All subfamilies of family X Only the Yth subfamily of family X Proprietary subfamily Y only Transport Financial Identification Telecommunication Medical Multimedia Gaming Data Storage Item Management Express Parcels Postal Services Airline Bags RFU RFU RFU Portable Files,... Internet services.... Mass transit, Bus, Airline,... IEP, Banking, Retail,... Access Control,... Public Telephony, GSM,... Examples / Note
No applicative preselection Wide applicative preselection
1. X = '1' to 'F', Y = '1' to 'F'
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LRIS2K
Revision history
Revision history
Table 102. Document revision history
Date 13-Jun-2006 Revision 1 Initial release. Figure 2: MLP connections added. Only bits set to `1' are programmed to the AFI and DSFID Registers (see Section 30: Write AFI and Section 32: Write DSFID. CTUN typical value for W4/3 modified in Table 93: DC characteristics. Small text changes. 23.5 pF internal tuning capacitor (CTUN) value added (see Features on page 1 and Table 93: DC characteristics. VESD modified for MLP in Table 91: Absolute maximum ratings. Small text changes. Titles of Table 63 and Table 64 modified. Response parameters modified in Section 35: Get Multiple Block Security Status on page 73. UFDFPN8 package mechanical data updated and dimensions in inches rounded to four decimal digits instead of three in Table 98: UFDFPN8 - 8-lead ultra thin fine pitch dual flat package no lead (MLP) mechanical data Changes
19-Feb-2007
2
07-Sep-2007
3
08-Apr-2008
4
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LRIS2K
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