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Micrel, Inc. 3.3V 28Mbps to 1.3Gbps AnyRate(R) Clock and Data Recovery SY87701AL SY87701AL FEATURES s Industrial temperature range (-40C to +85C) s 3.3V power supply s Clock and data recovery from 28Mbps up to 1.3Gbps NRZ data stream, clock generation from 28Mbps to 1.3Gbps s Complies with Bellcore, ITU/CCITT and ANSI specifications for applications such as OC-1, OC-3, OC-12, ATM, FDDI, Fibre Channel and Gigabit Ethernet as well as proprietary applications s Two on-chip PLLs: one for clock generation and another for clock recovery s Selectable reference frequencies s Differential PECL high-speed serial I/O s Line receiver input: no external buffering needed s Link fault indication s 100k ECL compatible I/O s Lower power: fully compatible with Micrel's SY87701V, but with 30% less power s Available in 32-pin EPAD-TQFP and 28-pin SOIC packages (28-pin SOIC is available, but NOT recommended for new designs.) DESCRIPTION The SY87701AL is a complete Clock Recovery and Data Retiming integrated circuit for data rates from 28Mbps up to 1.3Gbps NRZ. The device is ideally suited for SONET/SDH/ATM and Fibre Channel applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference. The SY87701AL also includes a link fault detection circuit. All support documentation can be found on Micrel's web site at: www.micrel.com. APPLICATIONS s s s s SONET/SDH/ATM OC-1, OC-3, OC-12, OC-24 Fibre Channel, Escon, SMPTE 259 Gigabit Ethernet/Fast Ethernet Proprietary architecture up to 1.3Gbps BLOCK DIAGRAM PLLR P/N RDOUTP (PECL) RDOUTN RCLKP (PECL) RCLKN PHASE/ FREQUENCY DETECTOR LINK FAULT DETECTOR RDINP (PECL) RDINN PHASE DETECTOR 0 1 CHARGE PUMP VCO CD (PECL) REFCLK (TTL) PHASE/ FREQUENCY DETECTOR LFIN (TTL) CHARGE PUMP VCO 1 0 TCLKP (PECL) TCLKN DIVIDER BY 8, 10, 16, 20 SY87701AL DIVSEL 1/2 (TTL) PLLS P/N FREQSEL 1/2/3 (TTL) CLKSEL (TTL) VCC VCCA VCCO GND AnyRate is a registered trademark of Micrel, Inc. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 Rev.: G Amendment: /0 1 Issue Date: August 2007 Micrel, Inc. SY87701AL PACKAGE/ORDERING INFORMATION Ordering Information VCCA 1 LFIN 2 DIVSEL1 3 RDINP 4 RDINN 5 FREQSEL1 6 REFCLK 7 FREQSEL2 8 FREQSEL3 9 N/C 10 PLLSP 11 PLLSN 12 GNDA 13 GND 14 28 VCC 27 CD 26 DIVSEL2 25 RDOUTP 24 RDOUTN 23 VCCO 22 RCLKP 21 RCLKN 20 VCCO 19 TCLKP 18 TCLKN 17 CLKSEL 16 PLLRP 15 PLLRN Part Number SY87701ALZI SY87701ALHI SY87701ALZG SY87701ALHG(1) Package Type Z28-1 H32-1 Z28-1 H32-1 Operating Range Industrial Industrial Industrial Industrial Package Marking SY87701ALZI SY87701ALHI SY87701ALZG with Pb-Free bar-line indicator SY87701ALHG with Pb-Free bar-line indicator Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu Note: 1. Pb-Free package recommended for new designs. 28-Pin SOIC (Z28-1) DIVSEL1 LFIN VCCA VCCA VCC VCC CD DIVSEL2 32 31 30 29 28 27 26 25 NC RDINP RDINN FREQSEL1 REFCLK FREQSEL2 FREQSEL3 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 24 23 22 21 20 19 18 17 RDOUTP RDOUTN VCCO RCLKP RCLKN VCCO TCLKP TCLKN 32-Pin EPAD TQFP (H32-1) M9999-082107 hbwhelp@micrel.com or (408) 955-1690 PLLSP PLLSN GNDA GND GND PLLRN PLLRP CLKSEL 2 Micrel, Inc. SY87701AL PIN DESCRIPTIONS Pin Number SOIC 4 5 Pin Number TQFP 2 3 Pin Name RDINP RDINN Pin Function Serial Data Input (Differential PECL): These built-in line receiver inputs are connected to the differential receive serial data stream. An internal receive PLL recovers the embedded clock (RCLK) and data (RDOUT) information. The incoming data rate can be within one of eight frequency ranges depending on the state of the FREQSEL pins. See "Frequency Selection" table. Reference Clock (TTL Inputs): This input is used as the reference for the internal frequency synthesizer and the "training" frequency for the receiver PLL to keep it centered in the absence of data coming in on the RDIN inputs. Carrier Detect (PECL Input): This input controls the recovery function of the Receive PLL and can be driven by the carrier detect output of optical modules or from external transition detection circuitry. When this input is HIGH the input data stream (RDIN) is recovered normally by the Receive PLL. When this input is LOW the data on the inputs RDIN will be internally forced to a constant LOW, the data outputs RDOUT will remain LOW, the Link Fault Indicator output LFIN forced LOW and the clock recovery PLL forced to look onto the clock frequency generated from REFCLK. Frequency Select (TTL Inputs): These inputs select the output clock frequency range as shown in the "Frequency Selection" table. Divider Select (TTL Inputs): These inputs select the ratio between the output clock frequency (RCLK/TCLK) and the REFCLK input frequency as shown in the "Reference Frequency Selection" table. Clock Select (TTL Inputs): This input is used to select either the recovered clock of the receiver PLL (CLKSEL = HIGH) or the clock of the frequency synthesizer (CLKSEL = LOW) to the TCLK outputs. Link Fault Indicator (TTL Output): This output indicates the status of the input data stream RDIN. Active HIGH signal is indicating when the internal clock recovery PLL has locked onto the incoming data stream. LFIN will go HIGH if CD is HIGH and RDIN is within the frequency range of the Receive PLL (1000ppm). Receive Data Output (Differential PECL): These ECL 100k outputs represent the recovered data from the input data stream (RDIN). This recovered data is specified against the rising edge of RCLK. These outputs must be terminated with 50 to VCC-2 or equivalent. Thhis applies even if these outputs are not used. Clock Output (Differential PECL): These ECL 100k outputs represent the recovered clock used to sample the recovered data (RDOUT). Clock Output (Differential PECL): These ECL 100k outputs represent either the recovered clock (CLKSEL = HIGH) used to sample the recovered data (RDOUT) or the transmit clock of the frequency synthesizer (CLKSEL = LOW). These outputs must be terminated with 50 to VCC-2 or equivalent. This applies even if these outputs are not used. Clock Synthesis PLL Loop Filter. External loop filter pins for the clock synthesis PLL. Clock Recovery PLL Loop Filter. External loop filter pins for the receiver PLL. Supply Voltage(1) Analog Supply Voltage(1) Output Supply Voltage(1) Ground No Connect Analog Ground 7 5 REFCLK 27 26 CD 6 8 9 3 26 17 4 6 7 32 25 16 FREQSEL1 FREQSEL2 FREQSEL3 DIVSEL1 DIVSEL2 CLKSEL 2 31 LFIN 25 24 24 23 RDOUTP RDOUTN 22 21 19 18 21 20 18 17 RCLKP RCLKN TCLKP TCLKN 11 12 16 15 28 1 20, 23 13, 14 10 13 9 10 15 14 27, 28, 29, 30 19, 22 12, 13 1, 8 11 PLLSP PLLSN PLLRP PLLRN VCC VCCA VCCO GND NC GNDA Note: 1. VCC, VCCA, VCCO must be the same value. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 3 Micrel, Inc. SY87701AL FUNCTIONAL DESCRIPTION Clock Recovery Clock Recovery, as shown in the block diagram, generates a clock that is at the same frequency as the incoming data bit rate at the Serial Data input. The clock is phase aligned by a PLL so that it samples the data in the center of the data eye pattern. The phase relationship between the edge transitions of the data and those of the generated clock are compared by a phase/frequency detector. Output pulses from the detector indicate the required direction of phase correction. These pulses are smoothed by an integral loop filter. The output of the loop filter controls the frequency of the Voltage Controlled Oscillator (VCO), which generates the recovered clock. Frequency stability without incoming data is guaranteed by an alternate reference input (REFCLK) that the PLL locks onto when data is lost. If the Frequency of the incoming signal varies by greater than approximately 1000ppm with respect to the synthesizer frequency, then PLL will be declared out of lock, and the PLL will lock to the reference clock. The loop filter transfer function is optimized to enable the PLL to track the jitter, yet tolerate the minimum transition density expected in a received SONET data signal. This transfer function yields a 30s data stream of continuous 1's or 0's for random incoming NRZ data. The total loop dynamics of the clock recovery PLL provides jitter tolerance which is better than the specified tolerance in GR-253-CORE. Lock Detect The SY87701AL contains a link fault indication circuit that monitors the integrity of the serial data input. If the recovered serial data from RDIN is at the correct data rate (within 1000ppm of the synthesizer frequency), the Link Fault Indicator (LFIN) output will be asserted HIGH indicating an in-lock condition and will remain HIGH as long as this condition is met. In the event that the recovered serial data is not at the correct data rate (greater than 1000ppm difference from the synthesizer frequency), then LFIN output will go LOW indicating an out-of-lock condition. This condition will force the Clock and Data Recovery PLL (CDR) to lock onto the synthesizer frequency until it is within the correct frequency range (less than 1000ppm difference from the synthesizer frequency). Once the CDR is within the correct frequency range it will again lock onto the RDIN input. During the interval when the CDR is not locked onto the RDIN input, the LFIN output will not be a static LOW, but will be changing. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 4 Micrel, Inc. SY87701AL CHARACTERISTICS Performance The SY87701AL PLL complies with the jitter specifications proposed for SONET/SDH equipment defined by the Bellcore Specifications: GR-253-CORE, Issue 2, December 1995 and ITU-T Recommendations: G.958 document, when used with differential inputs and outputs. Input Jitter Tolerance Input jitter tolerance is defined as the peak-to-peak amplitude of sinusoidal jitter applied on the input signal that causes an equivalent 1dB optical/electrical power penalty. SONET input jitter tolerance requirement condition is the input jitter amplitude which causes an equivalent of 1dB power penalty. Jitter Transfer Jitter transfer function is defined as the ratio of jitter on the output OC-N/STS-N signal to the jitter applied on the input OC-N/STS-N signal versus frequency. Jitter transfer requirements are shown in Figure 2. Jitter Generation The jitter of the serial clock and serial data outputs shall not exceed .01 U.I. rms when a serial data input with no jitter is presented to the serial data inputs. A 0.1 Sinusoidal Input Jitter Amplitude (UI p-p) Jitter Transfer (dB) 15 1.5 -20dB/decade -20dB/decade -20dB/decade -20 Acceptable Range 0.40 f0 f1 f2 Frequency f4 ft fc Frequency OC/STS-N Level 3 12 f0 (Hz) 10 10 f1 (Hz) 30 30 f2 (Hz) 300 300 f3 (kHz) 6.5 25 ft (kHz) 65 250 OC/STS-N Level 3 12 fc (kHz) 130 225 P (dB) 0.1 0.1 Figure 1. Input Jitter Tolerance Figure 2. Jitter Transfer M9999-082107 hbwhelp@micrel.com or (408) 955-1690 5 Micrel, Inc. SY87701AL FREQUENCY SELECTION TABLE FREQSEL1 0 0 0 0 1 1 1 1 FREQSEL2 0 0 1 1 0 0 1 1 FREQSEL3 0 1 0 1 0 1 0 1 fVCO/fRCLK 1 2 4 6 8 12 16 24 fRCLK Data Rates (Mbps) 650 - 1300 325 - 650 163 - 325 109 - 216 82 - 162 55 - 108 41 - 81 28 - 54 REFERENCE FREQUENCY SELECTION DIVSEL1 0 0 1 1 DIVSEL2 0 1 0 1 fRCLK/fREFCLK 8 10 16 20 LOOP FILTER COMPONENTS(1) R5 C3 PLLSP PLLSN Wide Range R5 = 350 C3 = 1.0F (X7R Dielectric) R6 C4 PLLRP PLLRN Wide Range R6 = 680 C4 = 1.0F (X7R Dielectric) Note: 1. Suggested Values. Values may vary for different applications. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 6 Micrel, Inc. SY87701AL Absolute Maximum Ratings(1) Supply Voltage (VCC) .................................. -0.5V to +4.0V Input Voltage (VIN) ......................................... -0.5V to VCC Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Lead Temperature (soldering, 20 sec.) ..................... 260C Storage Temperature (TS) ....................... -65C to +150C Operating Ratings(2) Supply Voltage (VCC) .............................. +3.15V to +3.45V Ambient Temperature (TA) ......................... -40C to +85C Package Thermal Resistance(3) SOIC (JA)(4) ..................................................................... 80C/W EPAD TQFP (JA)(5) 0lfpm airflow ................................................. 27.6C/W 200lfpm airflow ............................................. 22.6C/W 500lfpm airflow ............................................. 20.7C/W DC ELECTRICAL CHARACTERISTICS Symbol VCC ICC Parameter Power Supply Voltage Power Supply Current Condition Min 3.15 Typ 3.3 120 Max 3.45 160 Units V mA PECL 100K DC ELECTRICAL CHARACTERISTICS VCC = VCCO = VCCA = 3.3V 5%; TA = -40C to +85C; unless noted. Symbol VIH VIL VOH VOL IIL Parameter Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output LOW Voltage Input LOW Current 50 to VCC -2V 50 to VCC -2V VIN = VIL(min) Condition Min VCC -1.165 VCC -1.810 VCC -1.075 VCC -1.860 0.5 Typ Max VCC -0.880 VCC -1.475 VCC -0.830 VCC -1.570 Units V V V V A TTL DC ELECTRICAL CHARACTERISTICS VCC = VCCO = VCCA = 3.3V 5%; TA = -40C to +85C; unless noted. Symbol VIH VIL VOH VOL IIH IIL IOS Parameter Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input LOW Current Output Short Circuit Current IOH = -0.4mA IOL = 4mA VIN = 2.7V, VCC = max. VIN = VCC, VCC = max. VIN = 0.5V, VCC = max. VOUT = 0V (maximum 1 sec) -175 +100 -300 -15 -100 2.0 0.5 Condition Min 2.0 Typ Max VCC 0.8 Units V V V V A A A mA Notes: 1. Permanent device damage may occur if "Absolute Maximum Ratings" are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to "Absolute Maximum Ratings" conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Airflow of 500lfpm recommended for 28-pin SOIC. 4. 28-pin SOIC package is NOT recommended for new designs. 5. Using JEDEC standard test boards with die attach pad soldered to PCB. See www.amkor.com for additional package details. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 7 Micrel, Inc. SY87701AL AC ELECTRICAL CHARACTERISTICS VCC = VCCO = VCCA = 3.3V 5%; TA = -40C to +85C; unless noted. Symbol fVCO fVCO tACQ tCPWH tCPWL tir tODC tr, tf tSKEW tDV tDH Parameter VCO Center Frequency VCO Center Frequency Tolerance Acquisition Lock Time REFCLK Pulse Width HIGH REFCLK Pulse Width LOW REFCLK Input Rise Time Output Duty Cycle (RCLK/TCLK) ECL Output Rise/Fall Time (20% to 80%) Recovered Clock Skew Data Valid Data Hold 50 to VCC -2V 45 100 -200 1/(2 x fRCLK) - 200 1/(2 x fRCLK) - 200 3 3 0.5 2 55 500 +200 Condition fREFCLK x Byte Rate Nominal Min 625 5 15 Typ Max 1300 Units MHz % s ns ns ns % of UI ps ps ps ps TIMING WAVEFORMS tCPWL tCPWH REFCLK tODC tODC RCLK tSKEW tDV tDH RDOUT M9999-082107 hbwhelp@micrel.com or (408) 955-1690 8 Micrel, Inc. SY87701AL APPLICATION EXAMPLE AC-COUPLED I/O R21 130 VCC VCC LED D1 Q1 2N2222A R10 1k R9 R8 R7 R6 R5 R3 1k 1k 1k 1k 1k 1k CD FREQSEL1 FREQSEL2 FREQSEL3 DIVSEL1 DIVSEL2 CLKSEL DIP switch VEE VEE U2 SY89322V GND IN1 IN0 VCC /Q1 Q1 /Q Q0 R15 182 SMA10 R30 182 R16 182 C29 0.01F R22 12.1k VEE IN0 R27 1k VCC VCC VCCA DIVSEL1 32 DIVSEL1 R32 182 VEE VCC DIVSEL2 31 LFIN VEE SMA9 SMA8 R13 182 C14 0.01F VEE 30 VCCA 29 VCCA 28 VCC 27 VCC 26 CD 25 DIVSEL2 VCCA SMA1 C23 0.1F Pin 30 C19 0.01F R25 82 R26 82 1 2 3 NC RDINP RDINN FREQSEL1 REFCLK FREQSEL2 FREQSEL3 RDOUTP RDOUTN VCCO 24 23 22 R14 182 C15 0.01F SMA7 SMA2 C18 0.01F FREQSEL1 4 5 VCCO VCC R23 130 R24 130 U1 SY87701AL RCLKP RCLKN 21 20 SMA6 R11 182 C12 0.01F SMA5 R12 182 C13 0.01F C21 0.1F C22 0.1F Pin 19 Pin 22 VEE C24 0.1F C25 0.1F C26 0.1F C20 0.1F Pin 27 VEE SMA3 FREQSEL2 FREQSEL3 6 7 8 VCCO 19 TCLKP VCCO 18 CLKSEL NC TCLKN 17 PLLRN PLLSN PLLRP PLLSP R31 50 Pin 11 Pin 12 Pin 13 9 10 11 12 13 14 15 16 CLKSEL R29 182 R28 182 GNDA GND GND C28 0.01F SMA4 C27 0.01F R1 350 C1 1F C11 1F R2 680 VCCA VCCA J2 C5 0.01F C1 6.8F VCCA VCC J3 C7 0.01F C6 6.8F VCCA VCCO J6 C31 0.01F C30 6.8F VCCA VEE J4 C9 0.01F C8 6.8F GND J5 M9999-082107 hbwhelp@micrel.com or (408) 955-1690 9 Micrel, Inc. SY87701AL APPLICATION EXAMPLE DC-COUPLED I/O R21 130 VCC VCC LED D1 Q1 2N2222A R10 1k R9 R8 R7 R6 R5 R3 1k 1k 1k 1k 1k 1k CD FREQSEL1 FREQSEL2 FREQSEL3 DIVSEL1 DIVSEL2 CLKSEL DIP switch VEE VEE U2 SY89322V GND IN1 IN0 VCC /Q1 Q1 /Q Q0 R15 182 SMA10 R30 182 R16 182 C29 0.01F R22 12.1k VEE IN0 R27 1k VCC VCC VCCA DIVSEL1 32 DIVSEL1 R32 182 VEE DIVSEL2 31 LFIN VEE SMA9 SMA8 VEE 30 VCCA 29 VCCA 28 VCC 27 VCC 26 CD 25 DIVSEL2 VCCA SMA1 C23 0.1F Pin 30 SMA2 FREQSEL1 1 2 3 4 5 FREQSEL2 FREQSEL3 6 7 8 NC RDINP RDINN FREQSEL1 REFCLK FREQSEL2 FREQSEL3 RDOUTP RDOUTN VCCO 24 23 22 21 20 19 18 SMA7 VCCO VCC U1 SY87701AL RCLKP RCLKN VCCO TCLKP CLKSEL SMA6 VCCO SMA5 C21 0.1F C22 0.1F Pin 19 Pin 22 VEE C24 0.1F C25 0.1F C26 0.1F C20 0.1F Pin 27 PLLRN PLLSN GNDA PLLRP PLLSP SMA3 NC GND GND TCLKN 17 SMA4 R31 50 Pin 11 Pin 12 Pin 13 9 10 11 12 13 14 15 16 CLKSEL R1 350 C1 1F C11 1F R2 680 VCCA VCCA J2 C5 0.01F C1 6.8F VCCA VCC J3 C7 0.01F C6 6.8F VCCA VCCO J6 C31 0.01F C30 6.8F VCCA VEE J4 C9 0.01F C8 6.8F GND J5 M9999-082107 hbwhelp@micrel.com or (408) 955-1690 10 Micrel, Inc. SY87701AL BILL OF MATERIALS (AC-COUPLED) Item C6 C7 C10, C11 C12, C13, C14, C15, C18, C19, C27, C28 C20, C21, C22, C23, C24, C25, C26 D1 D2 J2, J3, J4, J6 J5 Q1 R1 R2 R3, R4, R5, R6, R7, R8, R9, R10 R11, R12, R13, R14, R15, R16, R28, R29, R30, R32 R21 R22 R23, R24 R25, 26 R27 R31 SMA1-SMA10 SP1-SP6 SW1 U1 U2 CT2068-ND SY87700/01 SY89322V Micrel(4) Micrel(4) Part Number 293D685X0025B2T VJ1206Y103JXJAT VJ0603Y105JXJAT VJ0402Y104JXJAT Manufacturer Vishay(1) Vishay(1) Vishay(1) Vishay(1) Description 6.8F, 25V, Tantalum Capacitor, Size B 0.01F, X7R, Ceramic Capacitor, Size 1206 1.0F, X7R, Ceramic Capacitor, Size 0603 0.1F, X7R, Ceramic Capacitor, Size 0402 Qty 1 1 2 8 VJ0402Y104JXJAT Vishay(1) 0.01F, X7R, Ceramic Capacitor, Size 0603 7 P301-ND P300-ND/P301-ND 111-0702-001 111-0703-001 459-2598-5-ND CRCW04023500F CRCW04026800F CRCW04021001F CRCW04021820F Panasonic(2) Vishay(1) Johnson Components(3) Johnson Components(3) Vishay(1) Vishay(1) Vishay(1) Vishay(1) LED, T-1 3/4, Red Clear T-1 3/4 Red LED Red, Insulated Thumb Nut Binding Post (Jumped together) Black, Insulated Thumb Nut Binding Post, GND (Jumped to VEE) 2N2222A Transistor 350 Resistor, 2%, Size 0402 680 Resistor, 2%, Size 0402 1k Pull-up Resistors, 2%, Size 1206 182 Resistor, 2%, Size 0402 1 1 4 1 1 1 1 8 10 CRCW06031300F CRCW04021820F CRCW04022825F CRCW04021300F CRCW040200R0F CRCW04025000F 142-0701-851 Vishay(1) Vishay(1) Vishay(1) Vishay(1) Vishay(1) Vishay(1) Johnson Components(1) 130 Resistor, 2%, Size 0603 12.1k Resistor, 2%, Size 1206 82 Resistor, 2%, Size 0402 130 Resistor, 2%, Size 0402 0 Resistor, 2%, Size 0402 50 Resistor, 2%, Size 0402 End Launch SMA Jack Solder Jumper Option 8-Position, Top Actuated Slide Dip Switch 3.3V 28Mbps to 1.3Gbps Clock and Data Recovery AnyRate(R) 1 1 2 2 1 1 10 6 1 1 1 3.3/5V Dual LVTTL/LVCMOS-to-Differential LVPECL Translator Notes: 1. Vishay: www.vishay.com. 2. Panasonic: www.panasonic.com. 3. Johnson Components: www.johnson-components.com. 4. Micrel, Inc. www.micrel.com. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 11 Micrel, Inc. SY87701AL BILL OF MATERIALS (DC-COUPLED) Item C6 C7 C10, C11 C12, C13, C14, C15, C18, C19, C27, C28 C20, C21, C22, C23, C24, C25, C26 D1 D2 J2, J3, J4, J6 J5 Q1 R1 R2 R3, R4, R5, R6, R7, R8, R9, R10 R15, R16, R30, R32 R21 R22 R27 R31 SMA1-SMA10 SP1-SP6 SW1 U1 U2 CT2068-ND SY87700/01 SY89322V Micrel(4) Micrel(4) Part Number 293D685X0025B2T VJ1206Y103JXJAT VJ0603Y105JXJAT VJ0402Y104JXJAT Manufacturer Vishay(1) Vishay(1) Vishay(1) Vishay(1) Description 6.8F, 25V, Tantalum Capacitor, Size B 0.01F, X7R, Ceramic Capacitor, Size 1206 1.0F, X7R, Ceramic Capacitor, Size 0603 0.1F, X7R, Ceramic Capacitor, Size 0402 Qty 1 1 2 8 VJ0402Y104JXJAT Vishay(1) 0.01F, X7R, Ceramic Capacitor, Size 0603 7 P301-ND P300-ND/P301-ND 111-0702-001 111-0703-001 459-2598-5-ND CRCW04023500F CRCW04026800F CRCW04021001F CRCW04021820F CRCW06031300F CRCW04021820F CRCW040200R0F CRCW04025000F 142-0701-851 Panasonic(2) Vishay(1) Johnson Components(3) Johnson Components(3) Vishay(1) Vishay(1) Vishay(1) Vishay(1) Vishay(1) Vishay(1) Vishay(1) Vishay(1) Johnson Components(1) LED, T-1 3/4, Red Clear T-1 3/4 Red LED Red, Insulated Thumb Nut Binding Post (Jumped together) Black, Insulated Thumb Nut Binding Post, GND (Jumped to VEE) 2N2222A Transistor 350 Resistor, 2%, Size 0402 680 Resistor, 2%, Size 0402 1k Pull-up Resistors, 2%, Size 1206 182 Resistor, 2%, Size 0402 130 Resistor, 2%, Size 0603 12.1k Resistor, 2%, Size 1206 0 Resistor, 2%, Size 0402 50 Resistor, 2%, Size 0402 End Launch SMA Jack Solder Jumper Option 8-Position, Top Actuated Slide Dip Switch 3.3V 28Mbps to 1.3Gbps Clock and Data Recovery AnyRate(R) 1 1 4 1 1 1 1 8 4 1 1 1 1 10 6 1 1 1 3.3/5V Dual LVTTL/LVCMOS-to-Differential LVPECL Translator Notes: 1. Vishay: www.vishay.com. 2. Panasonic: www.panasonic.com. 3. Johnson Components: www.johnson-components.com. 4. Micrel, Inc. www.micrel.com. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 12 Micrel, Inc. SY87701AL 28-PIN SOIC .300" WIDE (Z28-1) Rev. 02 Note: The 28-pin SOIC package is NOT recommended for new designs. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 13 Micrel, Inc. SY87701AL 32-PIN EPAD TQFP (DIE UP) (H32-1) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 32-Pin EPAD-TQFP Package M9999-082107 hbwhelp@micrel.com or (408) 955-1690 14 Micrel, Inc. SY87701AL APPENDIX A Layout and General Suggestions 1. 2. 3. 4. 5. 6. 7. 8. Establish controlled impedance stripline, microstrip, or co-planar construction techniques. Signal paths should have, approximately, the same width as the device pads. All differential paths are critical timing paths, where skew should be matched to within 10ps. Signal trace impedance should not vary more than 5%. If in doubt, perform TDR analysis of all high-speed signal traces. Maintain compact filter networks as close to filter pins as possible. Provide ground plane relief under filter path to reduce stray capacitance. Be careful of crosstalk coupling into the filter network. Maintain low jitter on the REFCLK input. Isolate the XTAL oscillator from power supply noise by adequately decoupling. Keep XTAL oscillator close to device, and minimize capacitive coupling from adjacent signals. Higher speed operation may require use of fundamental-tone (third-overtone typically have more jitter) crystal based oscillator for optimum performance. Evaluate and compare candidates by measuring TXCLK jitter. All unused outputs must be terminated. To conserve power, unused PECL outputs can be terminated with a 1k resistor to VEE. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL USA + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2006 Micrel, Incorporated. M9999-082107 hbwhelp@micrel.com or (408) 955-1690 15 |
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