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PJSD05LFN2
ESD PROTECTION DIODES
FEATURES
* IEC61000-4-2 Level 4 ESD Protection
0.026(0.65) 0.021(0.55)
0.042(1.05) 0.037(0.95)
* In compliance with EU RoHS 2002/95/EC directives
MECHANICAL DATA
* Case: DFN 2L, Plastic * Terminals: Solderable per MIL-STD-750, Method 2026
0.022(0.55) 0.017(0.45)
*
Polarity : see cathode band
0.002(0.05)MAX.
0.013(0.32) 0.008(0.22)
1 Cathode
2 Anode
PIN NO.1 IDENTIFICATION
MAXIMUM RATINGS
Rating To ta l P o we r D i s s i p a t i o n o n F R-4 B o a rd ( No te 1 )@ TA = 2 5 o C P e a k P o we r D i s s i p a ti o n 8 /2 0 S ur g e P uls e The r ma l Re s i s ta nc e J unc t i o n t o A mb i e nt L e a d S o ld e r Te m p e ra t ure - Ma xi m um ( 1 0 S e c o nd D ur a ti o n) O p e r a ti ng J unc t i o n a nd S t o ra g e Te m p e ra t ure Ra ng e
Symbol PD P PM R J A TL T J , T S TG
Value 250 40 500 260 -55 to +150
0.022(0.55) 0.047(0.45)
Units mW W
o
C/W
o
C C
o
Stresses exceeding Maximum Ratings may damage the device. Maximum Rating are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Note : 1.FR-4 = 70 x 60 x 1mm.
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
November 29,2010-REV.00
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PJSD05LFN2
ELECTRICAL CHARACTERISTICS (TA=25oC unless otherwise noted)
Parameter Maximum Reverse Peak Pulse Current Clamping Voltage@I PP Working Peak Reverse Voltage Maximum Reverse Leakage Current@VRWM Breakdown Voltage @ I T Test Current Forward Current Forward Voltage@I F Maximum Peak Power Dissipation Max.Capacitance@VR=0 and f=1MHz Symbol I PP VC VRWM IR VBR IT IF VF PPM C
ELECTRICAL CHARACTERISTICS (TA=25oC unless otherwise noted)
V BR@I T (Note 2) Mi n. V 6.2 C (Note 3) M a x. pF 35
V RWM Part Number Ma x. V PJSD05LFN2 5
I
R@ V RWM
VC I Ma x P e r 8 /2 0 s V 9.8 A 4 mA 1.0 BC
PP
IT Marking
Ma x. A 1
Note : 2.VBR is measured with a pulse test current IT at an ambient temperature of 25oC 3.Capacitance at f=1MHz, VR=0V, TA=25oC
November 29,2010-REV.00
PAGE . 2
PJSD05LFN2
110 100 90 80
V C, Clamping Voltage (V)
10 8 6 4 2 0
Percent of Ipp
70 60 50 40 30 20 10 0 0 Rise time 10-90% - 8m s 10 15 20
50% of Ipp @20 m s
25
30
0
1
2
3
4
5
time , m sec
I PP,8/20 m s Peak Pulse Current (A)
Fig.1 8/20s Peak Pulse Current Waveform
Fig.2 Typical Peak Clamping Voltage
C J ,Junction Capacitance (pF)
40
60
I R, Leakage Current (nA)
30
50 40 30 20 10 0 0 1 2 3
T J = 25 C
20
10
0 0 1 2 3 4 5
4
5
V R ,Reverse Bias Voltage (V)
V R, Reverse Voltage (V)
Fig.3 Typical Junction Capacitance
Fig.4 Typical Reverse Characteristics
I F, Forward Current (mA)
1000
300
P D, Steady-State Power Dissipation(mW)
TJ =150 C 100 TJ =125 C 10 TJ =75 C 1 0. 4 0. 6 0. 8 1 1. 2 TJ =25 C
250 200 150 100 50 0 0 25 50 75 100 125 150
V F, Forward Voltage (V)
T A, Ambient Temperature (C)
Fig.5 Typical Forward Characteristics
Fig.6 Power Derating Curve
November 29,2010-REV.00
PAGE . 3
PJSD05LFN2
MOUNTING PAD LAYOUT
DFN 2L
0.043 (1.10) 0.017 (0.42)
0.010 (0.26)
0.028 (0.70)
0.027 (0.68)
ORDER INFORMATION
* Packing information T/R - 8K per 7" plastic Reel
LEGAL STATEMENT Copyright PanJit International, Inc 2010
The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others.
November 29,2010-REV.00
PAGE . 4

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