 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| www..com RF9906 8 Typical Applications * CDMA/FM Cellular Systems * Supports Dual-Mode AMPS/CDMA * Supports Dual-Mode TACS/CDMA * General Purpose Downconverter * Commercial and Consumer Systems * Portable Battery Powered Equipment CDMA/FM LOW NOISE AMPLIFIER/MIXER Product Description The RF9906 is a receiver front-end designed for the receive section of dual-mode CDMA/FM cellular applications. It is designed to amplify and down-convert RF signals while providing 9dB of gain control range. Noise Figure, IP3, and other specs are designed to be compatible with the IS-95 Interim Standard for CDMA cellular communications. This circuit is designed as part of the RFMD CDMA Chip Set, consisting of this Receive LNA/ Mixer, a Receive IF AGC Amp, a Transmit IF AGC Amp, and a Transmit Upconverter. The IC is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and is packaged in a standard miniature 24-lead plastic SSOP package. .157 .150 1 .010 .004 .344 .337 .012 .008 .025 .244 .228 8MAX 0MIN .069 .053 8 FRONT-ENDS www..com .050 .016 .010 .008 Optimum Technology Matching(R) Applied Si BJT Si Bi-CMOS VCC1 1 GND1 2 LNA IN 3 GND2 4 IF2 5 GND3 6 IF SELECT 7 GND4 8 IF1+ 9 IF1- 10 GAIN 11 VCC2 12 IF GAIN ADJUST SELECT LOGIC GaAs HBT SiGe HBT GaAs MESFET Si CMOS 24 BYPASS 23 GND6 22 LNA OUT 21 GND7 20 MIX IN 19 GND8 18 MIN IN + 17 GND9 16 LO BUFF OUT 15 LO BUFF ENABLE 14 LO IN 13 LO IN + Features * Complete Receiver Front-End * Analog Gain Control * Single 3.6V Power Supply * Buffered LO Output * Digitally Selectable IF Outputs * 500MHz to 1500MHz Operation Ordering Information RF9906 RF9906 PCBA CDMA/FM Low Noise Amplifier/Mixer Fully Assembled Evaluation Board Functional Block Diagram RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Rev C5 000822 8-113 DataSheet 4 U .com www..com www..com 4U www..com RF9906 Absolute Maximum Ratings Parameter Supply Voltage Input LO and RF Levels Operating Ambient Temperature Storage Temperature Rating -0.5 to +5.0 +3 -40 to +85 -40 to +150 Unit VDC dBm C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Overall RF Frequency Range LO Frequency Range IF Frequency Range -15 -13 2.6 3.4 FRONT-ENDS Cascaded Performance to IF2 R F2 P Cascade Conversion Gain, Maximum Cascade Conversion Gain, Minimum Cascade IP3 Cascade Noise Figure 18.5 21 ct s 24 du 12 -15 ro -12.5 3.0 4.0 First Section (LNA) Noise Figure Input VSWR Input IP3 Gain Reverse Isolation Output VSWR 8-114 S T O N ee U de d 1.5 <1.5:1 -8 16 23 <1.5:1 pg ra 44 9 dBm dB dB dB dBm dB dB dBm dB dB 8 Cascade Conversion Gain, Maximum Cascade Conversion Gain, Minimum Cascade IP3 Cascade Noise Figure 21 dB & 27.5 30 33 dB By varying the gain of the second stage, a trade-off of gain and noise figure against IP3 can be made. VG 0.2V VG 2.5V Referenced to input at Maximum Gain Single sideband, at Maximum Gain Setting FM Mode, IF SEL.=0V, 850 load, 2.5dB Image Filter Loss. By varying the gain of the second stage, a trade-off of gain and noise figure against IP3 can be made. VG 0.2V VG 2.5V Referenced to input at Maximum Gain Single sideband, at Maximum Gain Setting The LNA section may be left unused. Power is not connected to pin 1. The performance is then as specified for the Second Section (Mixer). R F2 Cascaded Performance to IF1 S N IG S E D www..com W E N R O F 500 to 1500 500 to 1500 0.1 to 250 MHz MHz MHz Specification Min. Typ. Max. Unit Condition T = 25C, VCC =3.6V, RF=881MHz, LO=966MHz @ -5dBm CDMA Mode, IF SEL.=2.9V, 1k balanced load, 2.5dB Image Filter Loss. 46 1 Rev C5 000822 DataSheet 4 U .com www..com www..com 4U www..com RF9906 Parameter Second Section (Mixer, IF1 Output) Noise Figure Input VSWR Input IP3 Conversion Gain, Maximum Conversion Gain, Minimum Output Impedance 9.5 1.5:1 +2 16.5 5.5 1 dB dBm dB dB k Specification Min. Typ. Max. Unit Condition With 1k balanced load. By varying the gain of the second stage, a trade-off of gain and noise figure against IP3 can be made. Please see data plots. Single Sideband Single-ended At maximum gain VG 0.2V VG 2.5V Balanced With 850 load. By varying the gain of the second stage, a trade-off of gain and noise figure against IP3 can be made. Please see data plots. Single Sideband Single ended At maximum gain VG 0.2V VG 2.5V Single ended Single ended Voltage Current Consumption Rev C5 000822 S T O N ee U pg ra de d P ro 3.65% 7 41.5 39 32.5 30 ct s Power Supply 58 55 45 42 V mA mA mA mA mA LNA only LNA + Mixer, IF1, LO Buffer On LNA + Mixer, IF1, LO Buffer Off LNA + Mixer, IF2, LO Buffer On LNA + Mixer, IF2, LO Buffer Off du 8-115 DataSheet 4 U .com www..com www..com 4U FRONT-ENDS R LO Input Range LO Output Level LO Output Level LO to RF (Mix In) Rejection LO to IF1, IF2 Rejection LO Input VSWR -7.5 -6 to 0 -5 -35 27 20 <2:1 F2 -2.5 -30 44 9 LO Input & Noise Figure Input VSWR Input IP3 Conversion Gain, Maximum Conversion Gain, Minimum Output Impedance 11 1.5:1 +2 7.5 -4.5 850 dB dBm dB dB R F2 46 1 Second Section (Mixer, IF2 Output) S N IG S E D www..com W E N R O F dBm dBm dBm dB dB 8 Buffer On, -5dBm input Buffer Off, -5dBm input www..com RF9906 Pin 1 Function VCC1 Description Supply voltage for the LNA. External RF and IF bypassing is required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. Ground connection. Keep traces physically short and connect immediately to ground plane for best performance. RF input pin. This pin is internally DC blocked and matched to 50. VCC1 LNA OUT Interface Schematic 2 3 GND LNA IN 46 1 IF2 IF SELECT IF1+ 500 LO IN+ 4 5 GND IF2 Same as pin 2. 44 9 8 FRONT-ENDS 6 7 GND IF SELECT Same as pin 2. Selects which IF output (IF1 or IF2) is used. This is a digitally controlled input. A logic "high" selects IF1. A logic "low" selects IF2. The threshold voltage is approximately 1.3V. & R FM IF output pin. This is a single-ended output with an output impedance set by an internal 850 resistor to VCC. The resistor sets the operating impedance, but an external choke or matching inductor to VCC must be supplied in order to correctly bias this output. This inductor is typically incorporated in the matching network between the output and IF filter. Because this pin is biased to VCC, a DC blocking capacitor must be used if the IF filter input has a DC path to ground. 12 13 S T O N VCC2 LO IN+ Analog gain adjustment for both IF output buffer amplifiers. A 10k source impedance is required for proper operation of the gain control circuitry. Valid control voltages, on the source side of the 10k resistor, are from 0V to 2.9V. Minimum gain is selected with 2.4V to 2.9V. Maximum gain is selected with 0V to 0.2V. When operating the RF9906 at fixed maximum gain, this pin should be grounded through a 10k resistor. Do not connect this pin directly to ground (see Application Schematic for example). Supply Voltage for the Mixer, LO Buffer Amplifier, and IF Buffer Amplifiers. External RF and IF bypassing is required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane. Mixer LO Balanced Input Pin. This pin is internally DC biased and should be DC blocked if connected to a device with DC present. For single-ended input operation, one pin is used as an input and the other mixer LO input is AC coupled to ground. The single-ended input impedance is 50. Same as pin 13, except complementary input. ee U pg ra de d 10 11 IF 1GC CDMA IF output pin. This is a balanced output. The output impedance is set by an internal 500 resistor to VCC. Thus the output impedance of each pin is 500, whereas the differential output impedance is 1000. The resistor sets the operating impedance, but an external choke or matching inductor to VCC must be supplied in order to correctly bias this output. This inductor is typically incorporated in the matching network between the output and IF filter. Because this pin is biased to VCC, a DC blocking capacitor must be used if the IF filter input has a DC path to ground. Same as pin 9 except complementary input. R 8 9 GND IF 1+ Same as pin 2. S N IG S E D www..com W E N R O F LNA IN VCC 850 F2 30 k F2 ct s VCC2 500 IF1- P ro du See pin 9. LO IN- 14 8-116 LO IN- See pin 13. Rev C5 000822 DataSheet 4 U .com www..com www..com 4U www..com RF9906 Pin 15 Function Description Interface Schematic LO BUFFER Enable pin for the LO output buffer amplifier. This is a digitally conLO 30 k BUFFER trolled input. A logic "high" turns the buffer amplifier on, and the current ENABLE ENABLE consumption increases by 3mA (with -3dBm LO input). A logic "low" LO BUFFER OUT turns the buffer amplifier off. The threshold voltage is approximately 1.3V. Optional Buffered LO Output. This pin is internally DC blocked and matched to 50. The buffer amplifier is switched on or off by the voltage level at pin 15. 16 BIAS F2 Rev C5 000822 S T O N ee U pg ra de d P ro du ct s 23 24 GND BYPASS IF circuitry bypass pin. This pin should be well bypassed at the IF frequency in order to achieve specified FM (IF2) noise figure. The ground side of the bypass capacitor should connect immediately to ground plane. 1000pF is the suggested value. Smaller values will begin to slightly degrade noise figure. Larger values will slow down the IF1 to IF2 switching times. 8-117 DataSheet 4 U .com www..com www..com 4U FRONT-ENDS 21 22 Same as pin 2. R LNA Output pin. This pin is internally DC blocked and matched to 50 in order to facilitate an easy interface to a 50 Image Filter. Same as pin 2. 44 9 19 20 GND MIXER RF INGND LNA OUT Same as pin 18, except complementary input. & Same as pin 2. R Mixer RF Balanced Input Pin. This pin is internally DC biased and should be DC blocked if connected to a device with DC present. For single-ended input operation, one pin is used as an input and the other mixer RF input is bypassed to ground. In order to minimize the mixer's noise figure, the bypass capacitor must be a low input impedance at the IF frequency. The single-ended input impedance is 50. 46 1 MIXER RF IN+ 17 18 GND MIXER RF IN+ S N IG S E D www..com W E N R O F Same as pin 2. LO BUFFER OUT MIXER RF IN- F2 See pin 18. 8 See pin 3. www..com RF9906 Vcc 100 nF 1 nF 22 pF 1 2 24 23 22 21 1 nF 5 6 20 19 1 nF SELECT LOGIC 18 17 16 15 1 nF IF GAIN ADJUST 14 13 LO BUFFER OUT LO BUFFER ENABLE RF IMAGE FILTER, 50 RF IN L2 C2 1F2 OUT 3 4 FM IF Filter IF SELECT 7 8 CDMA IF Filter IF 1 OUT + C1 9 C1 10 L1 L1 11 12 8 FRONT-ENDS IF 1 OUT - VCC www..com 1 nF LO IN 100 nF 1 nF 22 pF 10 k GAIN ADJUST (0.2 - 2.9 V) 8-118 Rev C5 000822 DataSheet 4 U .com www..com www..com 4U www..com RF9906 from www.rfmd.com.) 9906400 Rev B P1-1 1 2 LNA INPUT J1 50 strip 3 C2 12 pF L1 280 nH P1-1 R5 0 P2-3 R1 1 k L3 120 nH P1-1 T1 C4 1 nF IF1 OUTPUT J3 50 strip R7 0 C5 10 pF C6 22 pF C3 1 nF 4 5 6 7 8 9 10 11 12 P1 P1-1 1 2 P1-3 3 VCC GND LO BUFFER ENABLE P2-3 P2-1 P2 1 2 3 GAIN GND R3 1 k R2 10 k IF GAIN ADJUST SELECT LOGIC 22 21 20 19 18 17 50 strip 16 15 14 13 R6 0 C9 1 nF C7 1 nF R4 1 k 50 strip LO INPUT J4 LO BUFFER OUT J5 P1-3 24 23 50 strip LNA OUT J7 C12 100 nF C1 22 pF C13 1 nF IF2 OUTPUT J2 50 strip C11 1 nF C10 1 nF 50 strip RF IN J6 8 P1-1 IF SELECT GAIN 0.5 V - 2.4 V P2-1 10 k source impedance Rev C5 000822 8-119 DataSheet 4 U .com www..com www..com 4U FRONT-ENDS www..com www..com RF9906 8 FRONT-ENDS www..com 8-120 Rev C5 000822 DataSheet 4 U .com www..com www..com 4U |
Price & Availability of RF9906
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |