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64-bit PCI-to-Fibre Channel Host Adapter Technical Data
HHBA-5100 Features
* Fibre Channel Data Transfer Rates: - Up to 100 MB/s (Half Duplex) - Up to 200 MB/s (Full Duplex) * Standard DB9 Physical Interface * Supports Fibre Channel Arbitrated Loop (FC-AL) Including Public Loop and Fabric (F- and FL-Port Login) * One or Less PCI Bus Interrupt per SCSI I/O Operation * 64-bit Universal PCI Interface, Compliant with PCI 2.1 * PCI Hot Plug Support * Supports PCI Dual Address Cycles (64-bit PCI Addressing)
Description
The HHBA-5100 is a 64-bit PCI-to-Fibre Channel Host Bus Adapter for mass storage applications that require FC-AL or Fabric, Class 3 and SCSI upper layer protocol handling. At the heart of the HHBA-5100 is the HPFC-5100 Tachyon TL Fibre Channel Interface Controller IC. The Tachyon TL controller is based on the proven TACHYON hardware state machine architecture. This architecture enables performance to scale proportional to the system CPU resources available and avoids bottlenecks associated with onchip processors. The TACHYON architecture is also designed to realize the full potential of Fibre Channel by providing the highest levels of concurrency via numerous independent functional hardware blocks that enable parallel control, command and data processing. The result is minimized latency and I/O overhead coupled with the highest levels of parallelism to provide maximum I/O rates and bandwidth.
Software Driver Support
The HHBA-5100 supports a comprehensive set of software drivers for major Operating Systems: Microsoft(R) Windows NT(R), Novell NetWare(R), SCO UnixWare(R), Solaris x86, and an I20 HDM. Additional drivers will be available soon.
Product Offering
The HHBA-5100 is available in three configurations. The HHBA-5100xK is a kit which includes an adapter card, manual and OS drivers on diskette. The HHBA-5100x and HHBA-5100xP are single and bulk packaged adapters, respectively.
Workstation and Server Applications
* Storage Area Networks (SANs) * Data Warehousing * Clustering * Remote Back-Up * Near On-Line Storage * Video Editing & CAD
Specifications
Fibre Channel Operation Fibre Channel Data Rate Topology Class Upper Layer Protocol Loop Initialization Arbitrated Loop Capabilities Link Diagnostics Compliance PCI Compliance Rate & Width Burst Transfer Rate Dual Address Cycle Support Additional PCI Features PCI Local Bus Specification v2.1 33 MHz, 64/32-bit PCI 264 Mbytes/second, guaranteed for length of frame, inbound & outbound at 64-bit, 33 MHz Yes Zero wait state multiple cache line bursting capable up to full frame size, 32-byte cache line 1 Gbit/sec, 100 Mbytes/sec (half duplex), 200 Mbytes/sec (full duplex) Arbitrated Loop - Public and Private, Fabric Support (F- and FL-login) 3 SCSI FCP - On-chip automation of complete SCSI I/O Completely hardware-based for high availability Loop map, Loop directed reset, Loop broadcast Link Status indicators, internal/external loopback FC-PH, FC-AL, FC-PLDA, FCP-SCSI
Tachyon TL Architectural Features Complete Hardware-based Design Numerous independent functional blocks concurrently processing inbound data, outbound data, control and commands in hardware Six DMA channels Automation of complete I/O on-chip in hardware Results in lowest latency & I/O overhead and highest levels of parallelism Physical and Environmental PCB Size PCB Power Supply Voltage Operating Temperature Range Storage Temperature Range Relative Humidity Operating System Support Microsoft Windows NT (x86) Novell NetWare SCO UnixWare Solaris x86 I20 HDM Certifications FCC Class B CE VCCI ITE Class C-TICK (AZ/NZS 3548) NT 4, Windows 2000 4.2 NWPA, 5.0 NWPA 7.0 7.0 1.5 Universal PCI short card 9 W max, 6 W typical at 5 V 5% 5 V 5% 0 to 55 Centigrade (no airflow) -40 to 70 Centigrade Up to 90% (non-condensing)
www.semiconductor.agilent.com Data subject to change. Copyright (c) 1999 Agilent Technologies, Inc. Obsoletes 5968-2346E 5968-6411E (11/99)

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