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| www..com LD39100XX LD39100XX12, LD39100XX25 1 A, low quiescent current, low noise voltage regulator Preliminary data Features Input voltage from 1.5 to 5.5 V Ultra low dropout voltage (200 mV typ. at 1 A load) Very low quiescent current (20 A typ. at no load, 200 A typ. at 1 A load, 1 A max in off mode) Very low noise with no bypass capacitor (30 VRMS at VOUT = 0.8 V) Output voltage tolerance: 2.0 % @ 25 C 1 A guaranteed output current Wide range of output voltages available on request: 0.8 V to 4.5 V with 100 mV step and adjustable from 0.8 V Logic-controlled electronic shutdown Stabilized with ceramic capacitors COUT = 1 F Internal current and thermal limit DFN6 (3 x 3 mm) package Temperature range: -40 C to 125 C An enable logic control function puts the LD39100xx in shutdown mode, allowing a total current consumption lower than 1 A. The device also includes short-circuit constant current limiting and thermal protection. Typical applications are printers, personal digital assistants (PDAs), cordless phones and consumer applications. DFN6 (3 x 3 mm) Description The LD39100xx provides 1 A maximum current from an input voltage ranging from 1.5 V to 5.5 V with a typical dropout voltage of 200 mV. The deveice is stable due to the use of ceramic capacitors on the input and output. The ultra low drop-voltage, low quiescent current and low noise features make it suitable for low power battery powered applications. Power supply rejection is 65 dB at low frequencies and starts to roll off at 10 kHz. Table 1. Device summary Part numbers LD39100XX LD39100XX12 LD39100XX25 Order codes LD39100PUR LD39100PU12R LD39100PU25R Output voltages Adj. from 0.8 V 1.2 V 2.5 V July 2009 Doc ID 15676 Rev 1 1/24 www.st.com 24 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. Contents www..com LD39100XX, LD39100XX12, LD39100XX25 Contents 1 2 3 4 5 6 Circuit schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1 6.2 6.3 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Power Good function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Different output voltage versions of the LD39100xx available on request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9 2/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Circuit schematics 1 Figure 1. Circuit schematics Schematic diagram for the LD39100PU IN Power-good signal IN PG BandGap reference OpAmp Current limit Thermal protection OUT ADJ EN Internal enable GND Figure 2. Schematic diagram for the LD39100PUxx IN Power-good signal IN PG BandGap reference OpAmp Current limit Thermal protection R1 NC OUT EN Internal enable R2 GND Doc ID 15676 Rev 1 3/24 Pin configuration www..com LD39100XX, LD39100XX12, LD39100XX25 2 Figure 3. Pin configuration Pin connection (top view) EN VIN NC VOUT EN VIN ADJ VOUT GND PG GND PG LD39100PUxx LD39100PU Table 2. Symbol Pin description Pin n Function LD39100PU LD39100PUxx 1 2 3 4 6 5 EXP pad Enable pin logic input: Low=shutdown, High=active Common ground Power Good Output voltage Adjust pin Input voltage of the LDO Not connected Exposed pad must be connected to GND 1 2 3 4 5 6 - EN GND PG VOUT ADJ VIN NC GND 4/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Maximum ratings 3 Table 3. Symbol VIN VOUT EN PG ADJ IOUT PD TSTG TOP Maximum ratings Absolute maximum ratings Parameter DC input voltage DC output voltage Enable pin Power Good pin Adjust pin Output current Power dissipation Storage temperature range Operating junction temperature range Value -0.3 to 7 -0.3 to VIN + 0.3 (7 V max) -0.3 to VIN + 0.3 (7 V max) -0.3 to 7 4 Internally limited Internally limited - 65 to 150 - 40 to 125 C C Unit V V V V V Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All values are referred to GND. Thermal data Parameter Thermal resistance junction-ambient Thermal resistance junction-case Value 55 10 Unit C/W C/W Table 4. Symbol RthJA RthJC Table 5. Symbol ESD ESD performance Parameter ESD protection voltage MM 0.4 kV Test conditions HBM Value 4 Unit kV Doc ID 15676 Rev 1 5/24 Electrical characteristics www..com LD39100XX, LD39100XX12, LD39100XX25 4 Electrical characteristics TJ = 25 C, VIN = 1.8 V, CIN = COUT = 1 F, IOUT = 100 mA, VEN = VIN, unless otherwise specified. Table 6. Symbol VIN VADJ IADJ VOUT VOUT VOUT VOUT Electrical characteristics for the LD39100PU Parameter Operating input voltage VADJ accuracy Adjust pin current Static line regulation Transient line regulation (1) Static load regulation Transient load regulation (1) VOUT+1 V VIN 5.5 V, IOUT=100mA VIN=500mV, IOUT=100mA, tR=5s VIN=500mV, IOUT=100mA, tF=5s IOUT=10mA to 1A IOUT=10mA to 1A, tR=5s IOUT=1A to 10mA, tF=5s IOUT=1A, VO fixed to 1.5V 40C 65 dB 62 20 50 200 300 0.001 0.92* VOUT 0.8* VOUT 0.4 1.5 V A 1 A SVR Supply voltage rejection VO=0.8V IQ Quiescent current IOUT=0 to 1A IOUT=0 to 1A, -40C V 6/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Electrical characteristics Table 6. Symbol VEN IEN tON TSHDN Electrical characteristics for the LD39100PU (continued) Parameter Enable input logic low Enable input logic high Enable pin input current Turn-on time (4) Test conditions VIN=1.5V to 5.5V, 40C Typ. Max. 0.4 Unit V V 0.9 0.1 30 160 100 nA s C Thermal shutdown Hysteresis Output capacitor Capacitance (see typical performance characteristics for stability) 1 20 22 F COUT 1. All transient values are guaranteed by design, not production tested 2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply for output voltages below 1.5 V 3. PG pin floating 4. Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching 95% of its nominal value Doc ID 15676 Rev 1 7/24 Electrical characteristics www..com LD39100XX, LD39100XX12, LD39100XX25 TJ = 25 C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 F, IOUT = 100 mA, VEN = VIN, unless otherwise specified. Table 7. Symbol VI Electrical characteristics for LD39100PUxx Parameter Operating input voltage VOUT>1.5V, IOUT=10mA, TJ = 25C VOUT>1.5V, IOUT=10mA, -40C VOUT accuracy VOUT VOUT VOUT VOUT VDROP eN Static line regulation Transient line regulation (1) Static load regulation Transient load regulation (1) Dropout voltage (2) Output noise voltage VOUT+1V VIN 5.5V, IOUT=100mA VIN=500mV, IOUT=100mA, tR=5s VIN=500 mV, IOUT=100mA, tF=5s IOUT=10 mA to 1A IOUT=10 mA to 1A, tR=5s IOUT=1A to 10mA, tF=5s IOUT=1A, VOUT > 1.5V, -40C SVR Supply voltage rejection VOUT=1.5V IQ Quiescent current IOUT = 0 to 1A IOUT = 0 to 1A -40C 8/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Electrical characteristics Table 7. Symbol IEN TON TSHDN Electrical characteristics for LD39100PUxx (continued) Parameter Enable pin input current Turn-on time (4) Thermal shutdown Hysteresis Output capacitor Capacitance (see typical performance characteristics for stability) 1 VEN = VIN Test conditions Min. Typ. 0.1 30 160 C 20 22 F Max. 100 Unit nA s COUT 1. All transient values are guaranteed by design, not production tested 2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply for output voltages below 1.5 V 3. PG pin floating 4. Turn-on time is time measured between the enable input just exceeding VEN high Value and the output voltage just reaching 95% of its nominal value Doc ID 15676 Rev 1 9/24 Typical performance characteristics www..com LD39100XX, LD39100XX12, LD39100XX25 5 Typical performance characteristics CIN = COUT = 1 F. Figure 4. VADJ accuracy Figure 5. VOUT accuracy 0.86 VIN = 1.8 V, VEN = VIN, IOUT = 10 mA 2.56 VIN = 3.5 V, VEN = VIN, IOUT = 10 mA 0.84 0.82 2.54 2.52 VOUT [V] 2.5 2.48 2.46 2.44 -50 -25 0 25 50 T [C] 75 100 125 150 VADJ [V] 0.8 0.78 0.76 0.74 -50 -25 0 25 50 T [C] 75 100 125 150 Figure 6. Dropout voltage vs. temperature Figure 7. Dropout voltage vs. temperature 350 300 Dropout [mV] 250 200 150 100 50 0 -50 -25 0 25 50 T [C] 75 100 125 150 VEN to VIN, VOUT = 2.5 V, IOUT = 1 A 400 350 Dropout [mV] 300 250 200 150 100 50 0 -50 VEN to VIN, VOUT @ 1.5 V, IOUT = 1 A -25 0 25 50 T [C] 75 100 125 150 Figure 8. Dropout voltage vs. output current Figure 9. Short-circuit current vs. drop voltage 0.25 VOUT @ 1.5 V VEN to VIN 3.5 VIN from 0 to 5.5 V, VEN to VIN, VOUT = 0.8 V 0.2 Dropout [V] 0.15 0.1 0.05 0 0 VOUT = 2.5 V 3 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 125 C 85 C 55 C 25 C 0 C -25 C -40 C ISC [A] 200 400 600 IOUT [mA] 800 1000 1200 5.5 6 Vdrop [V] 10/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Typical performance characteristics Figure 10. Output voltage vs. input voltage Figure 11. Output voltage vs. input voltage 1.2 VIN from 0 to 5.5 V, VEN to VIN, VOUT = 0.8 V, IOUT = 1 A 3 VIN from 0 to 5 V, VEN to VIN, VOUT = 2.5 V, IOUT = 1A 1 VOUT [V] VOUT [V] 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 VIN [V] 3.5 4 4.5 5 5.5 6 125C 85C 55C 25C 0C -25C -40C 0.8 125C 0.6 0.4 0.2 0 0 0.5 1 1.5 2 2.5 3 3.5 VIN [V] 4 4.5 5 85C 55C 25C 0C -25C -40C 5.5 6 Figure 12. Quiescent current vs. temperature Figure 13. VIN input current in off mode vs. temperature 0.6 VIN = 3.5 V, VEN to GND, VOUT = 2.5 V 140 120 100 80 60 40 20 0 -50 -25 0 25 50 T [C] 75 100 125 150 VIN = 1.8 V, VEN to VIN, VOUT = 2.5 V No Load IOUT = 1 A 0.5 Iq [A] 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 T [C] 75 100 125 150 Figure 14. Load regulation Iq [A] Figure 15. Line regulation 0.04 0.015 VIN = 3.5 V, IOUT = from 10 mA to 1 A, VEN=VIN, VOUT = 2.5 V 0.03 0.02 Line [%/V] 0.01 0 -0.01 -0.02 -0.03 -0.04 -50 VIN = from 1.8 V to 5.5 V, IOUT = 100 mA, VEN = VIN, VOUT = 0.8 V 0.01 Load [%/mA] 0.005 0 -0.005 -0.01 -0.015 -50 -25 0 25 50 T [C] 75 100 125 150 -25 0 25 50 T [C] 75 100 125 150 Doc ID 15676 Rev 1 11/24 Typical performance characteristics www..com LD39100XX, LD39100XX12, LD39100XX25 Figure 16. Line regulation Figure 17. Supply voltage rejection vs. temperature 0.04 0.03 0.02 Line [%/V] 0.01 0 -0.01 -0.02 -0.03 -0.04 -50 VIN = from 3.5 V to 5.5 V, IOUT = 100 mA, VEN = VIN, VOUT = 2.5 V 100 VIN from 1.7 V to 1.9 V, VEN to VIN, VOUT = 0.8 V 80 SVR [dB] 60 40 20 0 -50 Freq.10 kHz, IOUT = 100 mA Freq.1 kHz, IOUT = 10 mA -25 0 25 50 T [C] 75 100 125 150 -25 0 25 50 T [C] 75 100 125 150 Figure 18. Supply voltage rejection vs. temperature Figure 19. Supply voltage rejection vs. frequency 100 VIN from 2.9 V to 3.1 V, VEN to VIN, VOUT = 2.5 V 100 VIN from 1.55 V to 2.05 V, VEN to VIN, VOUT = 0.8 V IOUT = 10 mA IOUT = 100 mA 80 SVR [dB] SVR [dB] Freq. = 10 kHz, IOUT = 100 mA Freq. = 1 kHz, IOUT = 10 mA 80 60 40 20 0 60 40 20 0 -50 -25 0 25 50 T [C] 75 100 125 150 0 10 20 30 40 50 60 70 80 90 100 110 Freq [kHz] Figure 20. Supply voltage rejection vs. frequency Figure 21. Output noise voltage vs. frequency AP - IOUT = 100mA 100 90 80 70 60 50 40 30 20 10 0 0 2.5 VIN from 2.9 V to 3.1 V, VEN to VIN, VOUT = 2.5 V AP - IOUT = 10mA AP - IOUT = 1mA IOUT = 10 mA eN [V/SQRT(Hz)] IOUT = 100 mA 2.0 1.5 1.0 0.5 0.0 1.E+01 AP - IOUT = 0A SVR [dB] 10 20 30 40 50 60 70 80 90 100 110 Freq [kHz] 1.E+02 1.E+03 f [Hz] 1.E+04 1.E+05 VIN = 1.8 V, VOUT = 0.8 V, VEN = VIN 12/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Typical performance characteristics Figure 22. Enable voltage vs. temperature Figure 23. Load transient 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 VIN = 5.5 V IOUT = 100 mA, VOUT = 0.8 V High Low VOUT VEN [V] IOUT -25 0 25 50 T [C] 75 100 125 150 VEN= VIN=3.5V, VOUT=0.8V, IOUT= from10mA to 1A, tR= tF =5 s Figure 24. Load transient Figure 25. Load transient VOUT VOUT IOUT IOUT VEN= VIN=3.5V, VOUT=0.8V, IOUT= from100 mA to 1A, tR= tF =5 s VEN= VIN=3.5V, VOUT=2.5V, IOUT= from10 mA to 1A, tR= tF =5 s Figure 26. Load transient Figure 27. Line regulation transient VOUT VIN VOUT IOUT VEN= VIN=3.5V, VOUT=2.5V, IOUT= from100 mA to 1A, tR= tF =5 s VEN= VIN =1.8 V to 2.3 V, VOUT = 0.8V, IOUT=100 mA, tR = tF = 5 s Doc ID 15676 Rev 1 13/24 Typical performance characteristics www..com LD39100XX, LD39100XX12, LD39100XX25 Figure 29. Enable transient Figure 28. Startup transient VIN VEN VOUT VOUT VEN= VIN= from 0.8 V, VOUT=0.8 V, IOUT = 100 mA VEN= 0 to 2 V, VOUT=0.8 V, VIN = 3.5 V, IOUT = 100 mA, tR = 5 s Figure 30. ESR required for stability with ceramic capacitors Figure 31. ESR required for stability with ceramic capacitors 0.25 0.25 ESR @ 100 kHz [ohm] ESR @ 100kHz [] 0.2 UNSTABLE ZONE 0.2 0.15 0.1 UNSTABLE ZONE 0.15 0.1 STABLE ZONE STABLE ZONE 0.05 0 0.05 0 1 2 3 4 5 6 7 COUT [F] (nominal value) 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 2 3 4 5 6 7 COUT [F] (nominal value) 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 VIN = VEN = from 1.5 V to 5.5 V, VOUT = 0.8 V, IOUT = from 1 mA to 1 A VIN = VEN = from 3.5 V to 5.5 V, VOUT = 2.5 V, IOUT = from1 mA to 1 A 14/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Application information 6 Application information The LD39100xx is an ultra low dropout linear regulator. It provides up to 1 A with a low 200 mV dropout. The input voltage range is from 1.5 V to 5.5 V. The device is available in fixed and adjustable output versions. The regulator is equipped with internal protection circuitry, such as short-circuit current limiting and thermal protection. The regulator is stable due to ceramic capacitors on the input and the output. The expected values of the input and output ceramic capacitors are from 1 F to 22 F with 1 F typical. The input capacitor must be connected within 0.5 inches of the VIN terminal. The output capacitor must also be connected within 0.5 inches of output pin. There is no upper limit to the value of the input capacitor. Figure 32 and Figure 33 illustrate the typical application schematics: Figure 32. Typical application circuit for the fixed output version VIN 6 VIN PG 3 1 EN LD39100PUxx VOUT 4 VOUT CIN OFF ON GND 2 NC 5 COUT Figure 33. Typical application circuit for the adjustable version VIN 6 VIN PG 3 1 EN LD39100PU VOUT ADJ 4 VOUT R1 COUT R2 OFF ON CIN GND 2 5 Doc ID 15676 Rev 1 15/24 Application information www..com LD39100XX, LD39100XX12, LD39100XX25 For the adjustable version, the output voltage can be adjusted from 0.8 V up to the input voltage, minus the voltage drop across the PMOS (dropout voltage), by connecting a resistor divider between the ADJ pin and the output, thus allowing remote voltage sensing. The resistor divider should be selected using the following equation: VOUT = VADJ (1 + R1 / R2) with VADJ = 0.8 V (typ.) It is recommended to use resistors with values in the range of 10 k to 50 k. Lower values can also be suitable, but will increase current consumption. 6.1 Power dissipation An internal thermal feedback loop disables the output voltage if the die temperature rises to approximately 160 C. This feature protects the device from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without the risk of damaging the device. It is very important to use a good PC board layout to maximize power dissipation. The thermal path for the heat generated by the device is from the die to the copper lead frame through the package leads and exposed pad to the PC board copper. The PC board copper acts as a heat sink. The footprint copper pads should be as wide as possible to spread and dissipate the heat to the surrounding ambient. Feed-through vias to the inner or backside copper layers are also useful in improving the overall thermal performance of the device. The power dissipation of the device depends on the input voltage, output voltage and output current, and is given by: PD = (VIN -VOUT) IOUT The junction temperature of the device is: TJ_MAX = TA + RthJA x PD where: TJ_MAX is the maximum junction of the die,125 C; TA is the ambient temperature; RthJA is the thermal resistance junction-to-ambient. Figure 34. Power dissipation vs. ambient temperature 3.5 3 2.5 PD [W] 2 1.5 1 0.5 0 -50 -30 -10 10 30 50 70 90 110 130 TA [C] 16/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Application information 6.2 Enable function The LD39100xx features an enable function. When the EN voltage is higher than 2 V, the device is ON, and if it is lower than 0.8 V, the device is OFF. In shutdown mode, consumption is lower than 1 A. The EN pin does not have an internal pull-up, which means that it cannot be left floating if it is not used. 6.3 Power Good function Most applications require a flag showing that the output voltage is in the correct range. The Power Good threshold depends on the adjust voltage. When the adjust is higher than 0.92*VADJ, the Power Good (PG) pin goes to high impedance. If the adjust is below 0.80*VADJ the PG pin goes to low impedance. If the device is functioning well, the Power Good pin is at high impedance. If the output voltage is fixed using an external or internal resistor divider, the Power Good threshold is 0.92*VOUT. The use of the Power Good function requires an external pull-up resistor, which must be connected between the PG pin and VIN or VOUT. The typical current capability of the PG pin is up to 6 mA. The use of a pull-up resistor for PG in the range of 100 k to 1 M is recommended. If the Power Good function is not used, the PG pin must remain floating. Doc ID 15676 Rev 1 17/24 Package mechanical data www..com LD39100XX, LD39100XX12, LD39100XX25 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 18/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Package mechanical data DFN6 (3x3 mm) mechanical data mm. Dim. Min. A A1 A3 b D D2 E E2 e L 0.30 0.23 2.90 2.23 2.90 1.50 0.80 0 Typ. 0.90 0.02 0.20 0.30 3.00 2.38 3.00 1.65 0.95 0.40 0.50 0.012 0.38 3.10 2.48 3.10 1.75 0.009 0.114 0.088 0.114 0.059 Max. 1.00 0.05 Min. 0.031 0 Typ. 0.035 0.001 0.008 0.012 0.118 0.094 0.118 0.065 0.037 0.016 0.020 0.015 0.122 0.098 0.122 0.069 Max. 0.039 0.002 inch. 7946637A Doc ID 15676 Rev 1 19/24 Package mechanical data www..com LD39100XX, LD39100XX12, LD39100XX25 Tape & reel QFNxx/DFNxx (3x3) mechanical data mm. Dim. Min. A C D N T Ao Bo Ko Po P 3.3 3.3 1.1 4 8 12.8 20.2 60 18.4 0.130 0.130 0.043 0.157 0.315 Typ. Max. 330 13.2 0.504 0.795 2.362 0.724 Min. Typ. Max. 12.992 0.519 inch. 20/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Package mechanical data Figure 35. DFN6 (3 x 3) footprint recommended data Doc ID 15676 Rev 1 21/24 Different output voltage versions of the LD39100xx available on request www..com LD39100XX, 8 Different output voltage versions of the LD39100xx available on request Options available on request Order codes LD39100PU10R LD39100PU15R LD39100PU18R LD39100PU33R Output voltages 1.0 V 1.5 V 1.8 V 3.3 V Table 8. 22/24 Doc ID 15676 Rev 1 LD39100XX, LD39100XX12, LD39100XX25 www..com Revision history 9 Table 9. Date Revision history Document revision history Revision 1 Initial release. Changes 29-Jul-2009 Doc ID 15676 Rev 1 23/24 LD39100XX, LD39100XX12, LD39100XX25 www..com Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 24/24 Doc ID 15676 Rev 1 |
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