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| CS3706 CS3706 Description The CS3706 integrated circuit provides an interface between lowlevel TTL inputs and high-power switching devices such as power MOSFETs. A typical application is single-ended PWM control to pushpull power control conversion. DE SI GN Dual Output Driver source or sink up to 1.5A. An internal flip-flop, driven by doublepulse suppression logic, can be enabled to provide single-ended to push-pull conversion. With the flipflop disabled, the outputs work in parallel for 3.0A capability. Features The primary function of this device is to convert a bipolar single-ended low current digital input to a pair of totem pole outputs which can RE CO MM EN DE D AR CH IV FO E R N Block Diagram +5V Toggle Q Flip T Flop Q +5V A Ou tp ut Logic Protection functions are also included for pulse-by-pulse current limiting, automatic deadband control and thermal shutdown. s Dual 1.5A Totem Pole Outputs s 40nsec Rise and Fall into 1000pF s Parallel or Push-Pull Operation s Single-Ended to Push-Pull Conversion s High-Speed Power MOSFET Compatible s Low Cross-Conduction Current Spike s Analog Latched Shutdown s Internal Deadband Inhibit Circuit s Low Quiescent Current s 5V to 40V Operation s Thermal Shutdown Protection Package Options 16 Lead PDIP F/F Enable EW V CC INHIBIT A INHIBIT REF INHIBIT B INV NONINV -A + +5V V OUTA (Internally Fused Leads) INHIBIT B INV NONINV 1 2 3 4 5 16 15 14 13 12 11 10 9 NO T Inh Am p INHIBIT A INHIBIT REF VIN Gnd Gnd VOUTB STOP + STOP - +B - +5V Inh Am p +5V +5V Digital Input Logic +5V B Ou tp ut Logic Gnd Gnd DE VI CE +5V V OUT B +5V +V IN S to p Amp VOUTA 6 F/F ENABLE VCC Analog Stop Latch 7 8 V IN Logic Thermal Voltage Regulator Shutdown 130mV STOP + R S Note: All Four Ground Pins must be Connected to Common Ground. Gnd STOP - ON Semiconductor 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 N. American Technical Support: 800-282-9855 Web Site: www.cherry-semi.com December, 2001 - Rev. 2 1 CS3706 Absolute Maximum Ratings Logic Supply Voltage (VIN) ...................................................................................................................................................40.0V Output Supply Voltage (VCC) ...............................................................................................................................................40.0V Output Current (each output, source, or sink) Steady State ...............................................................................................................................................................500mA Peak Transient for Less Than 100s ...........................................................................................................................1.5A Capacitive Discharge Energy ......................................................................................................................................20.0J Digital Inputs (INV, NONINV) ..............................................................................................................................................5.5V Analog Inputs (STOP +, STOP -) ............................................................................................................................................VIN Inhibit Inputs (INHIBIT A, INHIBIT B, INHIBIT REF)......................................................................................................5.5V Operating Temperature Range .......................................................................................................................................0 to 70C Storage Temperature Range.......................................................................................................................................-65 to 150C Lead Temperature Soldering Wave Solder (through hole styles only).....................................................................................10 sec. max, 260C peak Notes: All voltages are with respect to the four ground pins which must be connected together. All currents are positive into, negative out of the specified terminal. Electrical Characteristics: These specifications apply over the operating temperature range of the IC. (VIN = VCC = 20V, Pins 4, 5, 12 &13 = 0V; unless otherwise stated.) TEST CONDITIONS MIN PARAMETER TYP MAX UNIT VIN Supply Current VCC Supply Current VCC Leakage Current Digital Input Low Level Digital Input High Level Digital Input Current Digital Input Leakage Output High Sat., VC-VOUT Output High Sat., VC-VOUT Output Low Sat., VOUT Output Low Sat., VOUT Inhibit Threshold Inhibit Threshold Inhibit Input Current Analog Threshold Analog Input Bias Current Thermal Shutdown Thermal Shutdown VIN = 40V, VCC = 20V, INV = 0V, Unused pins = open. VIN = 20V, VCC = 40V, Outputs low VIN = 0V, VCC = 40V 2.2 VI = 0V VI = 5V IOUT = -50mA IOUT = -500mA IOUT = 50mA IOUT = 500mA VREF = 0.5V VREF = 3.5V VREF = 0V VCM = 0V to 15 V VI = 0V, VCM = 15V Turn on Turn off 100 0.4 3.3 8 3 0.05 12 5 0.10 0.8 mA mA mA V V mA mA V V V V V V A mV A C C -0.6 0.05 -1.0 0.10 2.0 2.5 0.4 2.5 0.6 3.7 -10 130 -10 155 125 -20 150 -20 2 CS3706 Typical Switching Characteristics: (VIN = VCC = 20V, TA = 25C. Delays measured 50% in to 50% out.) PARAMETER TEST CONDITIONS OUTPUT CL = UNIT From Inv. Input to Output: Rise Time Delay 10% to 90% Rise Fall Time Delay 90% to 10% Fall From N.I. Input to Output: Rise Time Delay 10% to 90% Rise Fall Time Delay 90% to 10% Fall VC Cross-Conduction Current Spike Duration Inhibit Delay Analog Shutdown Delay Output Rise Output Fall Inhibit Ref. = 1V Inhibit = 0.5 to 1.5V Stop (+) Ref. = 0 Stop (-) Input = 0 to 0.5V open 110 20 80 25 120 20 100 25 25 0 250 180 1.0 130 40 90 30 130 40 120 30 2.2 140 60 110 50 140 60 130 50 nF ns ns ns ns ns ns ns ns ns ns ns ns Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION 16L PDIP (Internally Fused Leads) 1 2 3 4 5 6 7 INHIBIT B INV NONINV Gnd Gnd VOUT(A) F/F ENABLE Control pin for deadband control on Channel B. Inverting input for output drivers. Noninverting input for output drivers. Ground. Ground. Channel A output. Controls the phase of the two outputs. F/F ENABLE = Gnd Out of phase. F/F ENABLE = floating In phase. Supply voltage (5V to 40V) for output drivers. Inverting input for stop latch comparator. Noninverting input for stop latch comparator. Channel B output. Ground. Ground. Supply voltage (5V to 40V) for IC (except output driver). Reference input for deadband control. Control pin for deadband control on channel A. 8 9 10 11 12 13 14 15 16 VCC STOP STOP + VOUT(B) Gnd Gnd VIN INHIBIT REF INHIBIT A 3 CS3706 Circuit Description Outputs The totem-pole outputs have been designed to minimize cross-conduction current spikes while maximizing fast, high-current rise and fall times. Current limiting can be done externally either at the outputs or at the common VCC pin. The output diodes included have slow recovery and should be shunted with high-speed external diodes when driving high-frequency inductive loads. Flip/Flop Grounding F/F Enable activates the internal flip-flop to alternate the two outputs. With pin open, the two outputs operate simultaneously and can be paralleled for higher current operation. Since the flip-flop is triggered by the digital input, an off-time of at least 200nsec. must be provided to allow the flip/flop to change states. Note that the circuit logic is configured such that the "OFF" state is defined as the outputs low. Digital Inputs With both an inverting and non-inverting input available, either active-high or active-low signals may be accepted. These are true TTL compatible inputs-the threshold is approximately 1.2V with no hysteresis; and external pullup resistors are not required. Inhibit Circuit Although it may have other uses, this circuit is included to eliminate the need for deadband control when driving relatively slow bipolar power transistors. A diode from each inhibit input to the opposite power switch collector will keep one output from turning on until the other has turned-off. The threshold is determined by the voltage on INHIBIT REF which can be set from 0.5 to 3.5 V. When this circuit is not used, ground INHIBIT REF and leave INHIBIT A&B open. Analog Shutdown This circuit is included to get a latched shutdown as close to the outputs as possible, from a time standpoint. With an internal 130mV threshold, this comparator has a commonmode range from ground to (VIN - 3V). When not used, both inputs should be grounded. The time required for this circuit to latch is inversely proportional to the amount of overdrive but reaches a minimum of 180nsec. As with the flip-flop, an input off-time of at least 200nsec is required to reset the latch between pulses. Supply Voltage With an internal 5V regulator, this circuit is optimized for use with a 7 to 40V supply, however, with some slight response time degradation, it can also be driven from 5V. When VIN is low, the entire circuit is disabled and no current is drawn from VCC. When combined with a CS384X PWM, the Driver Bias switch can be used to supply VIN to the CS3706. VIN switching should be fast as undefined operation of the outputs may occur with VIN less than 5V. Thermal Considerations Should the chip temperature reach approximately 155C, a parallel, non-inverting input is activated driving both outputs to the low state. Truth Table INV. H L H L N.I. H H L L OUT L H L L OUT = INV and N.I. OUT = INV or N.I. 4 CS3706 Application Diagram 14V 10 5V VIN 3k REF 2k NONINV Input INV F/F ENABLE .047F INHIBIT A Gnd 100 VOUTB 10k 100F CS3706 VOUTA 100 10k RL VCC INHIBIT B .047F 5 CS3706 Package Specification PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA D Lead Count 16L PDIP (Internally Fused Leads) Metric Max Min 19.69 18.67 English Max Min .775 .735 Thermal Data RJC typ RJA typ 16 Lead PDIP (Internally Fused Leads) 15 50 C/W C/W 7.11 (.280) 6.10 (.240) 3.68 (.145) 2.92 (.115) RE CO MM EN DE D AR CH IV FO E R N .356 (.014) .203 (.008) 0.39 (.015) MIN. .558 (.022) .356 (.014) D 8.26 (.325) 7.62 (.300) 1.77 (.070) 1.14 (.045) REF: JEDEC MS-001 DE VI CE NO T Ordering Information Part Number CS3706GNF16 Description 16 Lead PDIP (Internally Fused Leads) 6 ON Semiconductor and the ON Logo are trademarks of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor reserves the right to make changes without further notice to any products herein. For additional information and the latest available information, please contact your local ON Semiconductor representative. (c) Semiconductor Components Industries, LLC, 2000 EW 2.54 (.100) BSC Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same. DE SI GN Plastic DIP (N); 300 mil wide Notes Notes |
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