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REVISION HISTORY
D D
SCHEMATICS REVISION
PCB DATE REVISION MODIFICATION ITEM DRAWING AND P.C.B. MODIFICATION DESCRIPTION
ITPA-CG-97015
APR.24'97
Subject :
8661 APPLICATION CIRCUIT.
VERSION 1.0
Version:1.1 ITPA-CG-97033 OCT.16'97 Changing pin18 from XTLO to GPIO
ITPA-CG-98005
JULY,20,98
ADD R5 FOR LED BLINKING
(PAGE 2)
VERSION : 2.0
C
C
B
B
|LINK |P2.SCH |P3.SCH |P4.SCH
8661 8667 & CONNECTORS ISA SLOT
A
A
ITE 8661 APPLICATION CIRCUIT Title THE REVISION HISTORY DOCUMENT Size B Date:
8 7 6 5 4 3
Document Number ITPA-CG-98005 Wednesday, June 19, 2002
2
Rev 2.0 Sheet 1
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of
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1
VCC 1 JP2 R1 2 VCC 1 4.7K R2
D
These are used to clarify different systems that use the same IT8661 I/O controller. (Please reference page 6-1 of the specification V0.5 of IT8661F/IT8661RF) JP1
3
2 4.7K 3 4 3 4 4 IRRX DACK3# IRRXF DRQ3 IOCHRDY IRRX IRRXF 3
It should be removed when the system only one IT8661F
D
for 16 bit decoder
U2 SA15 SA14 SA13 VCC SA12 AEN 1 2 3 6 4 5 A B C G1 G2A G2B 74LS138 VCC R3 330 RP1 LED1 LED R5 10K COM R1 R2 R3 R4 R5 6P5R-150 VCC Led blinking 3 24MHz 4 4 4 4 4 4 IRTX DRQ1 DACK1# DRQ0 IRQ5 IRQ10 IRQ11 IRTX DRQ1 DACK1# DRQ0 IRQ5 IRQ10 IRQ11 SA11 SA0 SA1 SA2 1 2 3 4 5 6 VCC GND VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 15 14 13 12 11 10 9 7 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 PIN46 DRQ3 IOCHRDY IRSINL1 GND DACK3# SA10 CN1 FDC CONNECTOR
DTR2# CTS2# RTS2# DSR2# TX2 RX2 DCD2# RI2# DCD1# RI1# DTR1# CTS1# RTS1# U1
3 3 3 3 3 3 3 3 3 3 3 3 3
4
AEN
DSKCHG SIDE1 RDATA WPT TK00 WGATE WDATA STEP DIR MOTEB DRVSA DRVSB MOTSA INDEX NC NC REDWC
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
C
2N3904 Q1
24 MHz clock input
B
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
IOCHRDY DRQ3 IRSINH1 A10 DACK3# GND IRSINL1 DTR2# CTS2#/A12 RTS2#/IRSINH2 DSR2#/A13 SO2/IRSOUT2 SI2/IRSINL2 RLSD2#/A14 RI2#/A15 RLSD1# RI1# DTR1# CTS1# RTS1#
34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
DENSEL# MOTEA# DRVB# DRVA# MOTEB# GND DIR# STEP# WDATA# WGATE# SIDE1# INDEX# TK00# WPT# VCC RDATA# DSKCHG# GPIO IRSOUT1 XTALI DRQ1 DACK1# DRQ0 IRQ5 IRQ10 IRQ11 A11 A0 A1 A2
DSR1# SOUT1 SIN1# AFD# STB# ERR# SLIN# INIT# VCC PD0 PD1 PD2 PD3 GND PD4 PD5 PD6 PD7 ACK# BUSY PE SLCT DACK0# RESET D7 D6 D5 D4 DRQ2 D3
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
VCC IPD0 IPD1 IPD2 IPD3 GND IPD4 IPD5 IPD6 IPD7
DSR1# TX1 RX1 AFD# STB# ERROR# SLIN# INIT#
3 3 3 3 3 3 3 3
C
IPD[0..7]
IPD[0..7] ACK# BUSY PE SLCT DACK0# RSTDRV
DACK0# SD7 SD6 SD5 SD4 SD3
3 3 3 3 3 4 4
DRQ2
4
B
A3 A4 A5 A6 TC DACK2# IRQ3 IRQ4 IRQ7 IRQ6 A7 A8 A9 IOR# IOW# AEN GND D0 D1 D2
VCC VCC 1 1 1 C1 .1UF 2 2 C2 .1UF 2 C3 .1UF VCC GND 4 SA[0..15] TC DACK2# IRQ3 IRQ4 IRQ7 IRQ6 IOR# IOW# SA[0..15]
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
8661
SD2 SD1 SD0 GND PIN46 IOW# IOR# SA9 SA8 SA7 IRQ6 IRQ7 IRQ4 IRQ3 DACK2# TC SA6 SA5 SA4 SA3 SD[0..7] SD[0..7] 4
A
4 4 4 4 4 4 4 4
A
ITE 8661 APPLICATION CIRCUIT Title 8661 WITHOUT IDE & GAME PORT Size B Date:
8 7 6 5 4 3
Document Number ITPA-CG-98005 Wednesday, June 19, 2002
2
Rev 2.0 Sheet 2
1
of
4
Specification Subject to Change Without Notice.
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5
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3
2
1
CN5 2
D
IRRX IRTX IRRXF
IRRX GND IRTX VCC IRRXF GND C4 .1UF
2 2
1 2 3 4 5 6 7
1 2 3 4 5 6 7 IR CONNECTOR
D
U3 2 2 2 2 2 2 2 2 RI1# DTR1# CTS1# RTS1# TX1 DSR1# RX1 DCD1# -12V 12 13 14 15 16 17 18 19 10 RY5 DA3 RY4 DA2 DA1 RY3 RY2 RY1 -12V GD75232 RA5 DY3 RA4 DY2 DY1 RA3 RA2 RA1 +12V 9 8 7 6 5 4 3 2 1 NRI1 NDTR1 NCTS1 NRTS1 NTX1 NDSR1 NRX1 NRLSD1 +12V 2 2 2 2 2 2 2 2 RI2# DTR2# CTS2# RTS2# TX2 DSR2# RX2 DCD2# 12 13 14 15 16 17 18 19 10
U4 RY5 DA3 RY4 DA2 DA1 RY3 RY2 RY1 -12V GD75232 RA5 DY3 RA4 DY2 DY1 RA3 RA2 RA1 +12V 9 8 7 6 5 4 3 2 1 NRI2 NDTR2 NCTS2 NRTS2 NTX2 NDSR2 NRX2 NRLSD2 +12V NRLSD1 NTX1 GND NRTS1 NRI1
CN2 1 3 5 7 9 2 4 6 8 10 NRX1 NDTR1 NDSR1 NCTS1
C
COM1/3 +12V
C
-12V
-12V
CN3 NRLSD2 NTX2 GND NRTS2 NRI2 RP2 9P8R-2K 1 1 RP3 9P8R-2K 1 3 5 7 9 2 4 6 8 10 NRX2 NDTR2 NDSR2 NCTS2
D1 VCC 1N4148
COM2/4
2 3 4 5 6 7 8 9
BUSY PE SLCT
2 3 4 5 6 7 8 9
B
R4 2K RN1 2 2 2 2 AFD# STB# SLIN# INIT# 2 4 6 8 8P4R-10K 2 2 ERROR# IPD[0..7] 1 3 5 7 AUTOFD# STROBE# SLCTIN# BINIT# SLCTIN# BINIT# ERROR# AUTOFD# CN4 RN2 IPD0 IPD1 IPD2 IPD3 2 4 6 8 8P4R-10K RN3 IPD4 IPD5 IPD6 IPD7 2 4 6 8 8P4R-10K 1 3 5 7 PPD7 1 3 5 7 PPD0 PPD1 PPD2 PPD3 PPD4 PPD5 STROBE# 1 2 3 4 5 6 7 8 9 10 11 12 13 STB PPD0 PPD1 PPD2 PPD3 PPD4 PPD5 PPD6 PPD7 ACK BUSY PE SLCT PRINT-S AFD ERROR INIT SLIN GND GND GND GND GND GND GND GND N/C 14 15 16 17 18 19 20 21 22 23 24 25 26
B
IPD[0..7]
A
A
ACK# BUSY PE SLCT
ITE GND C18 180PF C19 180PF C20 180PF C21 180PF C5 180PF C9 180PF C6 180PF C10 180PF C7 180PF C11 180PF C8 180PF C12 180PF C13 180PF C14 180PF C15 180PF C16 180PF C17 180PF 8661 APPLICATION CIRCUIT Title 75232 & COM,PRINTER,IR CONNECTOR Size B Date: Document Number ITPA-CG-98005 Wednesday, June 19, 2002
2
Rev 2.0 Sheet 3
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of
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3
VCC
Specification Subject to Change Without Notice.
VCC GND
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2
1
2
SD[0..7]
SD[0..7] SLOT2 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 9 8 7 6 5 4 3 2 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 45 44 43 42 51 61 58 11 33 50 48 57 46 59 39 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 IOR# IOW# SMEMR# SMEMW# SYSCLK OSC T/C AEN RESDRV REFRESH# DACK1# DACK2# DACK3# BALE OWS CON62 IOCHK# IOCHRDY IRQ9 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 DRQ1 DRQ2 DRQ3 +12V -12V GND GND GND -5V +5V +5V 1 10 35 56 55 54 53 52 49 37 47 40 38 62 32 41 36 34 60 IRQ9 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 DRQ1 DRQ2 DRQ3 +12V -12V VCC BC1 10UF IOCHRDY IRQ9 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 DRQ1 DRQ2 DRQ3 +12V -12V BC2 10UF 2 2 2 2 2 2 2 2 2
D
2
SA[0..15]
SA[0..15]
D
VCC VCC GND
VCC
2 2
C
IOR# IOW#
IOR# IOW#
BC5 10UF
BC4 10UF
BC3 10UF
C
2 2 2 2 2 2
TC AEN RSTDRV DACK1# DACK2# DACK3#
TC AEN RSTDRV DACK1# DACK2# DACK3#
SLOT1 11 12 13 14 15 16 17 18 2 3 4 5 1 9 10 26 28 30 32 6 7 8 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 LA23 LA22 LA21 LA20 SBHE MEMR# MEMW# DACK0# DACK5# DACK6# DACK7# LA19 LA18 LA17 CON36 MASTER# MEM16# IO16# DRQ0 DRQ5 DRQ6 DRQ7 IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 +5V GND 35 19 20 27 29 31 33 21 22 23 24 25 34 36
DRQ0
2
B
B
IRQ10 IRQ11
IRQ10 IRQ11
2 2
VCC
2
DACK0#
A
A
ITE 8661 APPLICATION CIRCUIT Title ISA SLOT Size B Date:
8 7 6 5 4 3
Document Number ITPA-CG-98005 Wednesday, June 19, 2002
2
Rev 2.0 Sheet 4
1
of
4
Specification Subject to Change Without Notice.

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