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Product Data Sheet
FX-102
Frequency Translator
Output frequencies up to 155.52 MHz Low Jitter PECL Output Locked to specified Input frequency, e.g. 8 kHz Single 5.0 Vdc or 3.3 Vdc supply Lock / Loss of Signal Alarm 1" x 0.8" x 0.2", Surface Mount (FR4 base)
SONET / SDH / ATM / DSL-PON interconnects 8 kHz/16.384 MHz/19.44 MHz to 155.52 MHz
FX-102
Lock Detect
VCXO Monitor Disable
Input Frequency
Frequency Divider
Phase Freq Detector
Loop Filter
PECL VCXO
Q Q
Frequency Divider
Frequency Select
Microprocessor
Vectron's FX-102 is a crystal based frequency translator which is used to translate any input frequency such as 8 kHz, 1.544 MHz, 2.048 MHz, 19.440 MHz etc. to any specific frequency from 77.76 to 155.52 MHz. The input frequency does not have to be a 50/50% duty cycle and as an example can be an 8 kHz signal with a logic high "on time" of only 1us, such as a BITS clock. The FX-102 also has the ability to translate up to any of 4 different input frequencies to one common output frequency, such as input frequencies of 8 kHz and 1.544 MHz and 19.44 MHz and any other frequency between 333 Hz and 155.52 MHz translating them to any specific output frequency from 77.76 MHz to 155.52 MHz. The "Input Frequency tracking capability" is the total amount of input frequency deviation in which the FX-102 is guaranteed to track or translate. As an example, a typical input clock would be 8 kHz 20 ppm. The FX-102 is guaranteed to track at least 40 ppm of error over temperature/ aging/ power supply and is more than twice what most applications require. The PLL control voltage is brought out through a 470K ohm resistor. This would allow for the use of external circuitry (analog comparators or an A/D converter plus a processor) to detect when the control voltage is getting close to the limits of the pull range.
Supply Voltage, Supply Current Input Signal,
C = 5 Vdc D = 3.3 Vdc A = HCMOS D = PECL
VDD VDD IDD CLKIN CLKIN --VOH VOL VOH VOL tR/tF Sym
4.75 3.15
5.00 3.30 45 HCMOS PECL
5.25 3.45 70
Vdc Vdc mA -----
OUTPUT, F = Comp PECL VOH (Temp Range C = 0 to +70 C C) VOL VOH VOL
(Temp Range C = 0 to +70 C C) (Temp Range F = -40 to +85 C C) (Temp Range F = -40 to +85 C C)
--VDD-1.025 VDD-1.810 VDD-1.085 VDD-1.830
PECL
--VDD-0.880 VDD-1.620 VDD-0.880 VDD-1.555
--V V V V ns % ps ps us ppm
Rise / Fall Time Output Symmetry Jitter Generation, rms (12 kHz to 20 MHz) Jitter Generation, rms(cycle to cycle method) Min Pulse Width @ 8 kHz Input Frequency Tracking Capability (Can translate a Stratum 1,2,3,3E,4 or SONET Min source) Operating Temperature Size
0.5 45 <0.5 3 1
1 55 1
APR
+/-40 Temp Range C = 0 to +70 C C Temp Range F = -40 to +85 C C See page 3 for outline Drawings and Dimensions
mm (in)
6.35 (0.25) 17.78 (0.70) 2.54 (0.10)
1.01 (0.040)
3.81 (0.15)
1.73 (0.068) 1.73 (0.068)
20.32 (0.80)
25.4 (1.00)
1 2 3
CLKIN GND LD (Output)
Logic "1" indicates a locked condition and requires a couple hundred pF capacitor to ground to operate correctly. Logic "0" indicates that no input signal is detected and can be used as a loss-of-signal alarm. Toggles when not locked. Under locked conditions, should be >0.3V and <3.0 V for the 3.3 volt option or >0.5V and <4.5V for the 5 volt option. Input frequency may be out of range if voltage exceeds these limits.
Input Frequency Ground Lock Detect
4 5 6 7 8
Monitor (Output) NC NC GND Disable (Input) OUT COUT NC Select A Select B NC GND VDD
PLL/ VCXO control voltage No Connection No Connection Ground Disables Output
Logic "1" = Output disabled Logic "0" (or no connect) = Output enabled
9 10 11 12 13 14 15 16
VCXO Output (PECL) Complementary VCXO Output (PECL) No Connection Do not Exceed Vdd (NC for one input frequency) Do not Exceed Vdd
(NC for one or two input frequencies)
No Connection Ground Power Supply Voltage (5 Vdc or 3.3 Vdc)
mm (in)
2.54 (0.10)
1.91 (0.075) 3.04 (0.12)
19.05 (0.75) 9.53 (0.375)
8.89 (0.35) 17.78 (0.70)
Temperature ( C)
pre-heating 60 to 90 sec. @ 140 to 160 C C
reflow 40 to 60 sec. @ >183 C
NOTE: This FX-102 should not be subjected to a wash process that will immerse it in solvents. NO CLEAN is the recommended procedure.
VDD
f1 f2 f3 f4
8 kHz 1.544 MHz 2.048 MHz 19.44 MHz
*
74LS151 Multiplexer (MUX)
(16)
*
(3) (4) (8) Q (10) Q (9)
*
(Fin)
(1)
Input Frequency
FX-102
Lock Detect
VCXO Monitor
Disable
Frequency Divider
Phase Freq Detector
Loop Filter
PECL VCXO
B
Frequency Select
Microprocessor
Frequency Divider
155.52 MHz (Fout)
A (12/13) Input Freq. f1 f2 f3 f4 Select AB 00 01 10 11
(2,7,15)
= = = =
AB
*Note: VI highly recommends either a linear regulator or bypass capacitors; 10 uF, ferrite bead, 0.1 uF and a 100pF capacitor would be typical.
All components outside the dotted line box are user supplied components and/or connections. This is just one possible configuration of the FX-102. For additional information about your specific needs please contact our Factory.
FAQ s
Q: What are the different input frequencies Available? A: The FX-102 is able to handle any input frequency between 333 Hz and 155.52 MHz. (A list of standard frequencies is available on page 7.) Q: How many different input frequencies can a specific FX-102 accept? A: Each FX-102 can be programmed to accept up to 4 different frequencies. Q: If there is only one input pin, how can your unit accept 4 different frequencies? A: The customer is required to supply a multiplexer which would switch between the different input frequencies. The multiplexersselect pins would need to be sync to d the select pins of the FX-102. (The drawing above illustrates this configuration.)
Output Frequency
1.00 GHz--666.5143 MHz--622.08 MHz---
FX-104
Future
Comp. PECL Output
155.52 MHz---
FX-102
Comp. PECL Output
77.76 MHz---
FX-101
HCMOS or Comp. PECL Output
1.024 MHz---
FX-101
FX-102
FX-104
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid exposure to electrostatic discharge (ESD) during handling and mounting. VI employs a human-body model (HBM) and a charged-device model (CDM) for ESD-susceptibility testing and protection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used to define the mode.
Although no industry-wide standard has been adopted f or the CDM, a standard HBM (resistance = 1500 ohms, capacitance = 100pf) is widely used and therefore can be used for comparison purposes. The HBM ESD threshold presented here was obtained by using these circuit parameters.
ESD Threshold Voltage Model Human-Body (HBM) Charged-Device Threshold 500 500 Unit V min V min
333 Hz 2 kHz 8 kHz 16 kHz 64 kHz 1.024 MHz 1.544 MHz 2.048 MHz 4.096 MHz
A B C D E F H J K
8.192 MHz 13.00 MHz 16.384 MHz 19.44 MHz 20.48 MHz 26.00 MHz 27.00 MHz 38.88 MHz 44.736 MHz
L M N P R T W X Y
51.84 MHz 61.44 MHz 77.76 MHz 82.944 MHz 112 MHz 139.264 MHz 155.52 MHz Special SCD
0 1 2 3 4 5 6 S
FX-102 Supply Voltage C = +5 Vdc +/-5% D = +3.3 Vdc +/-5% Output Type F = Comp. PECL Temperature Range C = 0 to +70 C F = -40 to +85 C
X F X -X X X X
Output Frequency See Frequency Chart Above Input Frequency See Frequency Chart Above
If not listed or more than one frequency enter S in this block and then list all the input frequencies after the part number.
Number of Input Frequencies 1 = 1 input Frequency 2 = 2 input Frequencies 3 = 3 input Frequencies 4 = 4 input Frequencies Input Logic A = HCMOS D = PECL
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