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| Application Note Designing with Xicor Digitally Controlled Potentiometers (XDCPs) Introduction The use of Xicor's nonvolatile digital potentiometers (XDCPs) can simplify and/or solve many mixed signal design problems. However, in some applications, a deeper understanding of XDCP technology may be required during the design process. In this note, additional information is provided relating to resolution, wiper noise, temperature coefficients, wiper current limitations, wiper leakage current, terminal voltage limitations, independent linearity, frequency response, hysteresis, reliability failure rates, and logarithmic tapers. A summary of available XDCPs and associated parameters is also included to aid the designer in choosing the correct device. Using the information and tips provided, a designer should be able to overcome most design problems that could be encountered. AN53 Resolution Simply put, the resolution of a potentiometer is a measure of the difference between adjacent tap positions. In a ratiometric application, this would correspond to a voltage step, whereas in resistive applications, the resolution more closely corresponds to an incremental resistance. A theoretical resolution can be defined as a measurement of the sensitivity to which the output ratio may be adjusted and is equivalent to the reciprocal of the number of taps (neglecting tap zero) expressed as a percentage. The precision with which this can be set is often called the adjustability or setability. On standard XDCPs, either 256, 124, 32, or 16 taps are available to the hardware designer, providing resolutions of 1.01%, 1.59%, and 3.23% respectively. These resolutions are approximately constant from tap to tap (though the relative linearity is more conservatively specified to be 20%) and the potentiometer exhibits monotonic behavior as the wiper is moved. With quad devices (i.e. X9241A), internal cascading can be implemented with software commands, allowing up to 253 taps (0.39% resolution). On the newer generation XDCPs, even higher resolutions will be possible using dual 128 tap and dual 256 tap devices. However, with standard XDCPs, extremely high resolutions are already possible with external hardware or the use of certain software schemes (see Xicor application note AN43 "Software Implements a High Resolution Nonvolatile Digital Potentiometer"). A similar analysis will hold for XDCPs connected as rheostats, however it should be noted that there will always be a small MOSFET channel resistance in series with the wiper terminal, due to the NMOS wiper transistor switch, which limits the minimum possible resistance in those applications. This wiper resistance can even manifest itself to a lesser extent in ratiometric applications by adding a term to the voltage divider expression. A simple formula to determine the channel resistance of these long channel wiper transistors (operated in the triode region) is given in Eq. (1.1), along with the conditions for the triode region of operation in Eq. (1.2). Eq. (1.1) W R DS = ------- ---- ( V GS - V t ) t OX L Eq. (1.2) -1 ( V GS - V t ) > V DS > 0 It can be seen from Eq. (1.1) that the MOSFET channel resistance is inversely proportional to VGS. Since the source of the transistor is connected to the wiper terminal (which can have a varying voltage), the gate voltage of the wiper transistor in an XDCP must be maintained at a high enough voltage to guarantee operation in the triode region. Internally, this is accomplished with another charge pump (which generates between July, 2002 www.xicor.com 1 of 7 Application Note 10V and 18V depending on tap position and device). With appropriate substitutions, this resistance can be estimated from Eq. (1.3) with VW as the wiper voltage in volts and T in degrees Celsius, using the parameters from the chart in Figure 4 of this note. Eq. (1.3) AN53 R W = [ K 1 ]V W + K 2 Nominally, this resistance is 40, but it increases as temperature increases and has been measured to be as high as 90 over the industrial temperature range (-40C to +85C). The voltage drop across this wiper transistor is equal to VDS and can be approximated for various wiper currents using Eq. (1.4), which is an equation for IDS of a MOSFET operated in the triode region. Eq. (1.4) 2 W I DS = ------- ---- ( V - V )V - ( V DS ) ---------------- t OX L GS t DS 2 bias for the IC die). For each charge pump, there must necessarily be an associated oscillator. It is these oscillators which contribute high frequency noise to signals on the wiper of the potentiometer. However, with knowledge of the cutoff frequency and internal oscillator frequencies of a particular XDCP, this effect can be minimized. The most direct solution is to add a first order lowpass filter to the wiper terminal in order to attenuate all of these unwanted frequencies. Since there is a wiper resistance (Eq. (1.1)) associated with every XDCP, simply connecting a capacitor between the wiper and VSS will implement a passive RC filter. This wiper resistance varies due to loading and temperature, so a more accurate way of connecting an RC lowpass filter is to add a known resistance in series with the wiper and use that value for calculating the size of the wiper capacitor. Using Eq. (1.6) and the information in Table 1, the appropriate value for the capacitor can be determined for either technique. Eq. (1.6) Using some substitutions based upon Xicor process and design parameters, this equation reduces to the expression in Eq. (1.5), where VDS is in units of volts. Eq. (1.5) 159 x 10 3 f ( Hz ) = ----------------------RC The units for Eq. (1.6) are Hz, , and F. Typically, a low cost, 20% monolithic capacitor of appropriate size connected between the wiper terminal and VSS is sufficient to significantly attenuate the charge pump noise contribution. For example, with a X9C103, which has a -3dB frequency of 300KHz and an oscillator frequency of 2.5MHz, an approximate wiper capacitor is calculated to be between 0.013F and 0.0016F, assuming a wiper resistance of 40. By choosing a 0.013F capacitance, the wiper noise would be attenuated by -23dB compared to an unfiltered wiper. Unrelated to the charge pump are other inherent noise sources common to all CMOS devices. In particular, XDCPs exhibit both thermal and flicker noise components. Overall, Xicor specifies a noise for an XDCP which is equivalent to 1V per square root Hz. An estimate of the total wiper noise from all sources in the XDCP can be obtained from Eq. (1.7) I W ( mA ) = ( 49.5 - 3.3V DS ) ( V DS ) Resolutions can also be expressed in terms of dynamic range (DR). At approximately 6dB/bit, a 100 tap XDCP has an equivalent DR of 39dB. Similarly, DRs of 36dB and 30dB exist for the 64 and 32 tap XDCPs respectively. Wiper Noise An EEPROM cell requires a high voltage to initiate Fowler-Nordheim tunneling, the phenomenon upon which much of the industry bases its EEPROM technology. In order to generate such voltages (as high as 18V), Xicor devices use an internal charge pump. There are other aspects of Xicor's process that also require the use of charge pumps (e.g. to provide a negative substrate July, 2002 www.xicor.com 2 of 7 Application Note Eq. (1.7) AN53 Wiper Current Limitations An important specification on XDCPs is the 1mA wiper current limit. However, the motivation behind this specification is primarily historical. On Xicor's older NMOS processes, the 1mA limit was required due to electromigration concerns with the metallization process. This was an industry wide reliability concern that sparked considerable research several years ago. For semiconductor devices, high currents, coupled with small crosssectional areas for aluminum metal lines, can lead to early device failures due to the migration of the Al ions. These failures often occur as open circuits (and occasionally short circuits) on the IC itself. Since the electromigration issue relates to long term reliability, the concern here is to avoid continuous operation in a mode that could lead to a failure, consequently DC current levels are of primary concern. An expression for the predicted mean time before a failure is given by Eq. (1.9). Eq. (1.9) noise amplitude ( V p - p ) ( 6.6V p - p ) [ f ] Where f (in Hz) is the bandwidth of interest for signals on the wiper, the result is a magnitude of peak to peak noise superimposed on the wiper voltage. Temperature Coefficients Often, the performance of a circuit over temperature is a crucial design consideration. For this reason, Xicor XDCPs contain a unique compensation scheme to minimize the resistive drifts due to temperature variations. The principle here is similar to the operation of circuitry in a low drift voltage reference. In those references, different active devices (Zener diodes, BJTs, MOSFETs, etc.) have differing parameter drifts over temperature. By combining those that have negatively sloped drifts with those that have positively sloped drifts, in the right configuration, an output voltage drift can be held "flat" over the temperature range of interest. Though XDCPs, utilize an entirely different implementation (i.e. there are no active elements), the principle is the same. This can be very important when a highly accurate bias voltage needs to be maintained over extreme temperature swings. In Eq. (1.8), the standard definition for a temperature coefficient is given in equation form. Eq. (1.8) -Ea 1 MTBF = ---- exp -------- kT J2 This Arhennius relationship expresses how strongly related electromigration failures and current densities are on a chip. The exponential dependence upon temperature is exhibited as well. The constant of proportionality can be determined by experimentation, assuming an average Ea of 0.44eV. Notice that a tripling of current density anywhere that electromigration exists will reduce the MTBF nine-fold! Though these effects have not been entirely eliminated, good design as well as the use of several fabrication tricks have made electromigration less problematic than it once was. In order to make the newer CMOS parts as compatible as possible to existing NMOS parts, this 1mA limit, which has always been related to long term reliability, was also adopted. Though Xicor now adds copper ions to the aluminum metallization to improve reliability, this 1mA limit has been retained. A more realistic, yet still conservative DC wiper current limit for the CMOS devices would be on the order of 3.5mA. ( R1 - R2 ) TC ( ppm C ) = ----------------------------- ( 10 6 ) R1 ( T2 - T1 ) The temperature coefficient expresses a resistive drift in parts per million per degree centigrade, where R1 is the resistance at reference temperature T1 and R2 is the resistance at the test temperature T2. For XDCPs, the ratiometric temperature coefficients are good (at 20-30 ppm/C) due to the resistor ladder structure, however the end-to-end resistance temperature coefficients are typically an order of magnitude or more higher. July, 2002 www.xicor.com 3 of 7 Application Note When larger currents must be controlled, many techniques can be used to boost the current supplied by a given wiper voltage. A straightforward and practical example would use the buffering voltage follower op amp configuration in Figure 1. If the current gain of the op amp is too small, then additional gain stages could also be added on the output of the op amp. A wiper capacitor is shown here to diminish wiper noise on the op amp input. However, there are many other possible circuits to accomplish current gains for the XDCP wiper currents. AN53 Here, g is a process parameter that is generally between 0.5 and 2 for any particular semiconductor manufacturer. This effect can cause VW 5mV to 10mV in the worst case scenarios. Returning CS to the previous level will remove DVW from the wiper as well. Terminal Voltage Limitations Occasionally there is a need for a higher or lower tolerance on the terminal voltages of an XDCP. On typical devices, the limit is 5V with respect to VSS, however on the X9312, a range between VSS and +15V is allowed. The issue limiting the terminal voltages has to do with specific breakdown mechanisms in the MOSFET structure. As the wiper decode logic attempts to maintain a steady voltage across the gate and source of the transistor, any increase in the voltage at the source must result in an increase of the voltage applied at the gate. Beyond a certain level, PN junction breakdown occurs. By limiting the voltages allowed at the source, as well as preventing the decode circuitry from generating excessive voltages, this breakdown can be avoided. Unfortunately, this limits the voltages allowed on the terminals (VH and VL). Since expansion of this range is limited by design and process considerations, external techniques must be employed to accomplish this task. Figure 2 shows a simple configuration that can generate an output voltage with a larger swing than that from an individual XDCP. In this circuit, current gain can also be realized depending on the output of the op amp. Also, another technique is shown for reducing wiper noise. Here the capacitor is attached across the input terminals of a non-inverting op amp scheme. VH U1 INC UD CS 1 2 7 INC VH U/D VW CS VL X9CMVE 3 5 6 + VOUT VL Figure 1. Voltage Follower to Increase Output Current Wiper Leakage Current On XDCPs which have differing fOSC1, fOSC2, and fOSC3 oscillator frequencies (see Table 1), slight voltage changes can appear on the wiper terminal depending on the whether CS is asserted or not (or whenever a nonvolatile store is being performed). This has often been misinterpreted as a DC leakage current, however, this is not the case. The phenomenon that is actually being observed is the body effect, an inherent MOSFET mechanism which modulates a transistor's threshold voltage whenever the voltage between the bulk and the source is not exactly zero (i.e. | VBS | 0). Since the bulk (substrate) potential of an XDCP die is charge pumped down to a negative substrate voltage (VBB), fluctuations in this substrate voltage will alter VBS, thus changing the threshold voltage as well. Eq. (1.10) shows this relationship. Eq. (1.10) VH U1 INC UD CS 1 2 7 V+ INC VH U/D VW CS VL X9CMVE 3 5 6 + VL V- VOUT V t = V t0 + ( s + V BS ) + s Figure 2. Op Amp Circuit to Increase Output Voltage Range July, 2002 www.xicor.com 4 of 7 Application Note Independent Linearity With potentiometers, independent linearity is defined to be the maximum deviation from ideal behavior, expressed as a percentage of the voltage applied across the terminals. With XDCPs, similar information can be obtained using the absolute linearity specification. For this measurement, Xicor refers to a minimum increment (MI) unit that is defined in Eq. (1.11). Eq. (1.11) AN53 to ground. Remember that the end-to-end resistance will vary from device to device, thus, in critical designs the appropriate error margins must be considered. In the case of the logarithmic taper XDCPs, the mid-range tap positions do not correspond to mid-range of the end-toend resistance. Hysteresis One interesting quirk in the behavior of mechanical potentiometers is that there is a sort of "hysteresis" effect on the wiper voltage when changing wiper positions. The potentiometer's electrical characteristics won't change until a certain amount of mechanical travel has occurred by the knob. This results in a "lurching" behavior that makes fine trimming rather tedious. With Xicor's digital potentiometers, this behavior is entirely avoided. Another measure of hysteresis would be the change in output voltage at a certain wiper tap when the wiper is moved to either full scale (or zero scale) and then returned to the original tap position. Since Xicor devices are strictly monotonic and avoid the mechanical behavior of traditional potentiometers, any movement of the wiper will result in a change to the wiper voltage and for any movement from an initial tap position to other tap positions and back to the initial tap position, it can be observed that XDCPs exhibit no hysteresis effects (i.e. the wiper returns precisely to the same voltage). VH - VL ------------------------- = 1 MI #TAPS - 1 Converting this absolute linearity specification (Eq. (1.12)) into an independent linearity, it is seen that all 100 tap XDCPs exhibit a 1.01% independent linearity. Eq. (1.12) V W ( actual ) - V W ( exp ected ) 1 MI 1 LSB From these definitions, equivalent INL (integral nonlinearity) and DNL (differential non-linearity) can be determined for XDCPs. The INL is 1 LSB and the DNL is 0.2 LSB. Frequency Response The frequency response of any XDCP will be limited by the response of its RC time constant. Xicor characterizes a typical -3dB point (1/2 power point) for a given end-toend resistance by taking measurements when the wiper is set to a mid-range tap position. Due to variations in the end-to-end resistance of a given device (Xicor specifies 20% on this parameter) and the likelihood that useful circuits will require tap settings outside of mid-range, the frequency response of an XDCP will show some variance. However, for any fixed tap position, this -3dB point exhibits little dependence on fluctuations in Vcc and sub or temperature. For tap positions other than mid-range, estimations for the frequency response can be carried out assuming between 90pF and 110pF for the total wiper capacitance Reliability Failure Rates With or without a knowledge of the number of transistors on a die, an MTBF can be calculated to determine the average lifetime of an IC. For the X9CMME family of XDCPs, internal qualification data has yielded an MTBF of 2154 years based on the number of failures (0 out of 353) during a 1000 hour dynamic life test at 150C. This data could also be expressed as 53 FITs at 55C for a 60% upper confidence limit. The number of FITs is equivalent to the number of failures per billion device hours (see Xicor reliability reports RR-520 and RR-515 for a more complete explanation of the FITs parameter). This data helps predict the reliability of the standard logic on an XDCP, but similar results would be July, 2002 www.xicor.com 5 of 7 Application Note obtained for the charge pump and EEPROM cell circuitry. However, some electromigration failures might occur on the resistor chain before anything else on the IC fails, particularly if the 1mA limit is not strictly observed. The exact lifetimes for various wiper current loads are not explicitly known, however similar results will be obtained in a reliability analysis for any of Xicor's XDCPs. AN53 avoid audible "clicking" sounds on the speaker while the wiper position is being adjusted. The differing device technologies are summarized in Table 2 along with several other pertinent parameters. Logarithmic Tapers With some XDCPs, the option to have a logarithmic taper instead of a linear taper exists. The logarithmic version of the X9313 is the X9314. Currently, these devices are available in 1K, 10K, and 50K end-toend resistances. A typical logarithmic response is shown in Figure 3. NMOS and CMOS XDCP Differences Xicor introduced the first XDCPs in 1984 using an NMOS technology. When these devices were replaced by CMOS designs, an extra standby current mode was added that allowed for the power savings benefits of CMOS circuitry. To implement this extra mode, a NOR gate was added between the CS and INC inputs. When the output of this NOR gate is HIGH, the wiper transistor decoder is enabled and the wiper position can be moved. Consequently on power-up, if both of these pins are held LOW, then the wiper position will be recalled from the EEPROM and the wiper will move one additional position depending on the state of the U/D pin. Subsequent movements require that the output of this gate see a rising edge, thus either CS or INC must be "clocked" in order for the wiper to be moved any further. This behavior can cause the power-up wiper positions to be off by one tap position if precautions are not taken. The standby power mode is available on all CMOS XDCPs. Another difference that exists between the NMOS wiper and CMOS wiper XDCPs is the length of time it takes to de-select the previous wiper position and select the new wiper position, when changing taps. Because the switching of these FETs works in a "make-beforebreak" mode, the use of NMOS wiper XDCPs in certain audio configurations may require extra precautions to 0 Attenuation (dB) -20 -40 -43.5 -60 31 28 24 20 16 12 TAP Position 8 4 0 Figure 3. Typical Logarithmic Taper Response of an X9514 or X9314 K1 -1 -2 -3 -4 -40 0 40 80 90 K2 K2 60 40 20 0 K1 Figure 4. K1 and K2 for use in equation (1.3) July, 2002 www.xicor.com 6 of 7 Application Note Table 1: XDCP Parameter Summary (fOSC1 = CS LOW, fOSC2 = CS HIGH, fOSC3 = during nonvolatile store) XDCP X9C102[2] X9C103[2] X9C503[2] X9C104[2] X9311Z[3] X9311W[3] X9311U[3] X9311T[3] X9312Z X9312W X9312U X9312T X9313Z X9313W X9313U X9313T X9314W X9315Z X9315W X9511Z X9511W X9514W X9221AY X9221AW X9221AU X9241AY X9241AW X9241AU X9241AM X94xx family 1. 2. 3. 4. AN53 fOSC1 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz N/A N/A 2.5 MHz 2.5 MHz 2.5 MHz 2.0 MHz[4] 2.0 2.0 2.0 MHz[4] MHz[4] MHz[4] fOSC2 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 0.8 MHz 0.8 MHz 0.8 MHz 0.8 MHz 0.8 MHz N/A N/A 0.8 MHz 0.8 MHz 0.8 MHz 2.0 MHz[4] 2.0 2.0 2.0 MHz[4] MHz[4] MHz[4] fOSC3 2.5 MHz 2.5 MHz 2.5 MHz 2.5 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz 5.0 MHz f-3dB[1] TAPS 100 100 100 100 100 100 100 100 100 100 100 100 32 32 32 32 32 32 32 32 32 32 64 64 64 64 64 64 64 64-256 VH, VL 5V 5V 5V 5V +10V +10V +10V +10V +15V +15V +15V +15V 5V 5V 5V 5V 5V +5V +5V 5V 5V 5V +5V/-3V +5V/-3V +5V/-3V +5V/-3V +5V/-3V +5V/-3V +5V/-3V 5V RTOT 1 K 10 K 50 K 100 K 1 K 10 K 50 K 100 K 1 K 10 K 50 K 100 K 1 K 10 K 50 K 100 K 10 K, logtaper 1 K ext. voltage 10 K ext. voltage 1 K 10 K 10 K, logtaper 2 K, dual 10 K, dual 50 K, dual 2 K, quad 10 K, quad 50 K, quad combo, quad SPI and I2C ext. voltage 2.0 MHz[4] 2.0 MHz[4] 2.0 MHz[4] N/A 2.0 MHz[4] 2.0 MHz[4] 2.0 MHz[4] N/A For more information on frequency response, see "Frequency Response Characteristics of Xicor's Digitally-Controlled (XDW) Potentiometers" in Xicor's Design Engineering Bulletin 26. On older X9CMME devices, fOSC2 is 0.8MHz. Obsolete part. No CS on part, parameter is active at all times, except during nonvolatile stores. July, 2002 www.xicor.com 7 of 7 |
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