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M
Features
* * * * * * * * * * * Low Quiescent Current: 600 nA/comparator (typ.) Rail-to-Rail Input: V SS - 0.3V to VDD + 0.3V Open-Drain Output: VOUT 10V Propagation Delay 4 s (typ.) Wide Supply Voltage Range: 1.6V to 5.5V Single available in SOT-23-5, SC-70-5 packages Available in Single, Dual and Quad Chip Select (CS) with MCP6548 Low Switching Current Internal Hysteresis: 3.3 mV (typ.) Industrial Temperature: -40C to +85C
MCP6546/7/8/9
Description
The Microchip Technology Inc. MCP6546/7/8/9 family of comparators is offered in single (MCP6546), single with chip select (MCP6548), dual (MCP6547) and quad (MCP6549) configurations. The outputs are open-drain and are capable of driving heavy DC or capacitive loads. These comparators are optimized for low power, single-supply application with greater than rail-to-rail input operation. The output limits supply current surges and dynamic power consumption while switching. The open-drain output of the MCP6546/7/8/9 family can be used as a level-shifter for up to 10V using a pull-up resistor. It can also be used as a wired-OR logic. The internal Input hysteresis eliminates output switching due to internal noise voltage, reducing current draw. These comparators operate with a single-supply voltage as low as 1.6V and draw less than 1 A/ comparator of quiescent current. The related MCP6541/2/3/4 family of comparators from Microchip has a push-pull output that supports rail-torail output swing and interfaces with CMOS/TTL logic.
Open-Drain Output Sub-Microamp Comparators
Typical Applications
* * * * * * * * Laptop Computers Mobile Phones Metering Systems Hand-held Electronics RC Timers Alarm and Monitoring Circuits Windowed Comparators Multi-vibrators
Related Devices
* CMOS/TTL-Compatible Output: MCP6541/2/3/4
Package Types
MCP6546 PDIP, SOIC, MSOP
NC VIN- VIN+ VSS
1 2 3 4
+
MCP6546-R SOT-23-5
OUT 1 VDD 2 VIN+ 3
5 VSS
+
MCP6547 PDIP, SOIC, MSOP
1 2 3 4
-+ +-
MCP6549
PDIP, SOIC, TSSOP
OUTA 1
14 OUTD
- + + - 13 VIND-
8 NC 7 VDD 6 OUT 5 NC
OUTA VINA- VINA+ 4 VIN- VSS
8 VDD
7 OUTB VINA- 2 6 VINB- VINA+ 3 VDD 4 5 VINB+
12 VIND+ 11 VSS 10 VINC+
- + +-
MCP6546 SOT-23-5, SC-70-5
OUT 1 VSS 2 VIN+ 3 5 VDD
+
MCP6548 PDIP, SOIC, MSOP
NC VIN- VIN+ VSS
1 2 3 4
+
VINB+ 5 VINB- 6 OUTB 7
8 CS 7 VDD 6 OUT 5 NC
9 VINC- 8 OUTC
4 VIN-
2003 Microchip Technology Inc.
DS21714C-page 1
MCP6546/7/8/9
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
VDD - VSS ..............................................................7.0V Open-Drain output..................................... VSS +10.5V All inputs and outputs ........... VSS -0.3V to VDD +0.3V Difference Input voltage ............................ |VDD - VSS| Output Short-Circuit Current .......................continuous Current at Input Pins .........................................2 mA Current at Output and Supply Pins .................. 30 mA Storage temperature .......................... -65C to +150C Maximum Junction Temperature (TJ) ............... +150C ESD protection on all pins (HBM;MM)..........4 kV;200V
Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
PIN FUNCTION TABLE
NAME FUNCTION VIN +, VINA+, VINB+, VINC +, VIND + Non-Inverting Inputs VIN -, VINA-, VINB-, VINC-, VIND- Inverting Inputs VDD VSS OUT, OUTA, OUTB, OUTC, OUTD CS NC Positive Power Supply Negative Power Supply Outputs Chip Select Not Connected
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, V DD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, VIN- = VSS, RPU = 2.74 k to VPU = VDD (Refer to Figure 1-3).
Parameters
Power Supply Supply Voltage Quiescent Current per comparator Input Input Voltage Range Common Mode Rejection Ratio Common Mode Rejection Ratio Common Mode Rejection Ratio Power Supply Rejection Ratio Input Offset Voltage
Sym
V DD IQ VCMR CMRR CMRR CMRR PSRR VOS VOS/TA VHYST VHYST/TA VHYST/TA IB IB IOS ZCM ZDIFF VPU IOH VOL ISC COUT
Min
1.6 0.3 VSS - 0.3 55 50 55 63 -7.0 -- 1.5 -- -- -- -- -- -- -- VDD -100 VSS -- --
Typ
-- 0.6 -- 70 65 70 80 1.5 3 3.3 10 5 1 -- 1 1013||4 1013||2 -- -- -- 50 8
Max
5.5 1 V DD + 0.3 -- -- -- -- +7.0 -- 6.5 -- -- -- 100 -- -- -- 10 -- VSS + 0.2 -- --
Units
V A V dB dB dB dB mV mV IOUT = 0
Conditions
V DD = 5V, VCM = -0.3V to 5.3V V DD = 5V, VCM = 2.5V to 5.3V V DD = 5V, VCM = -0.3V to 2.5V V CM = VSS V CM = VSS (Note 1) V CM = VSS (Note 1)
Drift with Temperature
Input Hysteresis Voltage Drift with Temperature Drift with Temperature Input Bias Current Over Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Open-Drain Output Output Pull-Up Voltage High-Level Output Current Low-Level Output Voltage Short-Circuit Current Output Pin Capacitance Note 1: 2: 3:
V/C TA = -40C to +85C, VCM = VSS V/C TA = -40C to +25C, VCM = VSS V/C TA = +25C to +85C, VCM = VSS pA pA pA ||pF ||pF V nA V mA pF (Note 2) V DD = 1.6V to 5.5V, VPU = 10V (Note 2) IOUT = 2 mA, VPU = VDD = 5V V PU = VDD = 5.0V (Note 2) V CM = VSS TA = -40C to +85C, VCM = VSS (Note 3) V CM = VSS
The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. Do not short the output above VSS + 10V. Limit the output current to Absolute Maximum Rating of 30 mA. The comparator does not function properly when VPU < VDD. Input bias current overtemperature is not tested for the SC-70-5 package.
DS21714C-page 2
2003 Microchip Technology Inc.
MCP6546/7/8/9
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, V DD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN+ = VDD/2, Step = 200 mV, Overdrive = 100 mV, RPU = 2.74 k to VPU = VDD, and CL = 36 pF (Refer to Figure 1-2 and Figure 1-3). Parameters Fall Time Propagation Delay (High-to-Low) Propagation Delay (Low-to-High) Propagation Delay Skew Maximum Toggle Frequency Input Noise Voltage Note 1: 2: Sym tF tPHL tPLH tPDS fMAX fMAX EN Min -- -- -- -- -- -- -- Typ 0.7 4.0 3.0 -1.0 225 165 200 Max -- 8.0 8.0 -- -- -- -- Units s s s s kHz kHz V P-P (Note 1) (Notes 1 and 2) VDD = 1.6V VDD = 5.5V 10 Hz to 100 kHz (Note 1) Conditions
tR and tPLH depend on the load (RL and C L); these specifications are valid for the indicated load only. Propagation Delay Skew is defined as: tPDS = tPLH - tPHL.
SPECIFICATIONS FOR MCP6548 CHIP SELECT
Electrical Specifications: Unless otherwise indicated, V DD = +1.6V to +5.5V, VSS = GND, TA = 25C, VIN + = VDD /2, VIN- = VSS, RPU = 2.74 k to VPU = VDD , and CL = 36 pF (Refer to Figures 1-1 and 1-3).
Parameters
CS Low Specifications CS Logic Threshold, Low CS Input Current, Low CS High Specifications CS Logic Threshold, High CS Input Current, High CS Input High, VDD Current CS Input High, GND Current Comparator Output Leakage CS Dynamic Specifications CS Low to Comparator Output Low Turn-on Time CS High to Comparator Output High Z Turn-off Time CS Hysteresis
Sym
Min
Typ
Max
Units
Conditions
V IL ICSL
VSS --
-- 5
0.2VDD --
V pA CS = VSS
VIH ICSH IDD ISS IO(LEAK)
0.8V DD -- -- -- --
-- 1 18 -20 1
VDD -- -- -- --
V pA pA pA pA CS = VDD CS = VDD CS = VDD VOUT = VSS+10V
tON tOFF VCS_HYST
-- -- --
2 10 0.6
50 -- --
ms s V
CS = 0.2VDD to VOUT = VDD/2, VIN - = VDD CS = 0.8VDD to VOUT = VDD/2, VIN - = VDD VDD = 5V
CS tON VOUT ISS ICS Hi-Z
VIL
VIH tOFF Hi-Z -0.6 A, typ. -20 pA, typ. 1 pA, typ.
VIN- VIN+ = VDD/2 tPLH VOUT 100 mV VOH tPHL
100 mV
-20 pA, typ. 1 pA, typ.
VOL
VOL
FIGURE 1-1: Timing Diagram for the CS pin on the MCP6548.
FIGURE 1-2: Diagram.
Propagation Delay Timing
2003 Microchip Technology Inc.
DS21714C-page 3
MCP6546/7/8/9
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V and VSS = GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC-70 Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: JA JA JA JA JA JA JA JA -- -- -- -- -- -- -- -- 331 256 85 163 206 70 120 100 -- -- -- -- -- -- -- -- C/W C/W C/W C/W C/W C/W C/W C/W TA TA TA -40 -40 -65 -- -- -- +85 +125 +150 C C C Note Sym Min Typ Max Units Conditions
The MCP6546/7/8/9 operates over this extended temperature range, but with reduced performance. In any case, the Junction Temperature (TJ) must not exceed the absolute maximum specification of +150C.
1.2
Test Circuit Configuration
This test circuit configuration is used to determine the AC and DC specifications. VDD VPU = VDD 200 k 200 k 100 k VIN = V SS VSS = 0V
MCP654X
RPU 2.74 k VOUT 36 pF
FIGURE 1-3: AC and DC Test circuit for the open- drain output comparators.
DS21714C-page 4
2003 Microchip Technology Inc.
MCP6546/7/8/9
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = +1.6V to +5.0V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RPU = 2.74 k to V PU = VDD, and CL = 36 pF.
14% Percentage of Occurrences 12% 10% 8% 6% 4% 2% 0% -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 Input Offset Voltage (mV) 5 6 7 18% Percentage of Occurrences 16% 14% 12% 10% 8% 6% 4% 2% 0% 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 Input Hysteresis Voltage (mV)
1200 Samples VCM = VSS
1200 Samples VCM = VSS
FIGURE 2-1: Input Offset Voltage Histogram at VCM = VSS .
16% Percentage of Occurrences 14% 12% 10% 8% 6% 4% 2% 0% -14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 Input Offset Voltage Drift (V/C)
FIGURE 2-4: Input Hysteresis Voltage Histogram at VCM = VSS.
26% 24% 22% 20% 18% 16% 14% 12% 10% 8% 6% 4% 2% 0% 2 3
1200 Samples VCM = VSS
Percentage of Occurrences
1200 Samples VCM = VSS
TA = 25C to 85C
TA = -40C to 25C
4 5 6 7 8 9 10 11 12 13 14 15 16 Input Hysteresis Voltage Drift (V/C)
FIGURE 2-2: Input Offset Voltage Drift Histogram at VCM = VSS.
500 400 300 200 100 0 -100 -200 -300 -400 -500 -40 -20 VCM = VSS VDD = 1.6V
FIGURE 2-5: Drift Histogram.
6.0 Input Hysteresis Voltage (mV) 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 -40 -20
Input Hysteresis Voltage
Input Offset Voltage (V)
VCM = VSS
VDD = 1.6V
VDD = 5.5V
VDD = 5.5V
0 20 40 60 Ambient Temperature (C)
80
0 20 40 60 Ambient Temperature (C)
80
FIGURE 2-3: Input Offset Voltage vs. Ambient Temperature at VCM = VSS .
FIGURE 2-6: Input Hysteresis Voltage vs. Ambient Temperature at VCM = VSS .
2003 Microchip Technology Inc.
DS21714C-page 5
MCP6546/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.0V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RPU = 2.74 k to V PU = VDD, and CL = 36 pF.
Input Hysteresis Voltage (mV)
2.0 Input Offset Voltage (mV) 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0
VDD = 1.6V
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5
TA = 85C
VDD = 1.6V TA = 85C TA = 25C
TA = 25C TA = -40C
TA = -40C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
-0.4
-0.2
2.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8 5.5
-0.4
-0.2
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-7: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.6V.
2.0 Input Offset Voltage (mV) 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -0.5 6.0 Common Mode Input Voltage (V) TA = 25C TA = -40C TA = 85C VDD = 5.5V
FIGURE 2-10: Input Hysteresis Voltage vs. Common Mode Input Voltage at VDD = 1.6V.
Input Hysteresis Voltage (mV) 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -0.5 Common Mode Input Voltage (V) 6.0
VDD = 5.5V
TA = 85C TA = 25C TA = -40C
FIGURE 2-8: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V.
CMRR, PSRR; Input Referred (dB) 90 85 80 75 70 65 60 55 -40 -20 0 20 40 60 80 Ambient Temperature (C)
CMRR, VIN + = -0.3V to 2.5V, VDD = 5.0V CMRR, VIN+ = -0.3V to 5.3V, VDD = 5.0V CMRR, VIN+ = 2.5V to 5.3V, VDD = 5.0V PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V
FIGURE 2-11: Input Hysteresis Voltage vs. Common Mode Input Voltage at VDD = 5.5V.
24 22 20 18 16 14 12 10 8 6 4 2 0
TA = 85C VDD = 5.5V Input Bias Current
Input Current (pA)
Input Offset Current
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V)
FIGURE 2-9: CMRR, PSRR vs. Ambient Temperature at VCM = VSS.
FIGURE 2-12: Input Bias Current, Input Offset Current vs. Common Mode Input Voltage at +85C.
DS21714C-page 6
2003 Microchip Technology Inc.
2.0
MCP6546/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.0V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RPU = 2.74 k to V PU = VDD, and CL = 36 pF.
22 20 18 16 14 12 10 8 6 4 2 0 -2
0.7
VDD = 5.5V VCM = VDD
TA = +85C TA = +25C TA = -40C
0.6 Quiescent Current (A/comparator) 0.5 0.4 0.3 0.2 0.1 0.0
Input Current (pA)
Input Bias Current
Input Offset Current
25
35
45
55
65
75
85
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V)
Ambient Temperature (C)
FIGURE 2-13: Input Bias Current, Input Offset Current vs. Ambient Temperature.
0.7
FIGURE 2-16: Quiescent Current vs. Power Supply Voltage.
0.7
Quiescent Current (A/comparator)
0.6 Quiescent Current (A/comparator) 0.5 0.4 0.3 0.2 0.1 0.0 -40 -20
VDD = 5.5 V VDD = 1.6 V
0.6 0.5 0.4 0.3 0.2 0.1 0.0
VDD = 5.5V IQ does not include pull-up resistor current
Sweep VIN+, VIN- = VDD/2 Sweep VIN-, VIN+ = VDD/2
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0
20
40
60
80
Ambient Temperature (C)
-0.5
Common Mode Input Voltage (V)
FIGURE 2-14: Quiescent Current vs. Ambient Temperature vs. Power Supply Voltage.
0.7 0.6 Quiescent Current (A/comparator) 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -0.4 -0.2 2.0 Common Mode Input Voltage (V)
Sweep VIN+, VIN- = VDD/2 Sweep VIN-, VIN+ = VDD/2
FIGURE 2-17: Quiescent Current vs. Common Mode Input Voltage at VDD = 5V.
50 Output Short Circuit Current (mA) 45 40 35 30 25 20 15 10 5 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Power Supply Voltage (V) 5.0 5.5
-IOSC , TA = -40C -I OSC, TA = +25C -IOSC, TA = +85C
VDD = 1.6V IQ does not include pull-up resistor current
FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage at VDD = 1.6V.
FIGURE 2-18: Output Short-Circuit Current vs. Power Supply Voltage.
2003 Microchip Technology Inc.
DS21714C-page 7
6.0
MCP6546/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.0V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RPU = 2.74 k to V PU = VDD, and CL = 36 pF.
Output Voltage Headroom (V)
0.8 Output Voltage Headroom (V) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Output Current (mA)
VOL-VSS, TA = -40C VOL-VSS, TA = +25C VOL-VSS, TA = +85C
VDD = 1.6V
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0
VDD = 5.5V VOL-VSS, TA = -40C VOL-VSS, TA = 25C VOL-VSS, TA = 85C
2
4
6
8 10 12 14 16 18 20 22 Output Current (mA)
FIGURE 2-19: Output Voltage Headroom vs. Output Current at VDD = 1.6V.
50% 45% 40% 35% 30% 25% 20% 15% 10% 5% 0% 0
408 Samples 100 mV Overdrive VCM = VDD/2 VDD = 5.5V VDD = 1.6V
FIGURE 2-22: Output Voltage Headroom vs. Output Current at VDD = 5.5V.
65% 60% 55% 50% 45% 40% 35% 30% 25% 20% 15% 10% 5% 0%
408 Samples 100 mV Overdrive VCM = VDD/2
Percentage of Occurrences
Percentage of Occurrences
VDD = 1.6V
VDD = 5.5V
1 2 3 4 5 6 7 High-to-Low Propagation Delay (s)
8
0
1
2
3
4
5
6
7
8
Low-to-High Propagation Delay (s)
FIGURE 2-20: Delay Histogram.
50% 45% 40% 35% 30% 25% 20% 15% 10% 5% 0%
High-to-Low Propagation
FIGURE 2-23: Delay Histogram.
8 Propagation Delay (s) 7 6 5 4 3 2 1 0 -40 -20
Low-to-High Propagation
Percentage of Occurrences
VDD = 5.5V VDD = 1.6V
408 Samples 100 mV Overdrive VCM = VDD/2
100 mV Overdrive VCM = VDD/2 tPHL @ VDD = 5.5V tPHL @ VDD = 1.6V
tPLH @ VDD = 5.5V
tPLH @ VDD = 1.6V
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
Propagation Delay Skew (s)
0 20 40 60 Ambient Temperature (C)
80
FIGURE 2-21: Histogram.
Propagation Delay Skew
FIGURE 2-24: Propagation Delay vs. Ambient Temperature.
DS21714C-page 8
2003 Microchip Technology Inc.
MCP6546/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.0V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RPU = 2.74 k to V PU = VDD, and CL = 36 pF.
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VCM = VDD/2 tPHL @ 10 mV Overdrive
100 Propagation Delay (s)
VCM = VDD/2 tPHL @ VDD = 5.5V
Propagation Delay (s)
tPLH @ 10 mV Overdrive tPLH @ 100 mV Overdrive tPLH @ 100 mV Overdrive
10
tPLH @ VDD = 1.6V
tPLH @ VDD = 5.5V
1 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Power Supply Voltage (V) 5.0 5.5 1
tPHL @ VDD = 1.6V
10 100 Input Overdrive (mV)
1000
FIGURE 2-25: Propagation Delay vs. Power Supply Voltage.
8 Propagation Delay (s) 7 6 5 4 3 2 1 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -0.4 -0.2 2.0 Common Mode Input Voltage (V)
tPHL VDD = 1.6V 100 mV Overdrive
FIGURE 2-28: Overdrive.
8 Propagation Delay (s) 7 6 5 4 3 2 1 0 0.0 0.5 1.0 1.5
Propagation Delay vs. Input
VDD = 5.5V 100 mV Overdrive
tPHL
tPLH
tPLH
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-0.5
Common Mode Input Voltage (V)
FIGURE 2-26: Propagation Delay vs. Common Mode Input Voltage at VDD = 1.6V.
200 180 160 140 120 100 80 60 40 20 0 0
100 mV Overdrive VCM = VDD/2
FIGURE 2-29: Propagation Delay vs. Common Mode Input Voltage at VDD = 5.5V.
Supply Current (A/comparator) 10
IDD does not include pull-up resistor current 100 mV Overdrive VCM = VDD/2 VDD = 5.5 V
Propagation Delay (s)
tPLH @ VDD = 5.5V
tPLH @ VDD = 1.6V
1
VDD = 1.6 V
tPHL @ VDD = 5.5V tPHL @ VDD = 1.6V
0.1 0.1 1 10 Toggle Frequency (kHz) 100
10
20
30 40 50 60 70 Load Capacitance (nF)
80
90
FIGURE 2-27: Capacitance.
Propagation Delay vs. Load
FIGURE 2-30: Frequency.
Supply Current vs. Toggle
2003 Microchip Technology Inc.
DS21714C-page 9
6.0
MCP6546/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.0V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RPU = 2.74 k to V PU = VDD, and CL = 36 pF.
VIN- = 100 mV Overdrive tPLH @ VDD = 5.5V VCM = VDD/2 VIN+ = VCM tPLH @ VDD = 1.6V
Chip Select, Output Voltage (V)
8 Propagation Delay (s) 7 6 5 4 3 2 1 0 0
tPHL @ VDD = 1.6V
tPHL @ VDD = 5.5V
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5
VDD = 5.5V
VOUT
CS
10
20
30
40
50
60
70
80
90 100
0
1
2
3
Pull-up Resistor, RPU (k )
4 5 6 Time (ms)
7
8
9
10
FIGURE 2-31: up Resistor.
Supply Current (A/comparator)
Propagation Delay vs. Pull-
FIGURE 2-34: Chip Select (CS) Step Response (MCP6548 only).
Supply Current (A/Comparator)
100 10 1
1.E-04
100 Comparator
1. E-04
1.E-05
Comparator Turns On Here
Comparator Shuts Off Here
10 1
1. E-05
Turns-On
Comparator Shuts-Off
1.E-06
1. E-06
100n 10n 1n
1.E-07
CS Hysteresis CS Low-to-High CS High-to-Low
CS High-to-Low CS Hysteresis
100n CS Low-to-High
1. E-07
1.E-08
10n 1n
1. E-08
1.E-09
1. E-09
100p
1.E-10
VDD = 1.6V
100p
1. E-10
VDD = 5.5V
10p 0.0
1.E-11
0.2
0.4 0.6 0.8 1.0 1.2 1.4 Chip Select (CS) Voltage (V)
1.6
10p 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
1. E-11
Chip Select (CS) Voltage (V)
FIGURE 2-32: Supply Current (shoot through current) vs. Chip Select (CS) Voltage at VDD = 1.6V (MCP6548 only).
Output Voltage, CS Voltage (V) 35 Supply Current (A/comparator) 30 25 20 15 10 5 0
0 1 2 3 4 5 6
FIGURE 2-35: Supply Current (shoot through current) vs. Chip Select (CS) Voltage at VDD = 5.5V (MCP6548 only).
Supply Current (A/comparator) 350
VOUT
VOUT CS
1.6 0.0 -1.6 -3.3
VDD = 1.6V
5.5 0.0
CS VDD = 5.5V
300 250 200 150 100 50
IDD Start-up IDD Charging output capacitance
-5.5 -11.0 -16.5 -22.0 -27.5
Start-up IDD
-4.9 -6.6
IDD
7 8 9 10 11 12
-8.2 -9.8
0
0
1
2
3
4
5
6
7
8
9
10
11
12
-33.0
Time (1 ms/div)
Time (1 ms/div)
FIGURE 2-33: Supply Current (charging current) vs. Chip Select (CS) pulse at VDD = 1.6V (MCP6548 only).
FIGURE 2-36: Supply Current (charging current) vs. Chip Select (CS) pulse at VDD = 5.5V (MCP6548 only).
DS21714C-page 10
2003 Microchip Technology Inc.
Output Voltage, CS Voltage (V)
MCP6546/7/8/9
Note: Unless otherwise indicated, VDD = +1.6V to +5.0V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RPU = 2.74 k to V PU = VDD, and CL = 36 pF.
7 Inverting Input, Output Voltage (V) 6 5 4 3 2 1 0 -1
0 1 2 3 4 5 6 7 8 9 10
VOUT
Output Leakage Current (pA)
VDD = 5.5V
VIN-
500 450 400 350 300 250 200 150 100 50 0
TA = +85C CS = VDD VIN+ = VDD/2 VIN- = VSS
VDD = 1.6V VDD = 5.5V
0
1
2
3
Time (1 ms/div)
4 5 6 7 Output Voltage (V)
8
9
10
FIGURE 2-37: The MCP6546/7/8/9 comparators show no phase reversal.
FIGURE 2-38: Output Leakage Current (CS = VDD ) vs. Output Voltage (MCP6548 only)
2003 Microchip Technology Inc.
DS21714C-page 11
MCP6546/7/8/9
3.0 APPLICATIONS INFORMATION
3.3 MCP6548 Chip Select (CS)
The MCP6546/7/8/9 family of push-pull output comparators are fabricated on Microchip's state-of-theart CMOS process. They are suitable for a wide range of applications requiring very low power consumption. The MCP6548 is a single comparator with a chip select (CS) option. When CS is pulled high, the total current consumption drops to 20 pA (typ). 1 pA (typ) flows through the CS pin, 1 pA (typ) flows through the output pin and 18 pA (typ) flows through the VDD pin, as shown in Figure 1-1. When this happens, the comparator output is put into a high-impedance state. By pulling CS low, the comparator is enabled. If the CS pin is left floating, the comparator will not operate properly. Figure 1-1 shows the output voltage and supply current response to a CS pulse. The internal CS circuitry is designed to minimize glitches when cycling the CS pin. This helps conserve power, which is especially important in battery-powered applications.
3.1
Comparator Inputs
The MCP6546/7/8/9 comparator family uses CMOS transistors at the input. They are designed to prevent phase inversion when the input pins exceed the supply voltages. Figure 2-37 shows an input voltage exceeding both supplies with no resulting phase inversion. The input stage of this family of devices uses two differential input stages in parallel: one operates at low input voltages and the other at high input voltages. With this topology, the input voltage is 0.3V above VDD and 0.3V below VSS. Therefore, the input offset voltage is measured at both VSS - 0.3V and VDD + 0.3V to ensure proper operation. The maximum operating input voltages that can be applied are V SS - 0.3V and VDD + 0.3V. Voltages on the inputs that exceed this absolute maximum rating can cause excessive current to flow and permanently damage the device. In applications where the input pin exceeds the specified range, external resistors can be used to limit the current below 2 mA, as shown in Figure 3-1.
3.4
Externally Set Hysteresis
Greater flexibility in selecting hysteresis, or input trip points, is achieved by using external resistors. Input offset voltage (VOS) is the center (average) of the (input-referred) low-high and high-low trip points. Input hysteresis voltage (VHYST) is the difference between the same trip points. Hysteresis reduces output chattering when one input is slowly moving past the other, thus reducing dynamic supply current. It also helps in systems where it is best not to cycle between states too frequently (e.g., air conditioner thermostatic control). The MCP6546/7/8/9 family has internally-set hysteresis that is small enough to maintain input offset accuracy (<7 mV), and large enough to eliminate output chattering caused by the comparator's own input noise voltage (200 Vp-p).
9 8 7 6 5 4 3 2 1 0 -1 -2 -3
30
RIN VIN
MCP654X
VOUT
20
Output Voltage (V)
VOUT
15
10
5
Hysteresis
0
-5
FIGURE 3-1: An input resistor (RIN) should be used to limit excessive input current if either of the inputs exceeds the absolute maximum specification.
-10
-15
VIN-
0 100 200 300 400 500 600 700 800 900
-20
-25
-30 1000
Time (100 ms/div)
3.2
Open-Drain Output
The open-drain output is designed to make levelshifting and wired-OR logic easy to implement. The output can go as high as 10V for 9V battery-powered applications. The output stage minimizes switching current (shoot-through current from supply-to-supply) when the output changes state. See Figures 2-15, 2-17 and 2-32 through 2-36, for more information.
FIGURE 3-2: The MCP6546/7/8/9 comparators' internal hysteresis eliminates output chatter caused by input noise voltage.
DS21714C-page 12
2003 Microchip Technology Inc.
Input Voltage (10 mV/div)
( Maximum expected V ) - V IN DD R --------------------------------------------------------------------------------IN 2 mA V SS - ( Minimum expected V IN ) R IN ----------------------------------------------------------------------------2 mA
VDD = 5.0V VIN+ = 2.75V
25
MCP6546/7/8/9
3.4.1 INVERTING CIRCUIT
Where: R2 R3 R 23 = -----------------R2 + R 3 R3 V 23 = ------------------ x V DD R2 + R 3 Using this simplified circuit, the trip voltage can be calculated using the following equation: VOUT Figure 3-3 shows an inverting circuit for a single-supply application using three resistors, besides the pull-up resistor. The resulting hysteresis diagram is shown in Figure 3-4. VDD VIN VDD R2 MCP654X VPU
IPU IOL
RPU
EQUATION
R 23 R F + R PU V TH L = V PU --------------------------------------- + V 23 --------------------------------------- R + R + R R 23 + R F + R PU 23 F PU R 23 RF V TLH = V OL ---------------------- + V 23 --------------------- R + R R 23 + R F 23 F VTLH = trip voltage from low to high
IRF
RF
R3
FIGURE 3-3: hysteresis.
VOUT VPU VOH Low-to-High VOL VSS VSS
Inverting circuit with
VTHL = trip voltage from high to low Figure 2-19 and Figure 2-22 can be used to determine typical values for VOL. This voltage is dependent on the output current IOL as shown in Figure 3-3. This current can be determined using the equation below:
High-to-Low VIN
EQUATION
I O L = I PU + I RF V PU - V O L V - V OL I OL = ------------------------- + ----------------------- - 23 R R +R
PU 23 F
VTLH VTHL
VDD
VTLH = trip voltage from low to high VTHL = trip voltage from high to low
VOH can be calculated using the equation below:
EQUATION
R 23 + R F V O H = ( V PU - V 23 ) x ------------------------------------- R + R + R
23 F PU
FIGURE 3-4: inverting circuit.
Hysteresis diagram for the
In order to determine the trip voltages (V THL and VTLH) for the circuit shown in Figure 3-3, R2 and R 3 can be simplified to the Thevenin equivalent circuit with respect to VDD, as shown in Figure 3-5. VPU MCP654X + V23 R23 RF RPU VOUT
As explained in Section 3.1, "Comparator Inputs", it is important to keep the non-inverting input below VDD+0.3V when VPU > VDD.
3.5
Supply Bypass
With this family of comparators, the power supply pin (VDD for single supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good edge rate performance.
3.6
Capacitive Loads
FIGURE 3-5:
Thevenin Equivalent Circuit.
Reasonable capacitive loads (e.g., logic gates) have little impact on propagation delay (see Figure 2-27). The supply current increases with increasing toggle frequency (Figure 2-30), especially with higher capacitive loads.
2003 Microchip Technology Inc.
DS21714C-page 13
MCP6546/7/8/9
3.7 Battery Life 3.9
3.9.1
Typical Applications
PRECISE COMPARATOR
In order to maximize battery life in portable applications, use large resistors and small capacitive loads. Also, avoid toggling the output more than necessary and do not use chip select (CS) to conserve power for short periods of time. Capacitive loads will draw additional power at start-up.
Some applications require higher DC precision. An easy way to solve this problem is to use an amplifier (such as the MCP6041) to gain-up the input signal before it reaches the comparator. Figure 3-7 shows an example of this approach. VDD VREF MCP6041 VDD VIN
R1 R2
3.8
PCB Surface Leakage
In applications where low input bias current is critical, PCB (Printed Circuit Board) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low-humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA. If current-to-flow, this is greater than the MCP6546/7/8/9 family's bias current at 25C (1 pA, typ). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 3-6. VINVIN+ VSS
VPU RPU
VREF
MCP6546
VOUT
FIGURE 3-7: Comparator. 3.9.2
Precise Inverting
WINDOWED COMPARATOR
Figure 3-8 shows one approach to designing a windowed comparator. The wired-OR connection produces a high output (logic 1) when the input voltage is between VRB and VRT (where VRT > VRB ). VPU RPU VOUT VIN
Guard Ring
VRT
1/2 MCP6547
FIGURE 3-6: Example Guard Ring Layout for Inverting Circuit.
1. Inverting Configuration (Figures 3-3 and 3-6): a. Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the comparator (e.g., VDD/2 or ground). b. Connect the inverting pin (VIN-) to the input pad without touching the guard ring.
VRB
1/2 MCP6547
FIGURE 3-8:
Windowed comparator.
DS21714C-page 14
2003 Microchip Technology Inc.
MCP6546/7/8/9
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
5-Lead SC-70 (MCP6546) Example:
XNN YWW
A25 307
5-Lead SOT-23 (MCP6546)
Example:
XXNN
AB37
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW
Example: MCP6546 I/P256 0307
8-Lead SOIC (150 mil)
Example: MCP6546 I/SN0307 256
XXXXXXXX XXXXYYWW NNN
8-Lead MSOP XXXXXX YWWNNN
Example: 6546I 307256
Legend:
XX...X YY WW NNN
Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information.
*
Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.
2003 Microchip Technology Inc.
DS21714C-page 15
MCP6546/7/8/9
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6549) Example:
XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN
MCP6549-I/P 0307256
14-Lead SOIC (150 mil) (MCP6549)
Example:
XXXXXXXXXX XXXXXXXXXX YYWWNNN
MCP6549ISL 0307256
14-Lead TSSOP (MCP6549)
Example:
XXXXXXXX YYWW NNN
MCP6549I 0307 256
DS21714C-page 16
2003 Microchip Technology Inc.
MCP6546/7/8/9
5-Lead Plastic Package (LT) (SC-70)
E E1
D p B
n
1
Q1 c A1 L Units Dimension Limits n p A A2 A1 E E1 D L Q1 c B INCHES NOM 5 .026 (BSC) MILLIMETERS* NOM 5 0.65 (BSC) 0.80 0.80 0.00 1.80 1.15 1.80 0.10 0.10 0.10 0.15 A2 A
MIN
MAX
MIN
MAX
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Top of Molded Pkg to Lead Shoulder Lead Thickness Lead Width
.031 .031 .000 .071 .045 .071 .004 .004 .004 .006
.043 .039 .004 .094 .053 .087 .012 .016 .007 .012
1.10 1.00 0.10 2.40 1.35 2.20 0.30 0.40 0.18 0.30
*Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEITA (EIAJ) Standard: SC-70
Drawing No. C04-061
2003 Microchip Technology Inc.
DS21714C-page 17
MCP6546/7/8/9
5-Lead Plastic Small Outline Transistor (OT) (SOT23)
E E1
p B p1 D
n
1
c A A2
L
A1
Number of Pins Pitch Outside lead pitch (basic) Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p p1 A A2 A1 E E1 D L c B
MIN
INCHES* NOM 5 .038 .075 .046 .043 .003 .110 .064 .116 .018 5 .006 .017 5 5
MAX
MIN
.035 .035 .000 .102 .059 .110 .014 0 .004 .014 0 0
.057 .051 .006 .118 .069 .122 .022 10 .008 .020 10 10
MILLIMETERS NOM 5 0.95 1.90 0.90 1.18 0.90 1.10 0.00 0.08 2.60 2.80 1.50 1.63 2.80 2.95 0.35 0.45 0 5 0.09 0.15 0.35 0.43 0 5 0 5
MAX
1.45 1.30 0.15 3.00 1.75 3.10 0.55 10 0.20 0.50 10 10
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-178 Drawing No. C04-091
DS21714C-page 18
2003 Microchip Technology Inc.
MCP6546/7/8/9
8-Lead Plastic Dual In-line (P) - 300 mil (PDIP)
E1
D 2 n 1 E
A
A2
c
L A1
eB
B1 p B
Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L c B1 B eB a b
MIN
INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10
MAX
MIN
.140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5
.170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15
MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
MAX
4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018
2003 Microchip Technology Inc.
DS21714C-page 19
MCP6546/7/8/9
8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC)
E E1
p D 2 B n 1
h 45
c A
A2
L A1
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D h L c B
MIN
.053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0
INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12
MAX
MIN
.069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15
MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12
MAX
1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057
DS21714C-page 20
2003 Microchip Technology Inc.
MCP6546/7/8/9
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E E1
p D 2 B n 1
A c A1 (F)
A2
L
8 Number of Pins .026 BSC Pitch A .043 Overall Height A2 .030 .033 .037 Molded Package Thickness A1 .006 .000 Standoff E .193 TYP. Overall Width E1 .118 BSC Molded Package Width D .118 BSC Overall Length L .016 .024 .031 Foot Length Footprint (Reference) F .037 REF Foot Angle 0 8 c Lead Thickness .003 .006 .009 B .009 .012 .016 Lead Width 5 15 Mold Draft Angle Top 5 15 Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.
Units Dimension Limits n p
MIN
INCHES NOM
MAX
MIN
MILLIMETERS* NOM 8 0.65 BSC 0.75 0.85 0.00 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0.60 0.95 REF 0 0.08 0.22 5 5 -
MAX
1.10 0.95 0.15
0.80 8 0.23 0.40 15 15
JEDEC Equivalent: MO-187
Drawing No. C04-111
2003 Microchip Technology Inc.
DS21714C-page 21
MCP6546/7/8/9
14-Lead Plastic Dual In-line (P) - 300 mil (PDIP)
E1
D
2 n 1
E A A2
c eB A1 B1 B p
L
Number of Pins Pitch Top to Seating Plane A .140 .170 Molded Package Thickness A2 .115 .145 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 Molded Package Width E1 .240 .250 .260 Overall Length D .740 .750 .760 Tip to Seating Plane L .125 .130 .135 c Lead Thickness .008 .012 .015 Upper Lead Width B1 .045 .058 .070 Lower Lead Width B .014 .018 .022 Overall Row Spacing eB .310 .370 .430 Mold Draft Angle Top 5 10 15 Mold Draft Angle Bottom 5 10 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005
Units Dimension Limits n p
MIN
INCHES* NOM 14 .100 .155 .130
MAX
MIN
MILLIMETERS NOM 14 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
MAX
4.32 3.68 8.26 6.60 19.30 3.43 0.38 1.78 0.56 10.92 15 15
DS21714C-page 22
2003 Microchip Technology Inc.
MCP6546/7/8/9
14-Lead Plastic Small Outline (SL) - Narrow, 150 mil (SOIC)
E E1
p
D
2 B n 1 h 45x c A A2
L Units Dimension Limits n p A A2 A1 E E1 D h L c B INCHES* NOM 14 .050 .061 .056 .007 .236 .154 .342 .015 .033 4 .009 .017 12 12 MILLIMETERS NOM 14 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0 4 0.20 0.23 0.36 0.42 0 12 0 12 A1
MIN
MAX
MIN
MAX
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
.053 .052 .004 .228 .150 .337 .010 .016 0 .008 .014 0 0
.069 .061 .010 .244 .157 .347 .020 .050 8 .010 .020 15 15
1.75 1.55 0.25 6.20 3.99 8.81 0.51 1.27 8 0.25 0.51 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065
2003 Microchip Technology Inc.
DS21714C-page 23
MCP6546/7/8/9
14-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP)
E E1 p
D 2 n B 1
A c
L A1 A2
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L c B1
MIN
INCHES NOM 14 .026 .035 .004 .251 .173 .197 .024 4 .006 .010 5 5
MAX
MIN
.033 .002 .246 .169 .193 .020 0 .004 .007 0 0
.043 .037 .006 .256 .177 .201 .028 8 .008 .012 10 10
MILLIMETERS* NOM MAX 14 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0 4 8 0.09 0.15 0.20 0.19 0.25 0.30 0 5 10 0 5 10
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-087
DS21714C-page 24
2003 Microchip Technology Inc.
MCP6546/7/8/9
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device -X Temperature Range /XX Package Examples:
a) Tape and Reel, Industrial Temperature, 5LD SC-70. MCP6546T-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23. MCP6546-I/P: Industrial Temperature, 8LD PDIP. MCP6546RT-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT23. MCP6547-I/MS: Industrial Temperature, 8LD MSOP. MCP6547T-I/MS: Tape and Reel, Industrial Temperature, 8LD MSOP. MCP6547-I/P: Industrial Temperature, 8LD PDIP. Industrial Temperature, 8LD SOIC. MCP6548T-I/SN: Tape and Reel, Industrial Temperature, 8LD SOIC. MCP6548-I/P: Industrial Temperature, 8LD PDIP. MCP6549T-I/SL: Tape and Reel, Industrial Temperature, 14LD SOIC. Tape and Reel, Industrial Temperature, 14LD SOIC. Industrial Temperature, 14LD PDIP. MCP6548-I/SN: MCP6546T-I/LT:
b)
Device: MCP6546: Single Comparator MCP6546T: Single Comparator (Tape and Reel) (SC-70, SOT-23, SOIC, MSOP) MCP6546RT: Single Comparator (Rotated - Tape and Reel) (SOT-23 only) MCP6547: Dual Comparator MCP6547T: Dual Comparator (Tape and Reel for SOIC and MSOP) MCP6548: Single Comparator with CS MCP6548T: Single Comparator with CS (Tape and Reel for SOIC and MSOP) MCP6549: Quad Comparator MCP6549T: Quad Comparator (Tape and Reel for SOIC and TSSOP) I LT OT MS P SN SL ST = = = = = = = = -40C to +85C
c) d)
a) b)
c)
Temperature Range: Package:
a)
Plastic Package (SC-70), 5-lead Plastic Small Outline Transistor (SOT-23), 5-lead Plastic MSOP, 8-lead Plastic DIP (300 mil Body), 8-lead, 14-lead Plastic SOIC (150 mil Body), 8-lead Plastic SOIC (150 mil Body), 14-lead (MCP6549) Plastic TSSOP (4.4mm Body), 14-lead (MCP6549)
b)
c) a)
b)
MCP6549T-I/SL:
c)
MCP6549-I/P:
Sales and Support
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2003 Microchip Technology Inc.
DS21714C-page 25
MCP6546/7/8/9
NOTES:
DS21714C-page 26
2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Application Maestro, dsPICDEM, dsPICDEM.net, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified.
2003 Microchip Technology Inc.
Preliminary
DS21714C-page 27
M
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com
ASIA/PACIFIC
Australia
Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
Korea
168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934
Singapore
200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850
China - Beijing
Unit 915 Bei Hai Wan Tai Bldg. No. 6 Chaoyangmen Beidajie Beijing, 100027, No. China Tel: 86-10-85282100 Fax: 86-10-85282104
Atlanta
3780 Mansell Road, Suite 130 Alpharetta, GA 30022 Tel: 770-640-0034 Fax: 770-640-0307
Taiwan
Kaohsiung Branch 30F - 1 No. 8 Min Chuan 2nd Road Kaohsiung 806, Taiwan Tel: 886-7-536-4818 Fax: 886-7-536-4803
Boston
2 Lan Drive, Suite 120 Westford, MA 01886 Tel: 978-692-3848 Fax: 978-692-3821
China - Chengdu
Rm. 2401-2402, 24th Floor, Ming Xing Financial Tower No. 88 TIDU Street Chengdu 610016, China Tel: 86-28-86766200 Fax: 86-28-86766599
Taiwan
Taiwan Branch 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Chicago
333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075
China - Fuzhou
Unit 28F, World Trade Plaza No. 71 Wusi Road Fuzhou 350001, China Tel: 86-591-7503506 Fax: 86-591-7503521
Dallas
4570 Westgrove Drive, Suite 160 Addison, TX 75001 Tel: 972-818-7423 Fax: 972-818-2924
EUROPE
Austria
Durisolstrasse 2 A-4600 Wels Austria Tel: 43-7242-2244-399 Fax: 43-7242-2244-393
China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431
Detroit
Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260
Denmark
Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45-4420-9895 Fax: 45-4420-9910
China - Shanghai
Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
Kokomo
2767 S. Albright Road Kokomo, IN 46902 Tel: 765-864-8360 Fax: 765-864-8387
France
Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Los Angeles
18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338
China - Shenzhen
Rm. 1812, 18/F, Building A, United Plaza No. 5022 Binhe Road, Futian District Shenzhen 518033, China Tel: 86-755-82901380 Fax: 86-755-8295-1393
Germany
Steinheilstrasse 10 D-85737 Ismaning, Germany Tel: 49-89-627-144-0 Fax: 49-89-627-144-44
Phoenix
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7966 Fax: 480-792-4338
China - Shunde
Room 401, Hongjian Building No. 2 Fengxiangnan Road, Ronggui Town Shunde City, Guangdong 528303, China Tel: 86-765-8395507 Fax: 86-765-8395571
Italy
Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781
San Jose
2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955
China - Qingdao
Rm. B505A, Fullhope Plaza, No. 12 Hong Kong Central Rd. Qingdao 266071, China Tel: 86-532-5027355 Fax: 86-532-5027205
Netherlands
P. A. De Biesbosch 14 NL-5152 SC Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340
Toronto
6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509
India
Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062
United Kingdom
505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820
07/28/03
Japan
Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122
DS21714C-page 28
2003 Microchip Technology Inc.

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