metal can in 2 top view s 2 v d 2 d 1 v+ (substrate and case) s 1 in 1 nc gnd 1 2 3 4 5 6 7 8 9 10 nc v+ d 1 d 2 nc nc s 1 s 2 nc in 2 in 1 nc gnd v dual-in-line 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view dg300a dg300a dg300a/301a/302a/303a siliconix s-52880erev. c, 28-apr-97 1 cmos analog switches features benefits applications analog signal range: 15 v fast switchinget on : 150 ns low on-resistanceer ds(on) : 30 single supply operation latch-up proof cmos compatible full rail-to-rail analog signal range low signal error low power dissipation low level switching circuits programmable gain amplifiers portable and battery powered systems description the dg300a-dg303a family of monolithic cmos switches feature three switch configuration options (spst, spdt, and dpst) for precision applications in communications, instrumentation and process control, where low leakage switching combined with low power consumption are required. designed on the siliconix plus-40 cmos process, these switches are latch-up proof, and are designed to block up to 30 v peak-to-peak when off. an epitaxial layer prevents latchup. in the on condition the switches conduct equally well in both directions (with no offset voltage) and minimize error conditions with their low on-resistance. featuring low power consumption (3.5 mw typ) these switches are ideal for battery powered applications, without sacrificing switching speed. designed for break-before-make switching action, these devices are cmos and quasi ttl compatible. single supply operation is allowed by connecting the v rail to 0 v. functional block diagram and pin configuration truth table logic switch 0 off 1 on logic a 0 o 08v lo g ic a0o 0.8 v logic 0 0 . 8 v logic a 1 o 4v log i c a1o 4 v logic 1 4 v updates to this data sheet may be obtained via facsimile by calling siliconix faxback, 1-408-970-5600. please request faxback document #70044.
DG301A gnd v dual-in-line nc v+ d 1 d 2 nc nc s 1 s 2 nc nc in nc 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view metal can nc top view s 2 v d 2 d 1 v+ (substrate and case) s 1 in nc gnd 1 2 3 4 5 6 7 8 9 10 dg302a nc v+ s 3 s 4 d 3 d 4 d 1 d 2 s 1 s 2 in 1 in 2 gnd v dual-in-line 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view DG301A dg303a s 4 d 2 nc dual-in-line s 3 in 1 d 4 v d 1 s 1 gnd v+ in 2 d 3 s 2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view dg300a/301a/302a/303a 2 siliconix s-52880erev. c, 28-apr-97 functional block diagram and pin configuration (cont'd) truth table logic sw 1 sw 2 0 off on 1 on off logic a0o 0.8 v logic a1o 4 v logic 1 4 v
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