january 2010 ?2010 fairchild semiconductor corporation FDZ192NZ rev.c1 www.fairchildsemi.com 1 FDZ192NZ n-channel 1.5 v specified powertrench ? thin wl-csp mosfet bottom top g s d s s d pin1 wl-csp 1x1.5 thin FDZ192NZ n-channel 1.5 v specified powertrench ? thin wl-csp mosfet 20 v, 5.3 a, 39 m ? features ? max r ds(on) = 39 m ? at v gs = 4.5 v, i d = 2.0 a ? max r ds(on) = 43 m ? at v gs = 2.5 v, i d = 2.0 a ? max r ds(on) = 49 m ? at v gs = 1.8 v, i d = 1.0 a ? max r ds(on) = 55 m ? at v gs = 1.5 v, i d = 1.0 a ? occupies only 1.5 mm 2 of pcb area.less than 50% of the area of 2 x 2 bga ? ultra-thin package: less than 0.65 mm height when mounted to pcb ? hbm esd protection level > 2200v (note3) ? rohs compliant general description designed on fairchild's advanced 1.5 v powertrench ? process with state of the art "fine pitch" wlcsp packaging process, the FDZ192NZ minimizes both pcb space and r ds(on) . this advanced wlcsp mosfet embodies a breakthrough in packaging technology which enabl es the device to combine excellent thermal transfer charac teristics, ultra-low profile packaging, low gate charge, and low r ds(on) . applications ? battery management ? load switch ? battery protection mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 20 v v gs gate to source voltage 8 v i d -continuous t a = 25c (note 1a) 5.3 a -pulsed 15 p d power dissipation t a = 25c (note 1a) 1.9 w power dissipation t a = 25c (note 1b) 0.9 t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient (note 1a) 65 c/w r ja thermal resistance, junction to ambient (note 1b) 133 device marking device package reel size tape width quantity 8 FDZ192NZ wl-csp 1x1.5 thin 7 ? 8 mm 5000 units
FDZ192NZ n-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 2 ?2010 fairchild semiconductor corporation FDZ192NZ rev.c1 electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 20 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 10 mv/c i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 8 v, v ds = 0 v 10 a v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a 0.4 0.7 1.0 v ? v gs(th) ? t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -3 mv/c r ds(on) static drain to source on resistance v gs = 4.5 v, i d = 2.0 a 26 39 m ? v gs = 2.5 v, i d = 2.0 a 29 43 v gs = 1.8 v, i d = 1.0 a 33 49 v gs = 1.5 v, i d = 1.0 a 38 55 v gs = 4.5 v, i d = 2.0 a, t j =125 c 31 47 g fs forward transconductance v ds = 5 v, i d = 5.3 a 36 s c iss input capacitance v ds = 10 v, v gs = 0 v, f = 1 mhz 915 1220 pf c oss output capacitance 145 195 pf c rss reverse transfer capacitance 100 150 pf t d(on) turn-on delay time v dd = 10 v, i d = 5.3 a, v gs = 4.5 v, r gen = 6 ? 6.5 13 ns t r rise time 410ns t d(off) turn-off delay time 50 80 ns t f fall time 20 32 ns q g total gate charge v gs = 0 v to 4.5 v v dd = 10 v, i d = 5.3 a 12 17 nc q gs gate to source charge 1.3 nc q gd gate to drain ?miller? charge 2.3 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 1.1 a (note 2) 0.6 1.2 v t rr reverse recovery time i f = 5.3 a, di/dt = 100 a/ s 18 32 ns q rr reverse recovery charge 4.6 10 nc notes: 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 30 0 s, duty cycle < 2.0%. 3. the diode connected between the gate and source serves only as protection esd. no gate overvoltage rating is implied. a. 65 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 133 c/w when mounted on a minimum pad of 2 oz copper.
FDZ192NZ n-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 3 ?2010 fairchild semiconductor corporation FDZ192NZ rev.c1 typical characteristics t j = 25 c unless otherwise noted figure 1. 0.00.20.40.60.81.0 0 3 6 9 12 15 v gs = 3 v v gs = 1.8 v v gs = 2.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 1.5 v v gs = 4.5 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 03691215 0.5 1.0 1.5 2.0 2.5 v gs = 1.8 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 2.5 v v gs = 3 v v gs =1.5 v v gs = 4.5 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 2 a v gs = 4.5 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 0.51.01.52.02.53.03.54.04.5 0 20 40 60 80 100 t j = 125 o c i d = 2 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0.60.81.01.21.41.6 0 3 6 9 12 15 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 20 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDZ192NZ n-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 4 ?2010 fairchild semiconductor corporation FDZ192NZ rev.c1 figure 7. 03691215 0.0 0.9 1.8 2.7 3.6 4.5 i d = 5.3 a v dd = 12 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 8 v gate charge characteristics figure 8. 0.01 0.1 1 10 50 100 1000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 20 2000 c a p a c i t a n c e v s d r a i n to source voltage figure 9. gate leakage current vs gate to source voltage 03691215 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 v ds = 0 v t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) i g , gate leakage current (a) figure 10. forward bias safe operating area 0.1 1 10 50 0.01 0.1 1 10 20 10 ms 100 ms dc 1 s 10 s 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 133 o c/w t a = 25 o c figure 11. single pulse maximum power dissipation typical characteristics t j = 25 c unless otherwise noted 10 -3 10 -2 10 -1 110 1000 1 10 100 p (pk) , peak transient power (w) single pulse r t ja = 133 o c/w t a = 25 o c t, pulse width (sec)
FDZ192NZ n-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 5 ?2010 fairchild semiconductor corporation FDZ192NZ rev.c1 figure 12. junction-to-ambient transient thermal response curve 10 -3 10 -2 10 -1 110 100 1000 0.01 0.1 1 2 single pulse r t ja = 133 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDZ192NZ n-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 6 ?2010 fairchild semiconductor corporation FDZ192NZ rev.c1 dimensional outlin e and pad layout
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