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| 1.0 NET186 ? demonstration board users manual NET186frt.fm page 1 monday, june 23, 1997 10:30 am
1.0 NET186 tm demonstration board users manual, release 1.0 ? 1997 by advanced micro devices, inc. all rights reserved. no part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of advanced micro devices, inc. use, duplication, or disclosure by the government is subject to restrictions as set forth in subdivision (b)(3)(ii) of the rights in technical data and computer software clause at 252.227-7013. advanced micro devices, inc., 5204 e. ben white blvd., austin, tx 78741. am186, e86, e86mon, NET186, pcnet, amd, the amd logo and combinations thereof are trademarks and fusione86 is a service mark of advanced micro devices, inc.of advanced micro devices, inc. product names used in this publication are for identification purposes only and may be trademarks of their respective companies. microsoft is a registered trademark of microsoft corp. windows is a registered trademark of microsoft corp. other product or brand names are used solely for identification and may be the trademarks or registered trademarks of their respective companies. the text pages of this document have been printed on recycled paper consisting of 50% recycled fiber and 50% virgin fiber; the post-consumer waste content is 10%. these pages are recyclable. advanced micro devices, inc. 5204 e. ben white blvd. austin, tx 78741-7399 NET186about.book : NET186frt.fm page 2 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual iii contents about the NET186 ? demonstration board demonstration board features ............................................................................ ix software.................................................................................................................x documentation ......................................................................................................x about this manual ...........................................................................................x suggested reference material........................................................................ xii documentation conventions......................................................................... xiii chapter 1 quick start connecting to a pc............................................................................................ 1-2 NET186 sample applications............................................................................. 1-6 for more information........................................................................................ 1-7 chapter 2 demonstration board functional description hardware block diagram and memory map.................................................... 2-2 NET186 demonstration board parts list............................................................ 2-4 am186es microcontroller implementation...................................................... 2-5 rom space ....................................................................................................... 2-8 NET186about.book : NET186abouttoc.fm page iii monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual iv 1.0 sram ................................................................................................................ 2-8 rs-232 serial ports ........................................................................................... 2-9 pcnet-isa ii ethernet controller .................................................................... 2-10 10base-t port ........................................................................................... 2-11 access unit interface (aui) port................................................................ 2-11 clock and reset logic..................................................................................... 2-12 am186 expansion interface ............................................................................ 2-12 flash chip select switch ................................................................................. 2-15 led indicators................................................................................................. 2-16 pio activity led indicators....................................................................... 2-16 pcnet-isa ii ethernet controller status leds........................................... 2-17 power supply................................................................................................... 2-18 pal equations ................................................................................................. 2-19 NET186 initialization overview ....................................................................... 2-20 pcnet-isa ii ethernet controller legacy mode......................................... 2-21 things to remember........................................................................................ 2-22 chapter 3 product support amd corporate applications technical support services............................... 3-2 e-mail support .............................................................................................. 3-2 online support .............................................................................................. 3-2 telephone and fax support........................................................................... 3-3 product support ................................................................................................. 3-4 www site .................................................................................................... 3-4 ftp site......................................................................................................... 3-5 third-party development support products ..................................................... 3-5 NET186about.book : NET186abouttoc.fm page iv monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual v 1.0 appendix a schematics and board bill of materials schematics........................................................................................................ a-2 board bill of materials (bom) ...................................................................... a-12 appendix b pcnet family history lance / clance...........................................................................................b-1 pcnet family of ethernet controllers ...............................................................b-2 pcnet-isa series (16-bit) for isa/eisa-based environments...................b-2 pcnet-32 (32-bit) for vl or general 32-bit local-bus based environments ................................................................................................b-3 pcnet-pci ii (32-bit) for pci-based environments ....................................b-3 pcnet-fast (32-bit) for pci-based environments.....................................b-4 software compatibility .................................................................................b-4 mace (16-bit) for general 16-bit environments............................................b-5 appendix c references books and literature .........................................................................................c-1 periodicals .........................................................................................................c-1 world wide web ...............................................................................................c-2 appendix d pal source file listing pal source file contents ................................................................................ d-2 NET186about.book : NET186abouttoc.fm page v monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual vi 1.0 appendix e eeprom contents NET186.dat file listing .................................................................................e-2 appendix f tcp/ip primer overview............................................................................................................f-2 drivers, protocol stacks, and rtos support ....................................................f-3 index list of figures block diagram of the NET186 demonstration board ........................................ 2-2 am186es microcontroller block diagram....................................................... 2-6 pcnet-isa ii ethernet controller block diagram............................................. 2-7 db-9 serial connector pinouts ......................................................................... 2-9 front view of the rj-45 connector................................................................. 2-10 am186 expansion interface pinout (p1)......................................................... 2-13 am186 expansion interface pinout (p2)......................................................... 2-14 flash chip select switch set for normal operation ....................................... 2-15 flash chip select switch set to disconnect the am186 microcontroller from on-board flash memory ........................................................................ 2-15 power supply polarity ..................................................................................... 2-18 client and server protocol stacks .....................................................................f-1 NET186about.book : NET186abouttoc.fm page vi monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual vii 1.0 list of tables notational conventions ..................................................................................... xiii installation troubleshooting.............................................................................. 1-5 memory space configuration ........................................................................... 2-3 i/o space configuration.................................................................................... 2-3 NET186 demonstration board parts list............................................................ 2-4 rj-45 connector pin functions....................................................................... 2-10 pio led indicator interface ........................................................................... 2-16 pcnet-isa ii ethernet controller led indicator interface ............................ 2-17 board bill of materials (bom) ...................................................................... a-12 protocol stack vendors...................................................................................... f-4 rtos vendors ................................................................................................... f-5 NET186about.book : NET186abouttoc.fm page vii monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual viii about the NET186 ? demonstration board the amd ? NET186 tm demonstration board is a small (3.5" x 3.5") demonstration board combining amd's am79c961a pcnet tm -isa ii ethernet controller, am186es microcontroller, palce22v10, and am29f400 flash memory. it demonstrates how simple, low-cost ethernet capability can be added to a wide variety of embedded networking applications. see figure 2-1 on page 2-2 for a block diagram of the demonstration board. typical applications of the demonstration board design include low-cost, managed ethernet hubs, "smart house" components, industrial control, point-of-sale terminals, and software development tools such as rom emulators. an entire new class of applications known as "net appliances", ranging from electric meters to coffee pots, could also use a design similar to that of the NET186 demonstration board. the NET186 demonstration board uses the am186 ? es microcontroller. the am186es microcontroller integrates peripherals such as twelve 16-bit memory chip-select controllers, two asynchronous serial controllers, three timers, 32 programmable i/os, an interrupt controller, and a watchdog timer to increase system functionality while reducing the overall cost. the memory controller also supports a glueless connection to sram, flash memory, and eeprom. the am186es microcontroller also features an innovative bus design that allows the processor to run at nearly twice the speed of standard 80c186 processors while using commodity memory devices. the NET186 demonstration board is designed with a 104-pin am186 expansion interface that provides access to the am186es microcontroller signals. for more information about the am186 expansion interface, see am186 expansion interface on page 2-12. NET186about.book : NET186about.fm page viii monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual ix 1.0 demonstration board features the NET186 demonstration board provides the following features: ? am186es microcontroller ? pcnet-isa ii single-chip ethernet controller ?e86 tm family boot monitor (e86mon tm ) board-resident utility information on invoking and using the e86mon software is provided in the e86mon tm software users manual provided in your kit. ? 512 kbyte sram ? 512 kbyte am29f400-70 flash memory ? am186 104-pin expansion interface ? two rs-232 serial ports with db-9 connectors ? one 10-mbit/s 10base-t port for twisted-pair ethernet connection with an rj-45 connector ? activity led indicators for pio signals and the ethernet controller ? reset circuitry NET186about.book : NET186about.fm page ix monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual x 1.0 software the NET186 demonstration board is supplied with three software packages. e86mon a general-purpose interactive monitor program that allows you to load, run, and debug programs from an attached pc. see the e86mon tm software users manual included in your kit for more information. usnet a tcp/ip stack with associated applications from us software that have been ported to the NET186 demonstration board for evaluation purposes. this stack allows you to run common applications like ftp, telnet, and e86web on live networks for demonstrations. tcp/ip stacks are discussed in more detail in appendix f, tcp/ip primer. e86web an embedded web-server application using us softwares internet access package (iap). this application allows the NET186 demonstration board to return simple web pages to a web browser running on another machine. information on how to configure and run the sample applications is provided in the readme.txt file on the 3?" disk named example applications that is included in your kit. documentation the NET186 tm demonstration board users manual provides information on the design and function of the NET186 demonstration board. detailed instructions for using the e86mon software are provided in the e86mon tm software users manual included in your kit. the demonstration board is shipped with the e86mon software installed in the on-board flash memory. about this manual chapter 1, quick start provides implementation and installation information for the demonstration board and instructions for invoking the e86mon software. detailed information on using the e86mon software is provided in the e86mon tm software users manual included in your kit. NET186about.book : NET186about.fm page x monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual xi 1.0 chapter 2, demonstration board functional description contains descriptions of the basic sections of the demonstration board including: flash memory, serial ports, clock and reset logic, expansion interface, ethernet controller, led indicators, and power-supply circuitry. chapter 3, product support provides information on reaching and using the amd corporate applications technical support services, product information available through amds www and ftp sites, and support tools for the embedded e86 and pcnet families. appendix a, schematics and board bill of materials contains the schematics and bill of materials (bom) for the NET186 demonstration board. appendix b, pcnet family history contains information about amds pcnet family of networking products. appendix c, references contains names of various publications and web site addresses that provide more information about ethernet and general networking. appendix d, pal source file listing contains the contents of the pal source file included in your kit. appendix e, eeprom contents contains the text file that shows the contents of the eeprom used on the NET186 demonstration board. appendix f, tcp/ip primer contains a brief explanation of protocol stacks and information about protocol stack vendors. NET186about.book : NET186about.fm page xi monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual xii 1.0 suggested reference material for information on ordering the literature listed below, see chapter 3, product support. ? am186 tm es and am188 tm es microcontrollers data sheet advanced micro devices, order #20002 ? am186 tm es and am188 tm es microcontrollers users manual advanced micro devices, order #21096 ? am186 tm and am188 tm family instruction set manual advanced micro devices, order #21267 ? am79c961a pcnet tm -isa ii jumperless, full duplex single-chip ethernet controller for isa data sheet advanced micro devices, order #19364 ? fusione86 sm catalog advanced micro devices, order #19255 ? fusione86 sm development tools reference cd advanced micro devices, order #20158 for current application notes and technical bulletins, see our www page at http:/ /www.amd.com . NET186about.book : NET186about.fm page xii monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual xiii 1.0 documentation conventions the NET186 tm demonstration board users manual uses the conventions shown in table 0-1 (unless otherwise noted). table 0-1. notational conventions symbol usage boldface indicates that characters must be entered exactly as shown, except that the alphabetic case is only significant when indicated. typewriter face indicates computer text input or output in an example or listing. NET186about.book : NET186about.fm page xiii monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual 1-1 chapter 1 quick start this chapter provides information that will help you quickly set up and start using the NET186 demonstration board. the NET186 demonstration board is supported by the e86mon software. the e86mon software enables you to load, run, and debug programs on the NET186 demonstration board. for more information on using the e86mon software, refer to the e86mon tm software user's manual included in your kit. for information on how to: ? connect the NET186 demonstration board to a pc, see page 1-2 ? invoke the e86mon software, see page 1-4 ? troubleshoot installation problems, see page 1-5 ? run a sample application, see page 1-6 ? locate related sources of information, see page 1-7 NET186about.book : NET186ch1.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 1-2 1.0 connecting to a pc the procedure in this section describes how to connect the NET186 demonstration board to a pc for use as a standard am186 microcontroller evaluation board using the e86mon software over an rs-232 port. for information on attaching the NET186 demonstration board using the pcnet-isa ii ethernet controller, see the readme.txt file on the 3? " disk named example applications that is included in your kit. follow the steps below to connect the NET186 demonstration board to your pc. installation requirements the items listed below are necessary to install and run the NET186 demonstration board: ? pc with an available com port ? terminal emulation software (such as microsoft windows ? terminal or procomm plus) that supports ascii file transfers, software flow control (xon/ xoff), and send break capability ? power source for universal power supply board installation caution: as with all computer equipment, the NET186 demonstration board may be damaged by electrostatic discharge (esd). please take proper esd precautions when handling any board. 1. remove the board from the shipping carton. visually inspect the board to verify that it was not damaged during shipment. ! NET186about.book : NET186ch1.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 1-3 1.0 2. connect the NET186 demonstration boards db-9 serial port (j3) to an available com port. use the serial cable included in the NET186 demonstration board kit and note that a db-9 to db-25 serial connector adapter is provided if your host system requires it. the pinout of the demonstration boards serial connector is shown in figure 2-4 on page 2-9. danger: make sure the power supply is not plugged into an electrical outlet before connecting it to the NET186 demonstration board. 3. connect the power supply to the barrel connector on the NET186 demonstration board. 4. apply power to the demonstration board by connecting the power supply to an electrical outlet. when the demonstration board is powered up, the leds (cr5C cr12) should flash in an oscillating pattern for a three-second interval. caution: if using your own power supply, ensure that it is a 5-v supply. using a 9-v supply will permanently damage the board. com1 com2 serial cable ! ! NET186about.book : NET186ch1.fm page 3 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 1-4 1.0 5. invoke the terminal emulation program at 19200 baud or higher, no parity, 8 data bits, and 1 stop bit; enable the software flow control (xon/xoff), if supported. note that the NET186 demonstration board can reliably autobaud at rates up to 115 kb/s. you can use these higher baud rates if your pc supports them. 6. reset the demonstration board by depressing and releasing the reset switch located in the upper right corner of the demonstration board. the leds on the board (cr5Ccr12) will flash in an oscillating pattern for three seconds, as they did upon power up. during the three-second period while the leds are flashing, type an a in the terminal window to ensure that the e86mon software uses the correct baud rate. when the e86mon software receives an a , it adjusts its baud rate (if necessary) and displays the welcome message and prompt. welcome to amd's emon 186! (? NET186 tm demonstration board users manual 1-5 1.0 table 1-1. installation troubleshooting problem solution nothing happens when pushing the reset button. sometimes it is difficult to make a good connection when pushing the small reset button. try removing the power supply from the ac electrical outlet and disconnecting and reconnecting the power supply. you should also verify that the flash chip select switch (sw2) is pointing in the correct direction. see figure 2-8 on page 2-15 for more information. the leds will flash in an oscillating pattern when the reset is successful. the computer does not respond with the e86mon software prompt. reset the board by pressing the reset switch and typing an a while the leds are flashing in an oscillating pattern. if this does not work, verify the power, check the cables, etc. after typing a during reset, the terminal emulation software displays unreadable characters. check the baud rate setting for the terminal emulation software. it should be set to 19200. also check the word length (8), stop bits (1), parity (n), and turn off any hardware flow control. after a processor reset, the leds do not flash in the expected pattern. check that the power led is on and the correct voltage is supplied to the board. ensure that the polarity of the power connector is correct. the terminal emulation program locks up the software or pc. check the com port connection with the target board. make sure that the same com port is selected in the terminal emulation software. in some pcs if the correct com port is not specified, the software will fail to functionit will lock in a continuous loop waiting for an answer from the incorrect serial port. the power led does not turn on with power. immediately disconnect the power supply. ensure that the polarity of the power connector is correct. this is a very serious failure of the hardware. if the power source is connected incorrectly, the board will be permanently damaged. there is a problem you cannot resolve. contact the amd corporate applications technical support services (see chapter 3, product support for phone numbers and more information.) NET186about.book : NET186ch1.fm page 5 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 1-6 1.0 NET186 sample applications two sources of sample applications are available for the NET186 demonstration board and are available in your kit: ?the 3? " disk containing the e86mon demonstration board utility provides sample applications in the /out and /samples directories. for more information about loading and running the e86mon sample code, see the e86mon tm software users manual included in your kit. ?the 3? " disk containing the NET186 demonstration board applications provides a demonstration version of us softwares tcp/ip stack usnet, as well as a sample web server application. to load the demonstration library and application, refer to the readme.txt file on the disk. NET186about.book : NET186ch1.fm page 6 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 1-7 1.0 for more information... if you need more information about: ? NET186 demonstration board hardware, see chapter 2 of this manual ? the e86mon software, see the e86mon tm software users manual included in your kit ? the am186es microcontroller, see the am186 t m es/eslv and am188 tm es/eslv microcontrollers data sheet and the am186 tm es and am188 tm es microcontrollers users manual ? the pcnet-isa ii ethernet controller, see the am79c961a pcnet tm -isa ii jumperless, full duplex single-chip ethernet controller for isa data sheet ? the am29f400 flash, see the am29f400 data sheet ? the palce22v10 device, see the palce22v10 pal devices book and design guide ? network products, see the networking products literature and software cd NET186about.book : NET186ch1.fm page 7 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual 2-1 chapter 2 demonstration board functional description the NET186 demonstration board shows how easy it is to create a low-cost, embedded ethernet solution using the am186es microcontroller and the am79c961a pcnet-isa ii single-chip ethernet controller. in addition to the am186es microcontroller and pcnet-isa ii ethernet controller, the NET186 demonstration board contains a single am29f400 4-mbit flash memory and a single 4-mbit sram. the flash memory is shipped with the e86mon software and demonstration application software and can be loaded with user-application programs. the sram will typically contain temporary user data in addition to the ethernet packet data. read the following sections to learn more about the NET186 demonstration board hardware: ? hardware block diagram and memory map on page 2-2 ? NET186 demonstration board parts list on page 2-4 ? am186es microcontroller implementation on page 2-5 ? rom space on page 2-8 ? sram on page 2-8 ? rs-232 serial ports on page 2-9 ? pcnet-isa ii ethernet controller on page 2-10 ? clock and reset logic on page 2-12 ? am186 expansion interface on page 2-12 ? flash chip select switch on page 2-15 ? led indicators on page 2-16 ? power supply on page 2-18 ? pal equations on page 2-19 ? NET186 initialization overview on page 2-20 ? things to remember on page 2-22 NET186about.book : NET186ch2.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-2 1.0 hardware block diagram and memory map one of the key features of the NET186 demonstration board is the near glueless interface between the am186es microcontroller and the pcnet-isa ii ethernet controller. figure 2-1 shows a block diagram of the NET186 demonstration board. some elements, such as the rs232 serial ports and the ethernet connection, were left off for clarity. note that a single pal22v10 device is used to connect the processor to the ethernet controller. in fact, the logic inside the pal22v10 will fit easily into a pal16v8, or could be implemented with ssi logic gates. the pal22v10 was used on the NET186 demonstration board for user-expansion purposes. figure 2-1. block diagram of the NET186 demonstration board wr * adx data irq hold hlda hlda* iochrdy aen* lcs* master* am186es pcnet-isa 79c961a am29f400 (512kb) 256k x 16 sram (512 kb) rd* memwr* rcs* sbhe * palce 22v10 tl7705a res* reset 40, 33, 25 mhz 20mhz irq drq /dack iochrdy /ior /iow /memr /memw reset /ref /smemr /iocs16 int0 hold hlda ardy /pcs2 /pcs3 /we /oe /oe ucs* rcs* /ce /ce /ucs n/c +5v whb* wlb* +5v +5v +5v +5v +5v /byte +5v eeprom clka /lcs /sbhe /mstr +5v /whb /wlb +5v rd* /bhe bhe* sbhe* memwr* memwr* r/w /lb /ub sbhe* a0 2 rs-232 serial ports 10base-t NET186about.book : NET186ch2.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-3 1.0 table 2-1 and table 2-2 show where flash memory, sram, and the pcnet-isa ii ethernet controller are configured in am186es microcontroller memory and i/o space. note that the pcnet-isa ii ethernet controller i/o base address can be modified by editing the setup eeprom. please refer to the pcnet-isa ii ethernet controller documentation for i/o register mapping for that device. also, please refer to the am186 tm es and am188 tm es microcontrollers data sheet for locations and use of built-in peripherals, registers, and logic. table 2-1. memory space configuration table 2-2. i/o space configuration the am186es microcontroller boots at the very top of addressable memory. the first code fetch is done at address ffff0h, and asserts the upper chip select (ucs ) line. on the NET186 demonstration board, this line is configured to enable the flash memory. the flash memory is available exclusively to the am186es microcontroller, while the sram can be accessed by both the am186es microcontroller and the pcnet-isa ii ethernet controller. the pcnet-isa ii ethernet controller actually takes over the processor local bus, and with dma control, transfers ethernet packet data directly to and from the sram. note that the NET186 demonstration board comes equipped with 512 kbyte of flash memory and 512 kbyte of sram. most applications will not need this much memory. cpu address memory space 0x80000C0xfffff flash memory (512 kbyte) 0x00000C0x7ffff sram (512 kbyte) cpu address i/o space 0x200C0x21f pcnet-isa ii ethernet controller registers 0xff00C0xffff am186es peripheral control block NET186about.book : NET186ch2.fm page 3 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-4 1.0 NET186 demonstration board parts list table 2-3 lists the NET186 demonstration board part numbers, parts, and where to find more information about the individual parts. table 2-3. NET186 demonstration board parts list part number description for more information, see cr1Ccr12 signal leds page 2-16 j1 power connector page 2-18 j2, j3 serial ports page 2-9 j5 rj-45 ethernet connector page 2-10 p1, p2 am186 expansion interface page 2-12 sw2 ucs chip select switch page 2-15 u10 am186es 40-mhz microcontroller page 2-5 u11 flash memory page 2-8 u2 pal22v10 page 2-19 u4 reset controller (ti tl7705acd) page 2-12 u5, u6 rs-232 driver/receiver devices (max232) page 2-9 u7 pcnet-isa ii ethernet controller page 2-10 u9 sram page 2-8 y1 40-mhz fundamental mode crystal page 2-12 y2 20-mhz fundamental mode crystal page 2-12 NET186about.book : NET186ch2.fm page 4 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-5 1.0 am186es microcontroller implementation the NET186 demonstration board is shipped with an am186es microcontroller that operates at 40 mhz. although not supported by the on-board crystal, the am186es microcontrollers are also available in 20-, 25-, and 33-mhz operating frequencies. the NET186 demonstration board also includes a pcnet-isa ii ethernet controller. see figure 2-3 on page 2-7 for a block diagram detailing the pcnet-isa ii ethernet controllers functionality. the am186es microcontrollers are designed to meet the most common requirements of embedded products developed for the communications, office automation, mass storage, and general embedded markets. specific applications include feature phones, cellular phones, pbxs, multiplexers, modems, disk drive controllers, hand-held and desktop terminals, fax machines, line cards, managed hubs, and industrial control. refer to the am186 tm es/eslv and am188 tm es/eslv microcontrollers data sheet for more information on the specific features of the am186es microcontrollers. see figure 2-2 on page 2-6 for a block diagram detailing the am186es microcontrollers functionality. NET186about.book : NET186ch2.fm page 5 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-6 1.0 figure 2-2. am186es microcontroller block diagram s 2-s 0 interrupt control unit timer control unit dma unit bus interface unit execution unit chip-select unit clock and power management unit control registers 16-bit count registers max count a registers 16-bit count registers 20-bit destination pointers 20-bit source pointers control registers contro l registers control registers 01 (wdt)2 01 max count b registers refresh control unit control registers control registers control registers clkoutb clkouta int6-int4 int3/inta 1/irq int2/inta 0 int1/select int0 tmrout0 tmrout1 drq0 drq1 v cc gnd tmrin0 tmrin1 ardy srdy dt/r den /ds hold hlda asynchronous serial port 0 txd0 rxd0 nmi a19-a0 ad15-ad0 ale bhe /aden wr wlb whb rd res lcs /once 0 mcs 2-mcs 0 pcs 6/a2 pcs 3-pcs 0 pcs 5/a1 ucs /once 1 x2 x1 psram control unit mcs 3/rfsh pio pio31- pio0 control registers s6/lock / clkdiv 2 uzi asynchronous serial port 1 rts 0/rtr 0 cts 0/enrx 0 txd1 rxd1 cts 1/enrx 1 rts 1/rtr 1 pulse width demod- ulator (pwd) pwd NET186about.book : NET186ch2.fm page 6 monday, june 23, 1997 11:05 am 10 am79c961a preliminary block diagram: bus master mode 19364a-1 isa bus interface unit rcv fifo xmt fifo fifo control buffer management unit eeprom interface unit 802.3 mac core encoder/ decoder (pls) & aui port 10base-t mau private bus control jtag port control aen dack [3, 5?] drq[3, 5?] iochrdy iocs16 ior io w irq[3, 4, 5, 9, 10, 11, 12] master memr memw ref reset sbhe bale sd[0-15] la[17-23] sa[0-19] sleep shfbusy eedo eedi eesk eecs dvdd[1-7] dvss[1-13] avdd[1-4] avss[1-2] dxcvr/ear ci+/ di+/ xtal1 xtal2 do+/ rxd+/ txd+/ txpd+/ irq15/apcs bpcs led [0?] prdb[0?] tdo tms tdi tck NET186 tm demonstration board users manual 2-8 1.0 rom space the NET186 demonstration board contains on-board rom space for use by the e86mon software and application code. this rom space is implemented as an am29f400 70-ns flash memory device. the flash memory device is mapped to the upper region of addressable memory at 80000h to fffffh. the flash memory device is organized as 256k x 16 bits and is connected to the ucs (upper memory chip select) signal of the microcontroller. after a valid reset, the am186es microcontroller fetches the first instruction from the flash memory device by asserting ucs and driving the address bus with the value ffff0h. the e86mon software enables you to program the flash memory device with specific types of hex files. intel hex and intel extended hex format files are supported. this software functionality is provided to eliminate the need to remove the flash memory device. caution: do not attempt to remove the tsop flash memory (u11) or sram device (u9) because doing so may cause damage to the board. sram the NET186 demonstration board utilizes sram for its read/write storage. the board provides 512 kbyte of sram using a 70-ns device that is mapped from 00000h to 7ffffh. the sram device is organized as 256k x 16 bits and is attached to the lcs (lower memory chip select) signal of the microcontroller. for every access to the above address range, the am186es microcontroller will assert lcs . ! NET186about.book : NET186ch2.fm page 8 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-9 1.0 rs-232 serial ports the NET186 demonstration board provides two on-board rs-232 serial ports (j2 and j3) that are directly driven by the am186es microcontroller. the serial ports are equipped with db-9 dce connectors. the pin assignment for the db-9 connectors is shown in figure 2-4. traditionally, pcs have data terminal equipment (dte) ports which connect directly to the data communication equipment (dce) port on the NET186 demonstration board. a null modem cable is not required to connect a dte port with a dce port. the rs-232 specification calls for signals that are driven at non-ttl levels. single- chip rs-232 driver/receiver devices (max232, u5 and u6) are used to convert to and from the required voltages. figure 2-4. db-9 serial connector pinouts j2 5 gnd 4 nc 3 rxd0 2 txd0 nc 9 rts 0 8 cts 0 7 nc 6 1 nc j3 5 gnd 4 nc 3 rxd1 2 txd1 1 nc nc 9 rts 1 8 cts 1 7 nc 6 NET186about.book : NET186ch2.fm page 9 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-10 1.0 pcnet-isa ii ethernet controller the NET186 demonstration board provides one on-board 10base-t port (j5) that is directly driven by the pcnet-isa ii ethernet controller. the 10base-t port is equipped with an rj-45 connector. figure 2-5 and table 2-4 show the pin assignment and pin functions for the rj-45 connector. figure 2-5. front view of the rj-45 connector table 2-4. rj-45 connector pin functions pin number function 1tx+ 2tx- 3rx+ 4 not used 5 not used 6 rxC 7 not used 8 not used 12345678 NET186about.book : NET186ch2.fm page 10 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-11 1.0 10base-t port the pcnet-isa ii ethernet controller provides an on-chip physical layer function so the only other device required to interface to the rj-45 connector is a 10base-t filter with transformer. the 10base-t interface supports the maximum cable length (100 meters) between a node and a hub. to link two stations through a 10base-t hub, simply use two straight-through cables: one cable connects the twisted-pair port on the NET186 demonstration board to the hub; the other cable connects the hub to the second station. each end of the twisted-pair cable has a mating, rj-45 type, eight-pin modular plug that connects to the twisted-pair jack of each station. figure 2-5 and table 2-4 on page 2-10 show the pin assignment and pin functions for the rj-45 connector. the pcnet tm -isa ii ethernet controller hardware users manual , order #19425, contains detailed information about the 10base-t interface. access unit interface (aui) port the pcnet-isa ii ethernet controller provides an access unit interface (aui) port. this aui port, with the appropriate transceiver, allows connections to different ethernet medias; for example, coaxial shielded cables for 10base2 and 10base5 connections and filter cables for 10base-f connections. connection to the aui port effectively bypasses the on-chip 10base-t transceiver. note: the aui port is not supported by the NET186 demonstration board. during initialization, the pcnet-isa ii ethernet controller first checks for activity on its 10base-t port. if the controller determines there is activity on that port, a link will be established with the network. the aui port will be ignored, even if there is a physical connection on the aui port via a transceiver device. if the pcnet-isa ii ethernet controller determines there is no activity on the 10base-t port, the controller checks for activity on the aui port. when the controller determines there is activity on the aui port, a link is established with the network. the 10base-t port is ignored until the next pcnet-isa ii ethernet controller initialization sequence. when the pcnet-isa ii ethernet controller determines there is no activity on either the 10base-t or the aui port, the controller typically issues an error condition. NET186about.book : NET186ch2.fm page 11 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-12 1.0 clock and reset logic the am186es microcontroller can be configured for either 1x or ?x clock mode. as configured on the NET186 demonstration board, the microcontroller is in 1x clock mode. the input is generated by a 40-mhz fundamental mode crystal (y1) that is connected to the x1/x2 inputs of the microcontrollers, resulting in a 40-mhz system clock. the pcnet-isa ii ethernet controller is driven by a 20-mhz fundamental mode crystal (y2). y2 is configured in ?x clock mode, resulting in a 10-mhz controller clock frequency. system reset is controlled by a voltage supply supervisor (ti tl7705acd, u4). this device generates the processors reset input, asserting the am186es microcontrollers res pin for 13 ms when the reset switch is depressed. the voltage supply supervisor also holds reset active when the power falls below 4.75 v. am186 expansion interface the am186 expansion interface facilitates prototyping with external devices by using the NET186 demonstration board as the ethernet and processor elements of an embedded design. the NET186 demonstration board supports the pc/104 form-factor expansion-type connector for additional prototyping and testing. the traditional pc/104 signals are not present on the board; however, the am186 expansion interface enables you to attach wirewrap or prototype boards that have the same standard physical interface. the pinout of the expansion interface is shown in figure 2-6 on page 2-13 and figure 2-7 on page 2-14. warning: the am186 expansion connector is mechanically identical to the pc-104 standard. however, the am186 expansion is not electrically compliant with the pc-104 standard and should not be used with pc-104 plug- on cards. ! NET186about.book : NET186ch2.fm page 12 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-13 1.0 figure 2-6. am186 expansion interface pinout (p1) p1 a b whb gnd vcc ale 28 29 30 31 wlb 27 hlda 26 int3 25 int4 24 nmi 23 cts 022 rxd0 21 txd0 20 rts 0 19 nc 18 mcs 0 17 mcs 1 16 mcs 2 15 mcs 3 14 wr 11 rd 12 uzi 13 lcs 10 9 tmrout1 8 tmrin1 7 tmrin0 6 gnd 32 nc 5 tmrout0 4 vcc 3 reset 2 gnd 1 32 31 30 29 27 26 25 24 23 22 21 20 19 18 17 16 15 14 11 12 13 10 9 8 7 6 5 4 3 2 1 28 gnd ma0 ma1 ma2 ma3 ma4 ma5 ma6 ma7 ma8 ma9 ma10 ma11 ma12 ma13 ma14 ma15 ma16 ma17 ma18 ma19 srdy ardy/ iochrdy ad0 ad1 ad2 ad3 ad4 ad5 ad6 ad7 nc cs_flash/ucs NET186about.book : NET186ch2.fm page 13 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-14 1.0 figure 2-7. am186 expansion interface pinout (p2) p2 d 18 17 16 15 14 11 12 13 10 9 8 7 6 5 4 3 2 1 gnd den vcc dt/r s 0 s 1 s 2 clkoutb clkouta drq0 drq1 nc int0/irq_enet int1 int2 s6 hold/drq_ene t 0gnd c flashcs 19 ad15 18 ad14 17 ad13 16 ad12 15 ad11 14 ad8 11 ad9 12 ad10 13 nc 10 nc 9 nc 8 pcs 0 7 pcs 1 6 pcs 2 5 pcs 3 4 pcs 5 3 pcs 6 2 bhe 1 0 gnd rfsh 19 gnd NET186about.book : NET186ch2.fm page 14 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-15 1.0 flash chip select switch the e86mon software utility enables you to program the on-board flash memory with your own application code; however, there may be situations when you want to test your application from reset. to enable you to test your own application code, the NET186 demonstration board provides a switch that routes the on-board flash memory chip select from the am186 expansion interface connector, instead of from the am186es ucs signal. (the chip select for the on-board flash memory has a weak pull-up to prevent the ucs signal, available on the am186 expansion interface connector, as its chip select.) for normal operation, the flash chip select switch (sw2) should be set as shown in figure 2-8. the am186es microcontrollers ucs signal will be connected to the on-board flash memorys ce signal. figure 2-8. flash chip select switch set for normal operation to disconnect the am186es microcontroller from the on-board flash memory, set the flash chip select switch as shown in figure 2-9. this allows external equipment to access the flash memory via the flashcs signal on the expansion connector. the flashcs signal is connected to the flash memory ce signal. this also allows the am186es microcontroller to execute code from an external device with the on-board flash memory disabled. figure 2-9. flash chip select switch set to disconnect the am186 microcontroller from on-board flash memory sw2 sw2 NET186about.book : NET186ch2.fm page 15 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-16 1.0 led indicators the NET186 demonstration board uses on-board led indicators to show activity on a subset of the programmable i/o (pio) signals from the am186es microcontroller and on the pcnet-isa ii ethernet controller. the following sections describe these led indicators. pio activity led indicators eight leds (cr5Ccr12) are used to indicate activity on a subset of the am186 microcontrollers pio signals. table 2-5 shows which pio signal is represented by each led. table 2-5. pio led indicator interface led pio pin name pio register bit number cr5 tmrout0 15 cr6 srdy 14 cr7 den 5 cr8 dt/r 4 cr9 pcs 5 3 cr10 pcs 6 2 cr11 tmrout1 1 cr12 tmrin1 0 NET186about.book : NET186ch2.fm page 16 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-17 1.0 pcnet-isa ii ethernet controller status leds four leds (cr1Ccr4) are used to indicate the status of the pcnet-isa ii ethernet controller interface. these leds are connected in reverse order to led outputs 0C3 of the ethernet controller. the function of these leds can be controlled by the configuration of the isa bus configuration registers on the pcnet-isa ii ethernet controller. the configuration registers can be configured both by eeprom and software. the NET186 demonstration board eeprom and software leave the leds in their default configuration (cr1/led3 is inverted from its default function by the eeprom). xxx shows the leds, their corresponding ethernet controller signal, and the function of each one. table 2-6. pcnet-isa ii ethernet controller led indicator interface for more information about the use of these leds, see the am79c961a pcnet tm - isa ii jumperless, full duplex single-chip ethernet controller for isa data sheet , order #19364. led ethernet controller signal name led function cr4 led0 10base-t link status. when on, this led indicates a good 10base-t connection. cr3 led1 indicates receive activity from the network. cr2 led2 indicates transmit activity from the ethernet controller. cr1 led3 indicates incorrect receive polarity on the 10base-t connection. NET186about.book : NET186ch2.fm page 17 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-18 1.0 power supply when used as a stand-alone board, the NET186 demonstration board requires an input power supply of 5.0 v dc, 5%, 250 ma. when adding components to the NET186 demonstration board via the am186 expansion interface, additional power may be necessary. the power supply connector is a 5.5-mm barrel connector where the center post is v cc and the outer ring is gnd, as shown in figure 2-10. figure 2-10. power supply polarity caution: use the 5-v universal power supply included with the kit. using a 9-v supply will permanently damage the board. g n d + 5 v p o w e r sw1 cr12 reset cr11 cr5 cr9 cr8 cr7 cr6 cr10 leds j5 ethernet connector ! NET186about.book : NET186ch2.fm page 18 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-19 1.0 pal equations the glue logic required for the am186es microcontroller-to-pcnet-isa ii ethernet controller interface is minimal. a total of eight inputs, six outputs, and a clk are required to complete the design and will actually fit in a smaller pal16v8 device. refer to appendix d, pal source file listing for the pal22v10 source file in palasm format. note that the input signal mcs 0 is not required and is connected only to allow you to "memory map" the pcnet-isa ii ethernet controller (versus mapping in i/o space). the most complicated task is converting the signals available on the am186es microcontroller to the isa bus read/write logic required by the pcnet-isa ii ethernet controller. to allow 8-bit i/o cycles, sbhe (system byte high enable) must be driven appropriately to the pcnet-isa ii ethernet controller. in the case of read operations, sbhe is asserted for both 8-bit and 16-bit operations. in the case of write operations, sbhe is asserted only when the upper byte needs to be written. this is the case for all word writes to even addresses and byte writes to odd addresses. the isa bus specification requires a 5-ns hold time from ior /iow inactive to sbhe inactive. a digital one-shot implemented in the pal device extends sbhe from the am186es microcontroller to satisfy this requirement. unfortunately, the am186es microcontrollers lcs signal, which would typically drive the sram memory directly, does not three-state during a bus hold. because the pcnet-isa ii ethernet controller must master the bus and dma to and from memory, rcs is created in the pal device to drive the chip select on the ram. this signal is the logical or of lcs and master . when the pcnet-isa ii ethernet controller controls the bus, master will assert, and the ram chip select will be continuously active. the sram selected (toshiba 256k x 16 or equivalent) requires a minimum write pulse of 50 ns. the am186es microcontrollers wr signal cannot be used directly because it has a minimum pulse width of only 40 ns at 40 mhz. the pal device is used to combine whb and wlb , generating the proper timing. NET186about.book : NET186ch2.fm page 19 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-20 1.0 NET186 initialization overview when the NET186 demonstration board comes out of reset, both the am186es microcontroller and the pcnet-isa ii ethernet controller will go through an initialization process. the am186es microcontroller will execute a program resident in the flash memory that initializes the various internal registers (peripheral control block) required to talk to peripherals. specifically, the ucs , lcs , pcs 2, and pcs 3 chip selects need to be programmed for the flash memory, sram, and pcnet-isa ii ethernet controller, respectively. the following portion of code demonstrates how the chip selects are set-up for the NET186 demonstration board: /* set /ucs to 512 kbytes beginning at 80000h, no wait states */ outportword(umcs, 0x803c) ; /* set /lcs to 512 kbytes ending at 7ffffh, no wait states */ outportword(lmcs, 0x7f3c) ; /* set pios 18 and 19 (pcs2,3)to normal mode as peripheral chip selects */ outportword(pio1_mode,inportword(pio1_mode) & ~0x000c) ; /* set pios 18 and 19 (pcs2,3)to normal mode as peripheral chip selects */ outportword(pio1_dir,inportword(pio1_dir) & ~0x000c) ; /* assert pcs in i/o space (vs memory mapped) */ outportword(mpcs, 0x81b8) ; /* set base for pcs to 0x0000, external ready required, 3 wait states minimum */ outportword(pacs, 0x0073) ; when this setup is complete, the am186es microcontroller can communicate with the pcnet-isa ii ethernet controller register set at any i/o address between 200h and 3ffh. note that where the pcnet-isa ii ethernet controller is mapped depends upon how it has been initialized. NET186about.book : NET186ch2.fm page 20 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-21 1.0 on the NET186 demonstration board, the pcnet-isa ii ethernet controller initialization is executed by the preprogrammed eeprom. immediately following reset, the contents of the eeprom are automatically read into the pcnet-isa ii ethernet controller register set allowing the am186es microcontroller to communicate to it. refer to the am79c961a pcnet tm -isa ii jumperless, full duplex single-chip ethernet controller for isa data sheet , order #19364, for details regarding the contents and arrangement of the eeprom. pcnet-isa ii ethernet controller legacy mode the am79c961a pcnet-isa ii ethernet controller is designed so that it always responds to plug-and-play (pnp) configuration software. most embedded networking applications, including the NET186 demonstration board, do not require pnp. in fact, pnp can complicate software initialization. fortunately, the pcnet- isa ii ethernet controller features a legacy mode that allows you to hard code the resources (i/o port, dma, irq, etc.) in the eeprom. this allows the am186es microcontroller to communicate to the pcnet-isa ii ethernet controller immediately following reset. in legacy mode, the ethernet controller ignores the pnp softwares special initiation key sequence (6a) and is visible in the i/o space. only special setup programs are able to reconfigure the ethernet controller while in legacy mode. if the eeprom is missing, empty, or corrupted, the ethernet controller will still recognize amds special initiation key sequence (6b). to enable legacy mode, write a 1 to the lgcy_en bit (bit 6) of pnp register 0xf0. the preferred method for this is to set the lgcy_en bit in the vendor byte (pnp 0xf0) field of the eeprom located in word offset 0x1a. when written with a 1, the ethernet controller will not respond to the pnp initiation sequence (6a), but will respond to the amd key sequence (6b); therefore, the ethernet controller cannot be reconfigured as pnp software. when set to 0, the ethernet controller will respond to the 6a key sequence if the eeprom read was successful; otherwise, it will respond to the 6b key sequence. see the am79c961a pcnet tm -isa ii jumperless, full duplex single-chip ethernet controller for isa data sheet , order #19364, for a detailed description of legacy mode and the lgcy_en bit. NET186about.book : NET186ch2.fm page 21 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 2-22 1.0 things to remember ? under normal operation, the pcnet-isa ii ethernet controller has to reside somewhere between address 200h and 3ffh for it to respond to i/o cycles. the pcnet-isa ii ethernet controller only decodes 10 address bits for i/o cycles and 12 for pnp commands. ? the important pnp i/o ports are 279h, a79h, and 203hC3ffh. if the NET186 demonstration board is ever run without an eeprom, these addresses must be available to bring the device out of pnp isolation. ?pcs 2 and pcs 3 assert at address 200h and 3ffh respectively. these pins are used as cts and rts for serial port 1, thus preventing the use of hardware flow control if the pcnet-isa ii ethernet controller is mapped to i/o space. cts and rts are routed to the driver for serial port 1, but are disabled on the production NET186 demonstration boards by not stuffing the 0-ohm resistors at r3 and r4. if the pcnet-isa ii ethernet controller is memory mapped, thus not requiring pcs 2 and pcs 3, then r3 and r4 could be stuffed. ? with 512 kbyte of flash memory and 512 kbyte of sram, the entire memory addressing capability of the NET186 demonstration board is utilized. the pcnet-isa ii ethernet controller must be mapped to i/o space. the logical place to map the pcnet-isa ii ethernet controller is in i/o space using pcs 2 and pcs 3. this provides the flexibility to map the device anywhere between 200h and 3ffh and to run without an eeprom if desired. the tradeoff is giving up cts and rts flow control on the second serial port. if an application required less flash memory or sram, then the pcnet-isa ii ethernet controller could be memory mapped using one of the mcs signals. this would allow you to recover cts and rts. this application is provided for on the NET186 demonstration board by including mcs 0 as an input to the pal device. by simply reprogramming the pal device, the pcnet-isa ii ethernet controller could be memory mapped. NET186about.book : NET186ch2.fm page 22 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual 3-1 chapter 3 product support this chapter provides information on: ? reaching and using the amd corporate applications technical support services, on page 3-2 ? product information available through amds www and ftp sites, on page 3-4 ? support tools for the e86 and pcnet families, on page 3-5 note that amd does not support source code changes to the e86mon software or other demonstration software, and amd does not support the running of the e86mon software on demonstration boards other than the amd sd186/sd188 family and the NET186 demonstration boards. the e86mon software and other demonstration board source code is provided to customers as is. NET186about.book : NET186ch3.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 3-2 1.0 amd corporate applications technical support services technical support for the e86 family of microcontrollers, corresponding support products, and the pcnet family of products is available via e-mail, online (bbs and www), and through telephone or fax. e-mail support please include your name, company, telephone and fax numbers, amd product requiring support, and question or problem in all e-mail correspondence. in the usa and canada, send mail to: lpd.support@amd.com in europe and the uk, send mail to: euro.tech@amd.com online support amd offers technical support on our www site and through our bulletin board services. see product support on page 3-4 for more on what our www and ftp sites have to offer. www technical support go to amds home page at http://www.amd.com and click on service for the latest amd technical support phone numbers, software, and frequently asked questions. bulletin board support country number usa and canada (408) 749-4659 uk and europe 44-(0) 1276-803-211 NET186about.book : NET186ch3.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 3-3 1.0 telephone and fax support telephone assistance is available in the u.s. from 8:00 a . m . to 5:00 p . m . pacific time, monday through friday (except major holidays). in europe, assistance is available during u.k. business hours. contact the hotlines at one of the following telephone or fax numbers. direct dial numbers toll-free numbers country number usa and canada tel.: (408) 749-5703 fax: (408) 749-4753 japan tel.: (03) 3346-7550 fax: (03) 3346-9828 far east asia fax: (852) 2956-0599 germany tel.: 089 450 53199 uk and europe tel.: 44-(0) 1276-803-299 fax: 44-(0) 1276-803-298 country number usa and canada (800) 222-9323 france 0590-8621 italy 1678-77224 japan 0031-11-1163 NET186about.book : NET186ch3.fm page 3 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 3-4 1.0 product support amds www and ftp sites are described below. questions, requests, and input concerning these sites can be sent via e-mail to webmaster@amd.com . www site a subset of the amd www pages, the embedded processor and networking product pages are frequently updated and include general product information, technical documentation, and support and tool information. to access these pages, go to the amd home page at http://www.amd.com and click on embedded processors or networking. you can also access the pages directly at http:// www.amd-embedded.com or www.amd.com/products/npd/npd.html . the embedded processors and networking home pages are divided into four sections: ? whats new announces new e86 or pcnet family products, and highlights new applications using our products. ? product overviews briefly describes all the products in the e86 and pcnet families, and describes how these parts are ideal in specific focus markets. ? support and tools provides information about the tools that support our products, and offers online benchmarking tools. ? technical documentation provides the available literature list of datasheets, application notes, users manuals, and promotional literature, and describes how to order these documents. many are also available online in pdf form. (to access the literature ordering center via telephone, call one of the numbers listed on the back cover of your manual.) the embedded processors page also includes a link under support and tools called demo board updates which provides access to the amd ftp site where the latest e86mon software releases are available. NET186about.book : NET186ch3.fm page 4 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual 3-5 1.0 ftp site in addition to the documentation on our www pages, amd provides software through an anonymous ftp site. to download the software, ftp to ftp.amd.com and log on as anonymous using your e-mail address as a password. or via your web browser, go to ftp://ftp.amd.com . software relating to the embedded processor and networking products can be found in the /pub/epd/e86/ or /pub/ npd/software/ directories. third-party development support products the fusione86 sm program of partnerships for application solutions provides the customer with an array of products designed to meet critical time-to-market needs. products and solutions available from the amd fusione86 partners include emulators, hardware and software debuggers, board-level products, and software development tools, among others. the fusione86 sm catalog , order #19255, and the fusione86 sm cd , order #21058 describe these solutions. in addition, mature development tools and applications for the x86 platform are widely available in the general marketplace. NET186about.book : NET186ch3.fm page 5 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual a-1 appendix a schematics and board bill of materials this appendix contains schematics for the NET186 demonstration board components (see page a-2) and the bill of materials (see page a-12). NET186about.book : 186appa.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual a-2 1.0 schematics the NET186 demonstration board schematics have been blocked out to isolate functionality of the design onto separate pages as follows: ? page a-3 contains the top level interconnect signals and the pal22v10. ? page a-4 contains the pcnet-isa ii ethernet controller. ? page a-5 contains the 10base-t interface and eeprom. ? page a-6 contains various signal pull-ups and pull-downs, including the reset board id. ? page a-7 contains the am186es microcontroller. ? page a-8 contains the rs-232 interfaces. ? page a-9 contains the processor leds (cr5-cr12), the sram, and the flash memory. ? page a-10 contains the am186 expansion interface. ? page a-11 contains the reset circuit and switch and the power supply decoupling caps. these schematics and design are subject to change. NET186about.book : 186appa.fm page 2 monday, june 23, 1997 11:05 am c drq_enet aen ale d[15:0] iochrdy ma[19:0] reset shfbusy dack_enet irq_enet master memw rd sbhe wr ethernet subsection rclkouta u2 i0 i1 i10 i11 i2 i3 i4 i5 i6 i7 i8 i9 io0 io1 io2 io3 io4 io5 io6 io7 io8 io9 gnd;14 vdd;28 pal22v10 2 3 13 16 4 5 6 7 9 10 11 12 17 18 19 20 21 23 24 25 26 27 pcs3 aen wlb rd irq_enet shfbusy hlda drq_enet cs_sram pcs2 lcs mcs0 bhe whb wr reset ale iochrdy ma[19:0] d[15:0] hlda cs_sram aen pu_pal pcs3 pcs2 whb wlb bhe 1 of 9 mark bowers sean michaud NET186 top level copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date rick purvis r28 5% 10k 2 1 vdd mcs0 memw iochrdy ale shfbusy reset drq_enet irq_enet wr dack_enet master sbhe rd aen rclkouta lcs master sbhe dack_enet memw memw sbhe 04/14/97 rclkouta memw sbhe ma[19:0] d[15:0] cpu/memory subsection iochrdy rd wr wlb whb bhe ale shfbusy aen mcs0 lcs pcs2 pcs3 irq_enet cs_sram drq_enet hlda reset $1i173 c bale c59 0.1uf 1 2 avss avss vdd enet_pu iocs16 iochrdy master sbhe rd ref reset irq_enet ma[19:0] ma1 ma2 ma3 ma4 ma5 ma6 ma7 ma8 ma9 ma10 ma11 ma12 ma13 ma14 ma15 ma16 ma17 ma18 ma19 ma0 d[15:0] d7 d8 d9 d10 d11 d12 d13 d14 d15 d2 d3 d4 d5 d1 d6 d0 eecs eesk eedi eedo led0 led1 led3 memw wr rd drq_enet dack_enet sean michaud copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date led2 rxd- txd+ txd- txpd+ txpd- vdd pcnetisa ii aen vdd rxd+ x1_enet x2_enet 2 of 9 sleep shfbusy r1 5 1/8w c1 22uf 16 2 1 u7 avss2 irq9 drq3 irq15/apcs sa16 pcnetisa ii sleep sbhe ref memw memr master led3 led2 led1 led0 iow ior iocs16 dack7 dack6 dack5 dack3 bpcs xtal2 xtal1 txpd- txpd+ txd- txd+ tms tdo tdi tck shfbusy sd9 sd8 sd7 sd6 sd5 sd4 sd3 sd2 sd15 sd14 sd13 sd12 sd11 sd10 sd1 sd0 sa9 sa8 sa7 sa6 sa5 sa4 sa3 sa2 sa19 sa18 sa17 sa14 sa13 sa12 sa11 sa10 sa1 sa0 rxd- rxd+ reset prdb7 prdb6 prdb5 prdb4 prdb3 la18 irq5 irq4 irq3 irq12/flashwe irq11 irq10 iochrdy eesk/prdb0 eedo/prdb2 eedi/prdb1 eecs dxcvr/ear drq7 drq6 drq5 do- do+ di- di+ ci- ci+ bale avss1 avdd4 avdd3 avdd2 avdd1 aen la17 la19 la20 la21 la23 la22 sa15 75 19 63 50 51 3 120 121 123 124 68 67 58 8 9 10 66 136 106 104 99 101 100 102 140 139 138 141 135 79 77 93 91 88 86 83 81 94 92 89 87 84 82 78 76 31 30 29 28 27 26 25 23 47 46 45 44 41 40 39 34 33 22 21 96 97 70 126 127 128 129 131 12 69 62 61 60 53 54 55 57 49 134 132 133 137 119 4 5 6 65 111 112 114 115 116 117 59 110 105 98 103 118 113 48 11 13 14 16 18 17 42 04/14/97 c cr4 cath red green 3 1 2 cr3 cath red green 2 1 3 cr2 cath red green 3 1 2 c61 0.1uf 1 2 c60 0.1uf 2 1 t1 lpf lpf lpf lpf filter 1 2 3 4 7 8 9 20 19 5 12 11 10 10 5 1 2 3 4 7 8 9 20 19 5 12 11 10 ri+ to- to+ ri- txpd- txd- txpd+ txd+ rxd+ rxd- j5 1 2 3 4 5 6 7 8 8 7 6 5 4 3 2 1 u1 org sk cs do di 6 2 1 4 3 u3 di do cs sk org 2 6 4 3 1 r42 1/8w 330 r43 1/8w 330 r41 1/8w 330 r40 1/8w 330 c36 33pf 2 1 c35 33pf 2 1 y2 20mhz 1 2 3 of 9 x2_enet x1_enet ethernet support vdd copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date sean michaud eedi eedo eecs eesk eesk eecs eedo eedi vdd led3 led2 led1 led0 pe68068t c62 0.1uf 2 1 vdd cr1 cath red green 2 1 3 04/14/97 c r68 5% 10k 2 1 vdd r64 5% 10k 2 1 r65 5% 10k 2 1 r66 5% 10k 2 1 r67 5% 10k 2 1 d13 r45 5% 10k 1 2 r46 5% 10k 1 2 r51 5% 10k 1 2 r63 5% 10k 1 2 ale vdd enet_pu vdd r14 5% 10k 2 1 r7 5% 10k 2 1 sleep 4 of 9 sbhe sean michaud copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date ethernet pullup resistors iochrdy shfbusy iocs16 ref memw master r9 5% 10k 2 1 r8 5% 10k 2 1 r6 5% 10k 2 1 r12 5% 10k 2 1 vdd r10 5% 10k 2 1 r11 5% 10k 2 1 r15 5% 10k 2 1 irq_enet r44 1/8w 2.2k r27 5% 10k 2 1 d15 d12 d11 d9 d14 d10 d8 r16 5% 10k 1 2 rd drq_enet 04/14/97 c c38 22pf 2 1 ma[19:0] ma18 ma19 ma17 ma16 ma15 ma12 ma13 ma11 ma9 ma10 ma8 ma14 ma7 ma2 ma3 ma4 ma5 ma1 ma6 ma0 d[15:0] d6 d4 d0 d1 d7 d2 d3 d11 d8 d9 d10 d13 d12 d14 d15 d5 rclkoutb rclkouta reset int3 int2 int1 irq_enet nmi pcs6 pcs5 pcs0 lcs mcs1 mcs0 mcs2 cs_flash drq1 drq0 cts0 rts0 txd0 rxd0 rxd1 txd1 int4 ale clkoutb bhe whb tmrin1 tmrin0 tmrout0 wlb den dt/r wr rd hlda drq_enet s0 s1 s2 x2 x1 186es cpu subsystem copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date sean michaud 5 of 9 clk_40mhz u10 a8 54 signal=vdd;15,38,44,61,84,90 signal=gnd;12,35,41,64,87,93 rxd0/pio23 24 rxd1 22 txd0/pio22 25 dt/r/pio4 71 x2 37 x1 36 wr 28 wlb 66 whb 65 20 uzi/pio26 ucs/once1 80 21 txd1 tmrout1/pio1 96 tmrout0/pio10 97 tmrin1/pio0 95 tmrin0/pio11 98 srdy/pio6 69 19 s6/lock/clkdiv2/pio29 32 s2 33 s1 34 s0 26 rts0/rtr0/pio20 23 cts0/enrx0/pio21 94 res rd 29 82 pcs6/a2/pio2 83 pcs5/a1/pio3 pcs3/rts1/rtr1/pio19 85 pcs2/cts1/enrx1/pio18 86 pcs1/pio17 88 89 pcs0/pio16 nmi 70 mcs3/rfsh/pio25 92 mcs2/pio24 91 74 mcs1/pio15 73 mcs0/pio14 81 lcs/once0 75 int4/pio30 int3/inta1/irq 76 77 int2/inta0/pwd/pio31 int1/select 78 79 int0 hold 68 hlda 67 drq1/int6/pio13 99 drq0/int5/pio12 100 den/ds/pio5 72 40 clkoutb 39 clkouta 27 bhe/aden 31 ardy ale 30 18 ad15 16 ad14 ad13 13 10 ad12 ad11 8 6 ad10 ad9 4 2 ad8 ad7 17 14 ad6 ad5 11 ad4 9 ad3 7 5 ad2 ad1 3 ad0 1 a19/pio9 42 a18/pio8 43 a17/pio7 45 a16 46 a15 47 a14 48 a13 49 a12 50 a11 51 a10 52 a9 53 a7 55 a6 56 a5 57 a4 58 a3 59 a2 60 a1 62 a0 63 am186es sqfp100 ic 63 62 52 51 50 49 48 47 46 45 43 42 60 59 58 57 56 55 54 53 1 3 6 8 10 13 16 18 5 7 9 11 14 17 2 4 30 31 39 40 23 100 99 71 67 68 79 78 77 76 75 70 83 82 26 24 22 19 69 98 95 97 96 25 21 20 36 37 27 72 81 73 74 91 92 89 88 86 85 29 94 34 33 32 80 65 66 28 mcs3 pcs1 pcs2 pcs3 tmrout1 r49 33 c33 22pf 16v 2 1 r50 33 y1 40mhz 2 1 c39 15pf 2 1 c34 22pf 16v 2 1 x2 x1 clk_40mhz clkoutb iochrdy srdy s6 uzi 04/14/97 c j3 9 8 7 6 5 4 3 2 1 6 1 3 2 9 4 8 5 7 sean michaud 186es memory section populate do not populate do not populate do not r53 390 r34 1/8w 2 1 r2 1/8w 0 ohms 12 c28 22pf 16v 1 2 r31 5% 10k 2 1 r4 1/8w 0 ohms 12 c17 0.1uf 1 2 c26 22pf 16v 1 2 c27 22pf 16v 1 2 r37 1/8w 2 1 c16 0.1uf 1 2 c29 22pf 16v 1 2 c31 22pf 16v 1 2 r52 390 c20 0.1uf 1 2 r5 1/8w 0 ohms 12 r3 1/8w 0 ohms 12 c30 22pf 16v 1 2 c32 22pf 16v 1 2 reset vdd pcs3 pcs2 rxd1 txd1 txd1t rxd0 rts0 r36 1/8w 12 r35 1/8w 12 copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date txd0 cts0 rts0t reset j2 9 8 7 6 5 4 3 2 1 7 5 8 4 9 2 3 1 6 c25 22pf 16v 1 2 c22 0.1uf 1 2 c18 0.1uf 1 2 c23 0.1uf 1 2 c21 0.1uf 1 2 r48 33 vdd r47 33 c19 0.1uf 1 2 txd0t rxd0t cts0t do not populate pcs2t rxd1t pcs3t 7 of 9 max232 u5 v- v+ t1out t2out r2in r1in r2out r1out t2in t1in c2- c2+ c1- c1+ 1 3 4 5 11 10 12 9 13 8 7 14 6 2 max232 u6 v- v+ t1out t2out r2in r1in r2out r1out t2in t1in c2- c2+ c1- c1+ 2 6 14 7 8 13 9 12 10 11 5 4 3 1 cr13 cath red green 1 2 3 cr15 cath red green 3 2 1 04/14/97 c vdd r39 5% 10k 2 1 cs_flash cr12 cath red green 1 2 3 cr11 cath red green 3 2 1 cr10 cath red green 1 2 3 cr9 cath red green 3 2 1 cr8 cath red green 1 2 3 cr7 cath red green 3 2 1 cr6 cath red green 1 2 3 cr5 cath red green 3 2 1 note: a18 is included to allow 29f800 memw ma3 ma2 ma15 ma11 ma6 ma4 ma1 d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 ma19 ma18 ma17 ma16 ma14 ma13 ma12 ma10 ma9 ma8 ma7 ma5 byte reset wr rd copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date cs_sram rd d7 d6 d5 d4 d3 d2 d1 d0 ma1 ma2 ma3 ma4 ma5 ma6 ma7 ma8 ma9 ma10 ma11 ma12 ma13 ma14 ma15 ma16 ma17 ma18 sean michaud 6 of 9 d8 d9 d10 d11 d12 d13 d14 d15 ma0 sbhe r54 1/8w 330 r57 1/8w 330 r58 1/8w 330 r59 1/8w 330 r60 1/8w 330 r61 1/8w 330 r55 1/8w 330 r56 1/8w 330 tmrout0 srdy den dt/r pcs6 pcs5 tmrout1 tmrin1 186es memory section vdd 29f400 u11 a0 a1 a10 a11 a12 a13 a14 a15 a16 a17 a18 a2 a3 a4 a5 a6 a7 a8 a9 dq0 dq1 dq10 dq11 dq12 dq13 dq14 dq15/a-1 dq2 dq3 dq4 dq5 dq6 dq7 dq8 dq9 ry/by byte ce oe reset we 36 34 41 43 45 32 30 39 38 29 31 44 42 40 33 35 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 26 28 11 12 15 47 sram u9 a0 a1 a10 a11 a12 a13 a14 a15 a16 a17 a2 a3 a4 a5 a6 a7 a8 a9 io1 io10 io11 io12 io13 io14 io15 io16 io2 io3 io4 io5 io6 io7 io8 io9 op1 op2 ce lb oe r/w ub 5 4 31 30 29 27 26 25 24 23 3 2 54 53 52 51 33 32 49 48 45 44 39 38 35 34 13 42 12 6 7 10 11 16 17 20 21 15 41 14 43 ce_flash flashcs r38 0 ce_flash sw2 3 2 1 04/14/97 c d15 flashcs vdd j1 1 3 2 3 2 1 cts0 rts0 bhe wr byte r29 5% 10k 2 1 drq1 drq0 int1 int2 int3 int4 nmi r21 5% 10k 2 1 r23 5% 10k 2 1 r22 5% 10k 2 1 r26 5% 10k 2 1 r25 5% 10k 2 1 r24 5% 10k 2 1 r20 5% 10k 2 1 ma1 ma2 ma3 ma4 ma5 ma6 ma7 ma8 ma9 ma10 ma11 ma12 ma13 ma14 ma15 ma16 ma17 ma18 ma19 srdy iochrdy d0 d1 d2 d3 d4 d5 d6 d7 tmrout1 tmrin1 wlb txd0 mcs0 mcs1 tmrin0 int4 hlda int3 nmi rxd0 uzi tmrout0 reset mcs3 mcs2 wr rd cs_flash lcs ale whb ma0 vdd p1 b19 b16 b18 b21 b25 b22 b23 b24 b2 b6 b8 b1 b3 b5 b7 b9 b10 b20 b15 b17 b26 b27 b28 b29 b11 b12 b13 b14 b4 a2 a9 a3 a4 a5 a6 a7 a12 a13 a14 a15 a16 a17 a18 a19 a20 a21 a22 a23 a24 a25 a26 a27 a28 a8 a10 a11 a1 a29 b31 b30 b32 a30 a31 a32 37 31 35 41 49 43 45 47 3 11 15 1 5 9 13 17 19 39 29 33 51 53 55 57 59 61 21 23 25 27 7 4 18 6 8 10 12 14 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 16 20 22 2 63 64 expansion headers den vdd copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date sean michaud drq_enet s6 int1 irq_enet drq1 rclkoutb s2 s1 s0 drq0 dt/r bhe pcs6 pcs5 pcs3 pcs2 pcs1 pcs0 d8 d9 d10 d11 d12 d13 d14 8 of 9 p2 c0 c1 c10 c11 c12 c13 c14 c15 c16 c17 c18 c19 c2 c3 c4 c5 c6 c7 c8 c9 d0 d1 d10 d11 d12 d13 d14 d15 d16 d17 d18 d19 d2 d3 d4 d5 d6 d7 d8 d9 2 1 40 39 22 38 30 26 24 16 14 12 10 8 18 37 35 33 29 25 21 17 31 27 23 19 13 11 9 15 7 5 34 6 20 28 32 34 36 r30 5% 10k 1 2 r18 5% 10k 2 1 r19 5% 10k 2 1 r17 5% 10k 2 1 wlb whb srdy vdd r13 5% 10k 1 2 int2 rclkouta 04/14/97 c sw1 3 1 c53 0.01uf 1 2 c54 0.01uf 1 2 c55 0.01uf 1 2 c56 0.01uf 1 2 c57 0.01uf 2 1 c58 0.01uf 2 1 vdd c40 22uf 16 1 2 vdd c41 0.01uf 1 2 c42 0.01uf 1 2 c43 0.01uf 1 2 c44 0.01uf 1 2 c45 0.01uf 1 2 c46 0.01uf 1 2 c47 0.01uf 1 2 c48 0.01uf 1 2 c49 0.01uf 1 2 c50 0.01uf 1 2 c51 0.01uf 1 2 c52 0.01uf 1 2 c37 22uf 16 1 2 c24 0.1uf 2 1 c11 0.01uf 2 1 u4 ref rst rst vcc sense resin ct gnd 3 4 26 78 1 5 9 of 9 bypass capacitors sean michaud copyright 1995 amd approved by: module advanced micro devices engineer rev date sheet c dwg. no. drawn by size schematic diagram date vdd vdd c14 0.01uf 2 1 c7 0.01uf 2 1 c9 0.01uf 2 1 c10 0.01uf 2 1 c5 0.01uf 2 1 c6 0.01uf 2 1 c12 0.01uf 2 1 c2 22uf 16 2 1 c3 0.01uf 2 1 c4 0.01uf 2 1 c13 0.01uf 2 1 c8 0.01uf 2 1 r62 1/8w 100k 2 1 r32 5% 10k 1 2 r33 5% 10k 1 2 vdd reset reset c15 1.0uf 16v 2 1 vdd 04/14/97 NET186 tm demonstration board users manual a-12 1.0 board bill of materials (bom) table a-1. NET186 demonstration board bom qty ref description mfg1 part no 1 4 c1, c2, c37, c40 22 mfd, smt, c case, 20 v any 30 c3Cc14, c41Cc58 0.01 mfd, smt, 16 v any 1 c15 1.0 mfd, smt, 16 v any 13 c16Cc24, c59C c62 0.1 mfd, smt, 20 v any 10 c25Cc34 22 pfd, smt, 16 v any 2 c35, c361 33 pfd, smt, 16 v any 2 c38, c39 15 pfd, smt, 16 v any 14 cr1Ccr14 led, 3-pin, smt lumex ssl-lx15igc-rp-tr 1 j1 power jack, 5.5 mm, ra switchcraft rapc-712 2 j2, j3 db9 right-angle connector, front metal-shell amp 787844-1 1 j5 rj-45 connector 1 p1 am186 conn, 64-pin header any 1 p2 am186 conn, 40-pin header any 1 r1 5 w , 5% any 4 r2Cr5 0 w , 5% any 28 r6Cr33, r45, r46, r51, r63Cr67 10 k w , 5% any 5 r34Cr38 0 w , 5% any 4 r40Cr43 330 w , 5% any 1 r44 2.2 k w , 5% any 4 r47Cr50 33 w , 5% any 2 r52, r53 390 w , 5% any 8 r54Cr61 330 w , 5% any 1 r62 100 k w , 5% any 1 sw1 reset switch, (smt-j lead) c&k kt11p3jm 1 t1 10base-t filter and transformer pulse engineering pe68068t NET186about.book : 186appa.fm page 12 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual a-13 1.0 1 u1 128 x 16 eeprom national nm93c56n 1 u2 22v10 pal amd palce22v10h-7jc/5 1 u3 128 x 16 eeprom national nm93c56n 1 u4 reset controller, smt ti tl7705acd 2 u5, u6 rs-232 driver, narrow smt maxim max232acse 1 u7 pcnet-isa ii ethernet controller amd am79c961avc\w 1 u9 256k x 16 sram (smt) toshiba tc514161 1 u10 am186es microcontroller amd am186es-40vc\w 1 u11 512k x 16 flash memory (smt) amd am29f400at-70ec 1 y1 40.0-mhz quartz crystal, 16 pf epson ma-306 1 y2 20.0-mhz quartz crystal, 16 pf epson ma-306 qty ref description mfg1 part no 1 NET186about.book : 186appa.fm page 13 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual b-1 appendix b pcnet family history the following is a brief discussion/history of the lance (local area network controller for ethernet) and the subsequent family of integrated single-chip ethernet controllers that followed based on the lance/clance (cmos local area network controller for ethernet) architecture called the pcnet family. the pcnet family of single-chip ethernet controllers is based on the original am7990 lance bus mastering architecture. the original lance controller was introduced in 1985. its architecture is the basis for amds pcnet family of highly integrated single-chip ethernet controllers. the one ethernet controller that is the exception is the am79c940 mace (media access controller for ethernet). the original lance, the pcnet family, and mace are described below. for more information about members of amds family of ethernet controllers, refer to the amd networking products guide cd, order #21244, included in your kit. lance / clance the lance (am7990) was a standalone media access controller (mac). it had no phy layer logic. this means it had no integrated manchester encoder/decoder (endec) nor did it have an integrated 10base-t transceiver (tmau). in 1992, amd refabricated the nmos lance to produce a cmos lance called the c-lance (am79c90). though the internal architecture of the clance is a little different than the internal architecture of the lance, to the user/programmer, the architecture of the clance is exactly the same as the lance. this means that whatever software suites were developed for the lance can also be used with the am79c90 clance without changing any of the original am7990 lance software code. thus, whenever the name clance is used, it is really the original lance ethernet media access controller fabricated using cmos technology. the clance is pin compatible to the lance and like the lance, clance is also a bus-mastering ethernet controller. amd still offers the clance (am79c90) ethernet controller. the original lance architecture is as popular today as it was when it was first introduced over a decade ago. NET186about.book : 186appb.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual b-2 1.0 pcnet family of ethernet controllers during the last half of the 1980s, amd embarked on a program to produce highly integrated single-chip ethernet controllers based exclusively on the original lance/clance architecture; that is, an ethernet controller chip with integrated mac/endec/tmau (media access control/encoder-decoder/10base-t media access unit). in addition, it was decided to integrate the bus interface logic on board the chip. the idea of maintaining architecture compatibility with the original lance/clance ethernet controllers was done to ensure software compatibility. amd realized that there was a very large base of lance/clance users who did not want to rewrite their lance-based software code. the inclusion of a bus interface logic on board the chip was done to provide easy, painless direct connections, without additional hardware glue logic, to most popular standard buses. these buses included isa, eisa, vl and pci buses. amd now has a series of single-chip ethernet controllers, collectively called the pcnet family of ethernet controllers. there is a series of four basic sets of pcnet family ethernet controllers. you can tell which bus environment a particular pcnet ethernet controller was designed for by its name, as described in the following sections. pcnet-isa series (16-bit) for isa/eisa-based environments pcnet-isa (am79c960) was amds first pcnet ethernet controller introduced in 1992. this particular product won the 1992 award from pc magazine and was described as the years most technically innovative connectivity product brings networking to the masses. pcnet-isa+ (am79c961) was the next pcnet-isa member introduced in 1993, and was not pin compatible to the pcnet-isa. compared to the pcnet-isa, the pcnet-isa+ was jumperless and was compliant to microsofts plug and play specifications for isa. NET186about.book : 186appb.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual b-3 1.0 pcnet-isa ii (am79c961a) is the last member of the pcnet-isa series introduced in 1994. this device is pin compatible to the pcnet-isa+. like the pcnet-isa+, this device is jumperless and is compliant to microsofts plug and play specifications for isa. additionally, pcnet-isa ii is full-duplex capable. this means it can transmit and receive data at the same time over its 10base-t twisted pair port. full-duplex gives pcnet-isa ii the capability of bidirectional data transfer rate of up to 20 mbit/s combined. pcnet-isa ii also has a feature unique to amds ethernet controllers, magic packet tm technology. created in collaboration with hewlett-packard, magic packet technology allows you to remotely wake up a sleeping pc or any piece of equipment on a network. today, only the pcnet-isa ii (am79c961a) is available and is featured on the NET186 standalone demonstration board . the pcnet-isa (am79c960) and the pcnet-isa+ (am79c961) are no longer offered. pcnet-32 (32-bit) for vl or general 32-bit local-bus based environments pcnet-32 (am79c965) was introduced in 1993. while it appears to be made specifically for the vl bus, pcnet-32 is really a general 32-bit ethernet controller. however, this device does not support full-duplex or magic packet technology. it is well suited for general 32-bit embedded networking applications, and in particular, high-end routers. the pcnet-32 also interfaces very well to an 80486. pcnet-pci ii (32-bit) for pci-based environments pcnet-pci ii (am79c970a) was introduced in 1995 and is a 32-bit ethernet controller designed for use in pci bus based environments. the pcnet-pci ii has a general purpose serial interface (gpsi) enabling you to bypass the endec & tmau and connect directly to the mac, external address detection interface (eadi), bigger fifos, and full-duplex capability. pcnet-pci was introduced in 1993. while amd no longer offers the pcnet-pci (am79c970), software drivers written for the pcnet-pci can also be used on the pcnet-pci ii. like the pcnet- isa ii, pcnet-pci ii also has magic packet technology to remotely wake up a sleeping pc or any piece of equipment on a network. NET186about.book : 186appb.fm page 3 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual b-4 1.0 pcnet-fast (32-bit) for pci-based environments pcnet-fast (am79c971) was introduced in june 1996 and is amds latest pcnet family member introduced to address the growing need for 100 mbit/s fast ethernet capability. pcnet-fast is capable of operating as a 10-mbit/s ethernet controller as well. like pcnet-isa ii and pcnet-pci ii, pcnet-fast is full-duplex capable and also has magic packet technology. software compatibility the pcnet family of ethernet controllers (pcnet-isa ii, pcnet-32, pcnet-pci ii and pcnet-fast) is lance/clance software compatible. this means you can use the original 16-bit lance/clance software on the above members of the pcnet family of single-chip ethernet controllers. it is this software compatibility that is the pcnet familys biggest value proposition. you have an upgrade path from the popular standalone lance/clance mac to a highly integrated, single-chip solution whose architecture is compatible to the lance/clance. NET186about.book : 186appb.fm page 4 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual b-5 1.0 mace (16-bit) for general 16-bit environments amd offers another single-chip ethernet controller device that is not a member of the pcnet family. this ethernet controller is called the media access controller for ethernet (mace am79c940). the name implies a standalone mac, which it is not. think of the pcnet-isa ii ethernet controller without the isa bus interface logic, lance dma controller, and buffer memory management unit: a 16-bit, general purpose, busless, single-chip ethernet controller. unlike the members of the pcnet family, which are bus-mastering devices, the mace is a bus-slave ethernet controller device. because the mace does not have the same architecture as the lance/clance, software originally developed for the lance/clance will not run on the mace. NET186about.book : 186appb.fm page 5 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual c-1 appendix c references this appendix contains a short list of reference material for those who would like to learn more about ethernet or networking in general. books and literature tcp/ip illustrated by w. richard stevens, addison-wesley publishing ( http:// www.aw.com ), isbn 0-201-63346-9. internetworking by mark a. miller, m&t books (1-800-533-4372), isbn 1-55851-143-1. a good general overview, including wide area communications . embedded networking applications design guide kit , amd (1-800-222-9323), order #20397. periodicals looking in the classifieds of embedded systems programming magazine (miller freeman, 1-800-829-5537, http://embedded.com ), you will find numerous advertisements for protocol stacks, rtoss, emulators, etc. this magazine also has a number of general embedded articles that are worthwhile reading. another noteworthy publication is electronic engineering times (cmp publications, inc., http://techweb.cmp.com/ ). this is a weekly publication providing an abundance of information on the current state of the electronics industry, including occasional in-depth articles on networking and embedded applications as well as advertisements for all types of electronics services and products. NET186about.book : 186appc.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual c-2 1.0 world wide web the www is an excellent resource for finding out more about networking, especially embedded networking applications. just searching on tcp tutorial will bring up plenty to keep you busy. a few web sites produced by such searches are: ? http://www-cne.gmu.edu/modules/network/index.html this is a very informative subway map of a wide range of networking tutorials and resources, including a link to the original tcp/ip tutorial rfc (request for comment). ? http://www.softaid.net/emulate/articles/article.html another informative source, this provides an extensive collection of articles written by jack ganssle of softaid (one of our fusion e86 partners). there are dozens of articles of relevance to the embedded developer. most networking companies also have web sites which offer a wide variety of useful information. also, several newsgroups frequently discuss ethernet issues, including embedded networking application issues. try reading the comp.arch.embedded or comp.protocols.tcp-ip newsgroups. NET186about.book : 186appc.fm page 2 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual d-1 appendix d pal source file listing this appendix contains the contents of the pal source file included in your kit. NET186about.book : 186appd.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual d-2 1.0 pal source file contents ;palasm design description ;------------------- declaration segment ------------ title 186es pcnet-isa glue logic pattern author mark bowers, fae atlanta company advanced micro devices, inc. date 3/19/96 revision histry ; 3/19/96 mb - created ; 3/28/96 mb - add 85c30 support, use 186es ; 4/8/96 mb - included digital one-shot for sbhe_ ; 5/7/96 mb - fixed mistake w/ i/o slave reads (added pcs3, ; removed rd_) ; 5/7/96 mb - added support for pcnet byte writes (added adx0) ; 5/7/96 mb - fixed mistake on sbhe tristate ; 7/25/96 mb - took out 85c30, converted from 16v8 to 22v10 ; 11/7/96 mb - went back to i/o mapped ; 11/18/96 mb - changed to support 16 bit sram, swapped pins to match ; schematic ; 11/27/96 mb - swapped pins (again) to match schematic ; 1/24/97 mb - swapped pins (yet again) to match schematic chip es_pcnet palce22v10 ;note dip pinout for ssop ;---------------------------------- pin declarations --------------- ; dip plcc pin 1 clka ;2 - clk from 186es pin 2 master_ ;3 - from pcnet, indicates pcnet has bus pin 3 lcs_ ;4 - lower chip select from 186es, addresses memory pin 4 hlda ;5 - from 186es, inverted to dack* on pcnet pin 5 bhe_ ;6 - byte high enable from 186es pin 6 wlb_ ;7 - write low byte from 186es pin 7 whb_ ;9 - write high byte from 186es pin 8 mcs0_ ;10 - /mcs0, not used in this design, could be used ; to memory map pcnet-isa pin 9 pcs2_ ;11 - peripheral cs from 186es pin 10 pcs3_ ;12 - peripheral cs from 186es pin 16 dbhe_ ;19 - delayed bhe_, external n/c pin 17 aen_ ;20 - address enable to pcnet pin 20 sbhe_ ;24 - system byte high enable on pcnet and sram pin 21 hlda_ ;25 - connected to dack* on pcnet pin 22 memw_ ;26 - memory write drives sram when es has bus pin 23 rcs_ ;27 - ram chip select NET186about.book : 186appd.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual d-3 1.0 ;----------------------------------- boolean equation segment ------ equations hlda_ = /hlda /rcs_ = /lcs_ + /master_ ;lcs_ doesn't tristate on a bus hold ;pcs2 and pcs3 assert when the 186es address is x2xxh and x3xx respectively. ;this is the i/o space that we want to talk to the pcnet-isa in. /aen_ = /pcs2_ + /pcs3_ ;the signal memw_ drives the r/w line on the sram. when the 186es has the ;bus, this is simply a logical and of whb_ and wlb_. the 186es signal /wr ;can not be used because the pulse width is too short at 40mhz. /memw_ = /whb_ + /wlb_ memw_.trst = master_ ;to support 8 bit i/o cycles to the pcnet-isa, sbhe must be asserted before ;ior or iow. to conform to the isa spec, sbhe is extended so the trailing ;edge occurs after ior or iow goes high. the signal sbhe is tristated when ;pcnet has the bus. dbhe_ := bhe_ /sbhe_ = /bhe_ + /dbhe_ sbhe_.trst = master_ NET186about.book : 186appd.fm page 3 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual e-1 appendix e eeprom contents this appendix contains the text file named NET186.dat that shows the contents of the eeprom used on the NET186 demonstration board. the utility eesetup can be used to program the eeprom based on the data in this file. note that the data in this file is byte reversed from what ends up in the pcnet registers. there are several differences from a typical pc application: 1. the i/o resources are hardcoded to: dma = 3 irq = 3 i/o adx = 200h the dma and irq must be assigned as shown because that is how the pcnet-isa ii is connected to the am186es microcontroller. the i/o adx could be changed (200h - 3ffh in increments of 20h), but the contents of the eeprom have to match where the pcnet is mapped in the 186 software. 2. isacsr0 and isacsr1 are both set to 0002h. this sets the master mode read/write active time to 100 ns, which maximizes dma performance. 3. isacsr2 is set to 0212h, which minimizes the read/write inactive time for dma transfers, and maximizes performance. when the am186es microcontroller and pcnet-isa ii are "alive", software drivers can be loaded and network traffic can be processed. please refer to software on page x. NET186about.book : 186appe.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-2 1.0 NET186.dat file listing // file: NET186.dat // revision: 1.0 // pcnet family controller: am79c961a pcnet-isa ii // // ansi identifier string: amd pcnet-isa ii ethernet network adapter // // card state at power-on/reset: active/visible in i/o space // plug and play bios or configuration manager: not required to wake card // plug and play boot device: no // plug and play boot rom: not specified / ********.*********.*********+******************.*********.********/ /* eeprom byte map */ /* pcnet-isa+ data sheet - pid# 18183 rev.b - apr 1994 */ /* pcnet-isa ii data sheet - pid# 19364a rev.a - oct 1994 */ / ********.*********.**********+******************.*********.******** / // 64 bytes of pcnet-isa+ configuration information follows: // the #ieee_addr keyword here stimulates a call to address manager which // dispenses the next available ieee address from addr_mgr.dat data base. // or // the #force_addr keyword here gives you the ability to force a specific // ieee address by providing your own six bytes of information. // or // the #reuse_ieee_addr keyword here causes eesetup to (blindly) reuse the // ieee address currently programmed in the eeprom. // // choose and enable exactly one of the following three examples... //#ieee_addr //#force_ieee_addr 0x00 0x11 0x22 0x33 0x44 0x55 #reuse_ieee_addr #reserved 0x00 0x00 0x00 // used by amd device drivers. #hwid 0x01 // user defined bytes. #user1 0x00 0x00 NET186about.book : 186appe.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-3 1.0 NET186.dat file listing (continued) // 16-bit checksum #1 - automatically computed by eesetup. #chksum1 0xc1 0xc2 // used by amd device drivers. #driver_ww 0x57 0x57 #eisa_cfg 0x00 0x01 0x02 0x03 // master mode read active time set for 100ns for maximum performance #isacsr0 0x02 0x00 // master mode write active time set for 100ns for maximum performance #isacsr1 0x02 0x00 // #isacsr2: bit 1 of the second byte is the p&p_act bit: // bit 1 = 0 = inactive/invisible, board needs plug and play to wake it. // bit 1 = 1 = active/visible, board powers up visible on the isa bus. // // bit 4 determines the isa bus inactive time. setting this bit // to a 1 will minimize this time for the NET186 // // choose and enable exactly one of the following two examples... // if you want the adapter active/visible (legacy): #isacsr2 0x12 0x02 // if you want the adapter inactive/invisible (plug and play): //#isacsr2 0x12 0x00 #isacsr5 0x84 0x00 #isacsr6 0x08 0x40 #isacsr7 0x90 0x00 // pcnet-isa ii (full duplex): enable full duplex register // if you're using a pcnet-isa ii controller, // these two bytes are automatically included in the eeprom image. // you must select the #pnp_unused field with 8 bytes to compensate. // if you're using a pcnet-isa+ controller, // these two bytes are not included in the eeprom image. // you must select the #pnp_unused field with 10 bytes to compensate. #isacsr9 0x00 0x00 // plug and play registers 60/61. base i/o address: 200 // the address you specify here should also be specified on the // #io (programmable i/o port descriptor) command line. NET186about.book : 186appe.fm page 3 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-4 1.0 NET186.dat file listing (continued) #pnp_i/o 0x02 0x00 // plug and play registers 70/71. interrupt request: 3 // the interrupt you specify here should also be specified on the // #irq (interrupt request descriptor) command line. #pnp_irq 0x03 0x00 // plug and play register 74. dma channel: 3 // the dma channel you specify here should also be specified on the // #dma (dma channel descriptor) command line. #pnp_dma 0x03 #reserved 0x00 // plug and play registers 40/41/42/43/44. rom address descriptor. // the five byte descriptor syntax is as follows: // #pnp_rom 0x0m 0xn0 0xww 0xs1 0xs2 // m represents address lines 19-16 and n represents address lines lines // 15-12 of the rom starting address. to get 8-bit rom accesses you // substitute 00 for ww and to get 16-bit accesses you substitute 02 for // ww. for the rom size you substitute ff for s1 and substitute one of // the following for s1: // if 8k use e0, if 16k use c0, if 32k use 80, if 64k use 00 // // for boot rom set all five bytes to 0x00. // // example: to specify a boot rom at address 0xc8000 with 16-bit // accesses and a size of 32k...you substitute c for m and 8 for n. // to get 16-bit accesses you substitute 02 for ww. you substitute ff // for s1 and 80 for s2 to specify a 32k size. // #pnp_rom 0x0c 0x80 0x02 0xff 0x80 // // specific address alignment limitations for each size of boot rom // are explained in the pcnet-isa+ and pcnet-isa ii data sheets. // // choose and enable exactly one of the following examples... // no rom. #pnp_rom 0x00 0x00 0x00 0x00 0x00 // rom @ 0c8000, 8-bit data, 8k in size. //#pnp_rom 0x0c 0x80 0x00 0xff 0xe0 // rom @ 0c8000, 8-bit data, 16k in size. //#pnp_rom 0x0c 0x80 0x00 0xff 0xc0 // rom @ 0c8000, 8-bit data, 32k in size. //#pnp_rom 0x0c 0x80 0x00 0xff 0x80 // rom @ 0d0000, 8-bit data, 64k in size. NET186about.book : 186appe.fm page 4 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-5 1.0 NET186.dat file listing (continued) //#pnp_rom 0x0d 0x00 0x00 0xff 0x00 #reserved 0x00 // plug and play registers 48/49/4a/4b/4c. shared sram address descriptor. // the shared sram descriptor is disabled for amd bus master boards. #pnp_ram 0x00 0x00 0x00 0x00 0x00 #reserved 0x00 // plug and play register f0. vendor defined configuration register. // must be 0x00 for amd pcnet-isa+ and pcnet-isa ii boards! #pnp_vendid 0x41 // 8-bit checksum #2 - automatically computed by eesetup. #chksum2 0xc2 #ext_shft_chn 0x00 0x00 // if you're using a pcnet-isa ii controller, // the #isacsr9 bytes are automatically included in the eeprom image. // you must select the #pnp_unused field with 8 bytes to compensate. // if you're using a pcnet-isa+ controller, // the #isacsr9 bytes are not included in the eeprom image. // you must select the #pnp_unused field with 10 bytes to compensate. // // choose and enable exactly one of the following two examples... // if you're using the pcnet-isa+: //#pnp_unused 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 // if you're using the pcnet-isa ii: #pnp_unused 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 / ********.*********.*******************+******************.********/ /* plug and play isa configuration record */ /* plug and play isa specification */ /* version 1.0a */ /* may 5, 1994 */ /********.*********.*******************+**************************/ /* the following plug and play fixed and variable length data structures, */ /* which are loaded into the eeprom beginning at offset 64, are absolutely, */ /* positively, required by eesetup to be present and in the order shown. */ NET186about.book : 186appe.fm page 5 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-6 1.0 NET186.dat file listing (continued) /* */ /* it's possible to have data structures present that don't actually */ /* consume system resources. for example, a #mem_rom_desc structure could */ /* have a range length field of zero which disables the memory requirement. */ /********.*********.**************************.*********.********/ // serial identifier (8 bytes with 1 byte computed checksum) // 32-bit eisa vendor id (amd, pcnet-isa+), 32-bit vendor serial/ unique number #ser_id 0x04 0x96 0x55 0xaa 0x00 0x00 0x00 0x00 0xc3 // plug and play version number (small resource, 3 bytes) #pnp_ver 0x0a 0x10 0x00 // ansi identifier string (large resource, 3 bytes+string) // // choose and enable exactly one of the following examples... //#ansi_id 0x82 0x27 0x00 amd pcnet-isa+ ethernet network adapter #ansi_id 0x82 0x29 0x00 amd pcnet-isa ii ethernet network adapter // logical device id (small resource, 5 bytes) // 32-bit logical device id (if single device same as #ser_id), flag byte // bit 0/last byte indicates if device required for boot: 0=no, 1=yes. #log_dev_id 0x15 0x04 0x96 0x55 0xaa 0x02 // compatible device id (small resource, 5 bytes) // id of other device with which this device is compatible. #comp_dev_id 0x1c 0x41 0xd0 0x82 0x8c // memory range descriptor 0 (large resource, 12 bytes) // if memory is enabled for a boot rom, make sure the #mem_rom_desc // field reflects the same configuration as the #pnp_rom field above. // if boot rom is not enabled, you must edit the length field to specify // a zero length. // this descriptor does not directly affect hardware settings. // this descriptor is supplied as a "courtesy" to plug and play // so that it may accurately determine the board's hardware settings. // // generic example for 16k boot rom @ address 0xmn000 where m represents NET186about.book : 186appe.fm page 6 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-7 1.0 NET186.dat file listing (continued) // address lines 19-16 and n represents address lines 15-12. // 0x81 0x09 0x00 0x62 0xn0 0x0m 0xn0 0x0m 0x00 0x40 0x40 0x00 // for 8k rom at address 0xc8000, you would substitute c for m and // substitute 8 for n and get the following. // 0x81 0x09 0x00 0x62 0x80 0x0c 0x80 0x0c 0x00 0x20 0x20 0x00 // address alignment limitations for each size of boot rom are explained // in the pcnet-isa+ and pcnet-isa ii data sheets. // // choose and enable exactly one of the following examples... // 8k boot rom @ 0c8000 //#mem_rom_desc 0x81 0x09 0x00 0x62 0x80 0x0c 0x80 0x0c 0x00 0x20 0x20 0x00 // 16k boot rom @ 0c8000 //#mem_rom_desc 0x81 0x09 0x00 0x62 0x80 0x0c 0x80 0x0c 0x00 0x40 0x40 0x00 // 32k boot rom @ 0c8000 //#mem_rom_desc 0x81 0x09 0x00 0x62 0x80 0x0c 0x80 0x0c 0x00 0x80 0x80 0x00 // 64k boot rom @ 0c8000 //#mem_rom_desc 0x81 0x09 0x00 0x62 0x80 0x0c 0x80 0x0c 0x00 0x00 0x00 0x01 // no boot rom (length = 0) //#mem_rom_desc 0x81 0x09 0x00 0x62 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 // memory range descriptor 1 (large resource, 12 bytes) // the shared sram is disabled for amd bus master boards. // no shared static ram (length = 0) //#mem_ram_desc 0x81 0x09 0x00 0x33 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 // programmable i/o port descriptor (small resource, 8 bytes) // min i/o address, max i/o address, alignment, contiguous ports. // this descriptor does not directly affect hardware settings. it is // supplied as a "courtesy" to plug and play configuration software so // the board's hardware settings may be accurately determined. // the #io command should be in agreement with the #pnp_io command. // // choose and enable exactly one of the following examples... // i/o base 200h #io 0x47 0x00 0x00 0x02 0x00 0x02 0x20 0x18 // i/o base 220h //#io 0x47 0x00 0x20 0x02 0x20 0x02 0x20 0x18 // i/o base 240h //#io 0x47 0x00 0x40 0x02 0x40 0x02 0x20 0x18 NET186about.book : 186appe.fm page 7 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-8 1.0 NET186.dat file listing (continued) // i/o base 260h //#io 0x47 0x00 0x60 0x02 0x60 0x02 0x20 0x18 // i/o base 280h //#io 0x47 0x00 0x80 0x02 0x80 0x02 0x20 0x18 // i/o base 2a0h //#io 0x47 0x00 0xa0 0x02 0xa0 0x02 0x20 0x18 // i/o base 2c0h //#io 0x47 0x00 0xc0 0x02 0xc0 0x02 0x20 0x18 // i/o base 2e0h //#io 0x47 0x00 0xe0 0x02 0xe0 0x02 0x20 0x18 // i/o base 300h #io 0x47 0x00 0x00 0x03 0x00 0x03 0x20 0x18 // i/o base 320h //#io 0x47 0x00 0x20 0x03 0x20 0x03 0x20 0x18 // i/o base 340h //#io 0x47 0x00 0x40 0x03 0x40 0x03 0x20 0x18 // i/o base 360h //#io 0x47 0x00 0x60 0x03 0x60 0x03 0x20 0x18 // i/o base 380h //#io 0x47 0x00 0x80 0x03 0x80 0x03 0x20 0x18 // i/o base 3a0h //#io 0x47 0x00 0xa0 0x03 0xa0 0x03 0x20 0x18 // i/o base 3c0h //#io 0x47 0x00 0xc0 0x03 0xc0 0x03 0x20 0x18 // i/o base 3e0h //#io 0x47 0x00 0xe0 0x03 0xe0 0x03 0x20 0x18 // dma (small resource, 3 bytes) // dma supported bit mask, transfer type info (8/16-bit, master). // this descriptor does not directly affect hardware settings. it is // supplied as a "courtesy" to plug and play configuration software so // the board's hardware settings may be accurately determined. // the #dma command should be in agreement with the #pnp_dma command. // // choose and enable exactly one of the following examples... // dma3 #dma 0x2a 0x04 0x05 // dma5 //#dma 0x2a 0x20 0x05 // dma6 //#dma 0x2a 0x40 0x05 // dma7 //#dma 0x2a 0x80 0x05 // irq (small resource, 4 bytes) // irq supported bit mask, high true edge sensitive, low true level NET186about.book : 186appe.fm page 8 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual e-9 1.0 NET186.dat file listing (continued) sensitive // this descriptor does not directly affect hardware settings. it is // supplied as a "courtesy" to plug and play configuration software so // the board's hardware settings may be accurately determined. // the #irq command should be in agreement with the #pnp_irq command. // // choose and enable exactly one of the following examples... // irq3 #irq 0x23 0x08 0x00 0x09 // irq4 //#irq 0x23 0x10 0x00 0x09 // irq5 //#irq 0x23 0x20 0x00 0x09 // irq9 //#irq 0x23 0x00 0x02 0x09 // irq10 //#irq 0x23 0x00 0x04 0x09 // irq11 //#irq 0x23 0x00 0x08 0x09 // irq12 //#irq 0x23 0x08 0x10 0x09 // irq15 //#irq 0x23 0x08 0x80 0x09 // end tag (small resource, 1 byte with 1 byte computed checksum) #end_tag 0x79 0xc4 // end of NET186.dat NET186about.book : 186appe.fm page 9 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual f-1 appendix f tcp/ip primer protocol stacks are one of the most difficult areas to understand about networking. figure f-1 below shows a client and server communicating using ftp on top of a tcp/ip stack, using drivers for their particular ethernet hardware. if you understood that sentence, you dont need to read further! figure f-1. client and server protocol stacks ftp, telnet, etc. tcp ip driver hardware ftp, telnet, etc. tcp ip driver hardware ndis (1) servers stack clients stack note 1. for the purpose of this example NET186about.book : 186appf.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual f-2 1.0 overview tcp/ip and its associated applications like ftp are arguably the most used set of protocols in the embedded world. the basic idea is that applications do useful work, while everything below them is infrastructure. a key stack concept is that levels communicate with their peers by making requests of the level below while satisfying requests from above. the client ftp, for example, converses with the server ftp by sending data down through its stack and up through the server stack. additionally, each successive layer has a clearly defined task: ? tcp is basically responsible for end-to-end reliability, meaning that it guarantees that each packet arrives at the other end without error and in sequence. ? ip on the other hand, doesnt care about reliability, but instead enables global connectivity with its ip addressing scheme (thats those dotted decimal addresses like 122.1.2.3 that youve probably seen). ? the driver is nothing more than a software shim that allows any vendors ethernet solution to work with standard ip software interfaces like ndis. the net result is that ethernet hardware exchanges packets containing application data, a tcp header, and an ip header, all wrapped up with an 802.3 (ethernet) header and crc. please see any of the widely available tcp/ip references for more detail. NET186about.book : 186appf.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual f-3 1.0 drivers, protocol stacks, and rtos support choosing a protocol stack is a matter of matching design requirements and budget to the available sources. freeware stacks that reduce initial costs are available, but can take a lot of time to get working and may result in terrible performance. at the other end of the spectrum, vendors such as us software offer a wide range of high- level protocols (such as snmp), as well as porting and integration services. high- end stacks may cost more, but are worthwhile if performance and time-to-market are critical. all commercial protocol stacks have a few target-dependent modules that provide independence from hardware drivers and real-time operating system apis. to interface to a new hardware driver or rtos, only these interface modules need to be changed so that generic calls like send_packet or task_wait are replaced by the calls specific to the given driver and rtos. this means that you can use nearly any protocol stack with any combination of hardware drivers and real-time operating system. most stacks also come with drivers for the most common ethernet chips and interface modules for the most popular rtos. also some stacks come with a very simple pseudo-rtos, which implements rudimentary task switching. if your needs are simple, these nano-kernels may work just fine. and of course you can always integrate a home grown rtos. table f-1 lists some protocol stack vendors and the protocols they support. NET186about.book : 186appf.fm page 3 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual f-4 1.0 table f-1. protocol stack vendors most of these stack vendors have separate prices for various protocol extensions. typically, a base set includes the basic protocols like ip, udp, ping, and telnet. you then pay extra for extensions like tcp, ftp, ppp, snmp, rmon, and other higher level protocols and applications. different vendors have different combinations of up-front charges and per-copy royalties. you will have to get quotes from each vendor, and compare them for your anticipated needs. the NET186 demonstration board comes with a tcp/ip stack and an example web server application from us software. for more information about these, see the us software literature include in your kit. for freeware protocol stacks, download packet driver from http://www.crynwr.com/crynwr/ . packet driver is not a tcp/ip stack itself. if you unzip the file and look at software.doc, you will find a list of various protocol stacks (including several tcp/ip packages) and other applications that support packet driver. many of these applications should be suitable for embedded applications. vendor product protocols supported us software 800-356-7097 www.ussw.com usnet tcp/ip, ftp, telnet, ping, snmp, etc. ebs, inc. 508-448-9340 www.etcbin.com rt-ip tcp/ip, ftp, telnet, ppp, etc. accelerated technology 800-468-6853 www.atinucleus.com nucleus net tcp/ip pacific softworks 800-541-9508 www.pscificsw.com fusion tcp/ip tcp/ip, snmp, ppp, smtp, etc. epilogue 505-271-9933 www.epilogue.com attache + ip, udp, tcp, rmon NET186about.book : 186appf.fm page 4 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual f-5 1.0 table f-2 lists some rtos vendors that advertise in embedded systems programming or electronic engineering times . they support the 80186 16-bit processors. table f-2. rtos vendors also, see the march 1997 issue of embedded systems programming. this issue contains a special report on real-time operating systems written by nicholas cravotta. this article references a web page which summarizes the results. the url is: http://www.embedded.com/97/sr9703 . for a list of rtos vendors that specifically support the pcnet-isa ii ethernet controller, see the fusion e86 sm catalog , the embedded systems programing article mentioned above, and third party rtos software vendors committed to support pcnet family , order #20430. for a list of shareware/freeware rtos, check out http://www.eg3.com/ realxrto.htm . vend or product web site us software 800-356-7097 supertask! www.ussw.com kadak, inc. 604-734-2796 amx www.kadak.com accelerated technology 800-468-6853 nucleus www.atinucleus.com embedded systems product 800-525-4302 rtxc www.esphou.com cmx 508-872-7675 cmx www.cmx.com NET186about.book : 186appf.fm page 5 monday, june 23, 1997 11:05 am 1.0 NET186 tm demonstration board users manual index-1 numerics 10base-t port, 2-11 a access unit interface (aui) port, 2-11 am186es microcontroller block diagram, 2-6 initialization, 2-20 operating frequency, 2-5 am29f400 flash memory, 2-8 application running a sample, 1-6 aui port. see access unit interface. b bbs technical support, 3-2 bill of materials, a-12 c clock configuration, 2-12 logic, 2-12 rates supported, 2-12 connecting demonstration board to pc, 1-2 connector rj-45, 2-10 controller ethernet, 2-10 conventions notational, xiii cr5Ccr12 pio leds, 2-16 d dbC9 serial connector pinout, 2-9 den pin, 2-16 documentation conventions, xiii description of, x reference material, xii dt/r pin, 2-16 e e86mon utility invoking, 1-4 no prompt, 1-5 eeprom contents, e-1 e-mail technical support, 3-2 ethernet controller additional resources, c-1 initialization, 2-20 legacy mode, 2-21 overview, 2-9 pal equations, 2-19 pal source file, d-1 index NET186about.book : NET186aboutix.fm page 1 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual index-2 1.0 plug-and-play, 2-21 protocol stacks, f-1 reference material, c-1 rtos support, f-3 tcp/ip, f-1 things to remember, 2-22 expansion interface overview, 2-12 p1 pinout, 2-13 p2 pinout, 2-14 f features NET186 demonstration board, ix flash memory overview, 2-8 flashcs , 2-15 ftp site, 3-5 fusione86 program, 3-5 h hotline numbers, 3-3 i installing demonstration board, 1-2 requirements, 1-2 troubleshooting, 1-5 interfaces expansion, 2-12 rs-232 serial, 2-9 l leds flashing incorrectly, 1-5 indicators, 2-16 no power, 1-5 pio indicators, 2-16 legacy mode, 2-21 m media access controller for ethernet (mace), b-5 memory flash, 2-8 rom, 2-8 sram, 2-8 n NET186 demonstration board 10base-t port, 2-11 bill of materials, a-12 block diagram, ix clock logic, 2-12 documentation, x eeprom contents, e-1 expansion interface, 2-12 features, ix initialization, 2-20 leds, 2-16 legacy mode, 2-21 overview, viii pal equations, 2-19 parts list, 2-4 pcnet-isa ii ethernet controller, 2-10 pios, 2-16 plug-and-play, 2-21 power supply, 2-18 NET186about.book : NET186aboutix.fm page 2 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual index-3 1.0 NET186 demonstration board, cont. protocol stacks, f-1 reset logic, 2-12 rj-45 connector, 2-10 rom space, 2-8 rs-232 serial ports, 2-9 rtos support, f-3 schematics, a-2 sram, 2-8 tcp/ip primer, f-1 technical support, 3-1 networking additional resources, c-1 reference material, c-1 p pal equations, 2-19 pal22v10, 2-19 source file, d-1 pc/104 expansion interface, 2-12 pinout, 2-13, 2-14 support, 2-13 pcnet family background, b-2 lance/clance, b-1 mace, b-5 pcnet-32, b-3 pcnet-isa series, b-2 pcnet-pci ii, b-3 software compatibility, b-4 pcnet-isa ii ethernet controller 10base-t port, 2-11 aui port, 2-11 initialization, 2-20 legacy mode, 2-21 pal equations, 2-19 pal source file, d-1 pcnet family, b-1 plug-and-play, 2-21 protocol stacks, f-1 rj-45 connector, 2-10 rtos support, f-3 tcp/ip primer, f-1 things to remember, 2-22 pcs pins, 2-16 pinout dbC9 serial connector, 2-9 pc/104 interface (p1), 2-13 pc/104 interface (p2), 2-14 rs-232 serial ports, 2-9 pio signals mapped to leds, 2-16 overview, 2-16 plug-and-play (pnp), 2-21 ports 10base-t, 2-11 aui, 2-11 expansion, 2-12 rs-232 serial, 2-9 power supply 5-v vs. 9-v, 2-18 input requirements, 2-18 polarity, 2-18 product support ftp site, 3-5 third party (fusione86), 3-5 www site, 3-4 protocol stacks, f-1 r res pin, 2-12 reset button nothing happens when pushing, 1-5 reset logic, 2-12 rj-45 connector pin assignment, 2-10 pin functions, 2-10 rom space, 2-8 rs-232 serial ports, 2-9 pinout, 2-9 NET186about.book : NET186aboutix.fm page 3 monday, june 23, 1997 11:05 am NET186 tm demonstration board users manual index-4 1.0 s sample applications, 1-6 schematics, a-2 software e86mon, x e86stack, x e86web, x invoking the e86mon utility, 1-4 pcnet family, b-4 protocol stack vendors, f-4 protocol stacks, f-1 rtos vendors, f-5 tcp/ip, f-1 sram, 2-8 support, product. see product support. support, technical. see technical support. t tcp/ip, f-1 technical support, 3-1 bbs support, 3-2 e-mail support, 3-2 hotline numbers, 3-3 www support, 3-2 terminal emulation programs displaying unreadable characters, 1-5 locking up, 1-5 tmrin1 pin, 2-16 tmrout1 pin, 2-16 troubleshooting installation, 1-5 u ucs (upper memory chip select) signal, 2-8 w www networking reference material, c-2 product support, 3-4 technical support, 3-2 NET186about.book : NET186aboutix.fm page 4 monday, june 23, 1997 11:05 am |
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