1 ? fn7332.2 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2002-2004. all rights reserved. elantec is a registered trademark of elantec semiconductor, inc. all other trademarks mentioned are the property of their respective owners. preliminary el5104, EL5105, el5204, el5205, el5304 700mhz slew enhanced vfa the el5104, EL5105, el5204, el5205, and el5304 represent high-speed voltage feedback amplifiers based on the current feedback amplifier architecture. this gives the typical high slew rate benefits of a cfa family along with the stability and ease of use associated with the vfa type architecture. this family is available in single, dual, and triple versions, with 200mhz, 400mh z, and 700mhz versions. these are all available in single, dual and triple versions. this family operates on single 5v or 5v supplies from minimum supply current. the el5104 and el5204 also feature an output enable function, which can be used to put the output in to a high-impedance mode. this enables the outputs of multiple amplifiers to be tied together for use in multiplexing applications. features ? specified for 5v or 5v applications ? power-down to 17a ? -3db bandwidth = 700mhz ? 0.1db bandwidth = 45mhz ? low supply current = 9.5ma ? slew rate = 3000v/s ? low offset voltage = 10mv max ? output current = 160ma ?a vol = 1400 ? diff gain/phase = 0.01%/0.02c ? pb-free available (rohs compliant) applications ? video amplifiers ? pcmcia applications ?a/d drivers ? line drivers ? portable computers ? high speed communications ? rgb applications ? broadcast equipment ? active filtering data sheet december 8, 2004
2 fn7332.2 december 8, 2004 ordering information part number package tape & reel pkg. dwg. # part number package tape & reel pkg. dwg. # el5104is 8-pin so - mdp0027 el5205is 8-pin so - mdp0027 el5104is-t7 8-pin so 7? mdp0027 el5205is-t7 8-pin so 7? mdp0027 el5104is-t13 8-pin so 13? mdp0027 el5205is-t13 8-pin so 13? mdp0027 el5104iw-t7 6-pin sot-23 7? (3k pcs) mdp0038 el5205iy 8-pin msop - mdp0043 el5104iw-t7a 6-pin sot-23 7? (250 pcs) mdp0038 el5205iy-t7 8-pin msop 7? mdp0043 EL5105ic-t7 5-pin sc-70 7? (3k pcs) p5.049 el5205iy-t13 8-pin msop 13? mdp0043 EL5105ic-t7a 5-pin sc-70 7? (250 pcs) p5.049 el5304iu 16-pin qsop - mdp0040 EL5105iw-t7 5-pin sot-23 7? (3k pcs) mdp0038 el5304iu-t7 16-pin qsop 7? mdp0040 EL5105iw-t7a 5-pin sot-23 7? (250 pcs) mdp0038 el5304iu-t13 16-pin qsop 13? mdp0040 el5204iy 10-pin msop - mdp0043 el5304iuz (see note) 16-pin qsop (pb-free) - mdp0040 el5204iy-t7 10-pin msop 7? mdp0043 el5304iuz-t7 (see note) 16-pin qsop (pb-free) 7? mdp0040 el5204iy-t13 10-pin msop 13? mdp0043 el5304iuz-t13 (see note) 16-pin qsop (pb-free) 13? mdp0040 note: intersil pb-free products em ploy special pb-free material sets; molding co mpounds/die attach materials and 100% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or ex ceed the pb-free requirements of ipc/jedec j std-020c. pinouts el5104 (6-pin sot-23) top view el5104 (8-pin so) top view EL5105 (5-pin sot-23, sc-70) top view el5204 (10-pin msop) top view el5205 (8-pin so, msop) top view el5304 (16-pin qsop) top view 1 2 3 6 4 5 +- out vs- in+ vs+ enable in- 1 2 3 4 8 7 6 5 - + nc in- in+ vs- enable vs+ out nc 1 2 3 5 4 +- out vs- in+ vs+ in- 1 2 3 4 10 9 8 7 5 6 out in- in+ vs- vs+ out in- in+ ce ce - + 7 - + 1 2 3 4 8 7 6 5 - + - + outa ina- ina+ vs- vs+ outb inb- inb+ 1 2 3 4 16 15 14 13 5 6 7 12 11 10 8 9 - + - + - + ina+ cea vs- ceb ina- outa vs+ outb inb+ nc cec inc+ inb- nc outc inc- el5104, EL5105, el 5204, el5205, el5304
3 fn7332.2 december 8, 2004 absolute maxi mum ratings (t a = 25c) supply voltage between v s + and gnd. . . . . . . . . . . . . . . . . . 13.2v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4v maximum output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80ma storage temperature range . . . . . . . . . . . . . . . . . .-65c to +150c ambient operating temperature range . . . . . . . . . .-40c to +85c operating junction temperature . . . . . . . . . . . . . . . . . . . . . . . 150c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a dc electrical specifications v s = 5v, gnd = 0v, t a = 25c, v cm = 0v, v out = 0v, v enable = gnd or open, unless otherwise specified. parameter description conditions min typ max unit v os offset voltage el5104, EL5105, el5204, el5205 -10 3 10 mv el5304 -18 5 18 mv tcv os offset voltage temperature coefficient measured from t min to t max 10 v/c ib input bias current v in = 0v 8 30 a i os input offset current v in = 0v 4 15 a tci os input bias current temperature coefficient measured from t min to t max 50 na/c psrr power supply rejection ratio 60 70 db cmrr common mode rejection ratio v cm from -3v to +3v 56 62 db cmir common mode input range guaranteed by cmrr test -3 +3 v r in input resistance common mode 50 120 k ? c in input capacitance so package 1 pf i s,on supply current - enabled per amplifier 8.5 9.5 11 ma i s,off supply current - shut down v s +, per amplifier +1 0 +25 a v s -, per amplifier -25 17 -1 a psor power supply operating range 4 13.2 v avol open loop gain r l = 1k ? to gnd 55 65 db r l = 150 ? to gnd 60 db v op positive output voltage swing r l = 150 ? to 0v 3.6 3.8 v v on negative output voltage swing r l = 150 ? to 0v -3.8 -3.6 v i out output current r l = 10 ? to 0v 90 160 ma v ih-en enable pin voltage for power up (v s +) -5 (v s +) -3 v v il-en enable pin voltage for shut down (v s +) -1 v s +v el5104, EL5105, el 5204, el5205, el5304
4 fn7332.2 december 8, 2004 closed loop ac electrical specifications v s = +5v, gnd = 0v, t a = 25c, v cm = +1.5v, v out = +1.5v, v clamp = +5v, v enable = +5v, a v = +1, r f = 0 ? , r l = 150 ? to gnd pin, unless otherwise specified. parameter description conditions min typ max unit bw -3db bandwidth (v out = 200mv p-p )v s = 5v, a v = 1, r f = 0 ? 700 mhz sr slew rate r l = 100 ? , v out = -3v to +3v 2000 3000 5000 v/s t r ,t f rise time, fall time 0.1v step 0.4 ns os overshoot 0.1v step 10 % t pd propagation delay 0.1v step 0.4 ns t s 0.1% settling time v s = 5v, r l = 500 ? , a v = 1, v out = 2.5v 7 ns dg differential gain a v = 2, r l = 150 ? , v indc = -1 to +1v 0.01 % dp differential phase a v = 2, r l = 150 ? , v indc = -1 to +1v 0.02 e n input noise voltage f = 10khz 10 nv/ hz i n input noise current f = 10khz 54 pa/ hz t dis disable time 180 ns t en enable time 650 ns i en enable pin current enabled, v en = 0v -1 1 a disabled, v en = 5v 1 25 a el5104, EL5105, el 5204, el5205, el5304
5 fn7332.2 december 8, 2004 typical performance curves figure 1. gain vs frequency for various r l figure 2. gain vs frequency for various supply voltage figure 3. gain vs frequency for various r f /r g figure 4. psrr vs frequency figure 5. cmrr vs frequency figure 6. z out vs frequency frequency (hz) normalized gain (db) 30k 1.5g 4 3 2 1 0 -1 -2 -3 -4 -5 -6 50 ? 500 ? 200 ? 150 ? 10 ? 100k 1m 10m 100m 100 ? frequency (hz) normalized gain (db) 30k 1.5g 4 3 2 1 0 -1 -2 -3 -4 -5 -6 100k 1m 10m 100m 6.0 5.0 4.0 3.0 2.5 frequency (hz) normalized gain (db) 30k 1.5g 5 4 3 2 1 0 -1 -2 -3 -4 -5 665 100k 1m 10m 100m r f =r g = 475 332 215 a v =+2 psrr (db) 0 -20 -40 -60 -80 10 -10 -30 -50 -70 1k 10k 1m 500m frequency (hz) 100k 100m 10m -90 v s + v s - a v =+1 v s =5v cmrr (db) -20 -40 -60 -80 -100 -10 -30 -50 -70 -90 1k 10k 1m 500m frequency (hz) 100k 100m 10m -110 a v =+5 v s =5v z out ( ? ) 1 0.1 10 0.01 10k 100k 1m 100m frequency (hz) 10m a v =+2 v s =5v el5104, EL5105, el 5204, el5205, el5304
6 fn7332.2 december 8, 2004 figure 7. open loop gain and phase vs frequency figure 8. group delay figure 9. small signal response falling edge fi gure 10. small signal response rising edge figure 11. large signal response falling edge figure 12. large signal response rising edge typical performance curves (continued) open loop gain (db) 60 40 20 0 -20 70 50 30 10 -10 500 10k 1m 500m frequency (hz) 100k 100m 10m -30 1k frequency (hz) delay (ns/div) 30k 500 5 4 3 2 1 0 -1 -2 -3 -4 -5 0.01 0.1 10 a v =-2 v s =5v 100 20ns/div 100mv 30mv v s =5v r l =150 ? ch1 ch2 ch2 fall=14.60ns ch1 fall=1.206ns 20ns/div 100mv 32mv v s =5v r l =150 ? ch1 ch2 ch2 rise=14.61ns ch1 rise=1.206ns 20ns/div 4v 440mv v s =5v, r l =150 ? ch1 ch2 20ns/div 4v 440mv v s =5v, r l =150 ? ch1 ch2 el5104, EL5105, el 5204, el5205, el5304
7 fn7332.2 december 8, 2004 figure 13. turn-off time figure 14. turn-on time figure 15. equivalent noise voltage vs frequency figure 16. frequency vs gain for various c l figure 17. package power dissipation vs ambient temperature figure 18. package power dissipation vs ambient temperature typical performance curves (continued) 100ns/div v s =5v r l =150 ? ch1 ch2 100ns/div v s =5v r l =150 ? ch1 ch2 noise voltage (nv/ hz) 10 100 10k 100k frequency (hz) 1k 100 10 1 v s =5v normalized gain (db) 4 2 0 -2 -4 5 3 1 -1 -3 100k 1m 10m 300m frequency (hz) 100m c in -=0pf a v =+2 r l =150 ? r f =383 ? -5 0pf 87pf 69pf 51pf 33pf jedec jesd51-7 high effective thermal conductivity test board 1.2 1 0.4 0 0 255075100 150 ambient temperature (c) power dissipation (w) 85 1.087w 0.8 0.2 0.6 543mw 125 j a = 1 1 5 c / w m s o p 8 / 1 0 j a = 230 c /w s o t 2 3- 5/6 1.116w ja =112c/w qsop16 1.136w ja =110c/w so8 1.4 0.8 0.6 0.2 0 0 255075100 150 ambient temperature (c) power dissipation (w) 125 85 jedec jesd51-7 high effective thermal conductivity test board 0.4 1 1.2 el5104, EL5105, el 5204, el5205, el5304
8 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7332.2 december 8, 2004 figure 19. package power dissipation vs ambient temperature figure 20. package power dissipation vs ambient temperature typical performance curves (continued) jedec jesd51-3 low effective thermal conductivity test board 0.7 0.6 0.4 0.3 0.2 0.1 0 0 255075100 150 ambient temperature (c) power dissipation (w) 85 607mw ja =206c/w msop8/10 0.5 488mw ja =256c/w sot23-5/6 125 791mw ja =158c/w qsop16 781mw ja =160c/w so8 1 0.8 0.6 0.2 0 0 255075100 150 ambient temperature (c) power dissipation (w) 125 85 jedec jesd51-3 low effective thermal conductivity test board 0.4 el5104, EL5105, el 5204, el5205, el5304
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