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1/15 march 2004 m616z08 128 kbit (8 kbit x16) sram with output enable features summary operation voltage: 2.34v to 3.6v 8 kbit x16 sram equal cycle and access times: as fast as 20ns tri-state common i/o two write enable pins allow writing to upper and lower bytes figure 1. package figure 2. logic diagram table 1. signal names note: to pin should be connected to v cc . 44 1 so44 (mh) 44-pin, hatless soic ai04213 13 a0-a12 we0 dq0-dq15 v cc m616z08 oe v ss we1 16 ce to a0-a12 address inputs dq0-dq15 data input/output ce chip enable oe output enable we0 write enable dq 0-7 we1 write enable dq 8-15 v cc supply voltage v ss ground to time-out pin
m616z08 2/15 table of contents features summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 1. 44-pin, hatless soic package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 1. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 3. 44-pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 4. address controlled, read mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 5. chip enable or output enable controlled, read mode ac waveforms . . . . . . . . . . . . . 5 table 2. read mode ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 write mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 6. write enable controlled, write mode ac waveforms. . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 7. chip enable controlled, write mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. write mode ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ?operational? mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 noise immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. we(0,1) states during access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 maximum rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 6. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 dc and ac parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 7. dc and ac measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. ac testing load circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 8. capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 9. dc characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 package mechanical information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. so44 ? 44-lead, plastic, hatless, small package outline . . . . . . . . . . . . . . . . . . . . . . . 13 table 10. so44 ? 44-lead, plastic, hatless, small package mechanical data . . . . . . . . . . . . . . . . 13 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 11. ordering information example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 12. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3/15 m616z08 description the m616z08 is a 128 kbit (131,072 bit) cmos sram, organized by 16 bits. the device features fully static operation requiring no external clocks or timing strobes, with equal address access and cy- cle times. it requires a single 2.6v 10% or 3.3v 10% supply, and all inputs and outputs are ttl compatible. the m616z08 is available in a 44-lead soic pack- age. figure 3. 44-pin connections note: to pin should be connected to v cc . ai04212 22 44 43 dq15 1 dq11 dq4 dq7 v cc dq10 dq5 dq6 a08 a04 a07 to a11 ce oe a05 a12 m616z08 10 2 5 6 7 8 9 11 12 13 14 15 21 40 39 36 35 34 33 32 31 30 29 28 v ss v cc v cc a10 3 4 38 37 42 41 v ss v cc v ss a03 dq12 dq13 a01 a02 v cc 16 17 18 19 20 27 26 25 24 23 dq9 dq8 v ss dq1 dq3 dq2 a00 a06 we0 we1 v ss dq0 dq14 a9
m616z08 4/15 operation read mode the m616z08 is in the read mode whenever write enable (we0 or we1 ) is high with output enable (oe ) low, and chip enable (c e ) is assert- ed. this provides access to data from sixteen of the 131,072 locations in the static memory array, specified by the 13 address inputs. valid data will be available at the sixteen output pins within t avqv after the last stable address, providing oe is low and c e is low. if chip enable or output enable access times are not met, data access will be measured from the limiting parameter (t elqv or t glqv ) rather than the address. data out may be indeterminate at t elqx and t glqx , but data lines will always be valid at t avqv . figure 4. address controlled, read mode ac waveforms note: c e = low, oe = low, we(0,1) = high. figure 5. chip enable or output enable controlled, read mode ac waveforms tavav tavqv taxqx a0-a12 dq0-dq15 valid data valid ai04210 tavav tavqv taxqx telqv telqx tehqz tglqv tglqx tghqz valid a0-a12 ce oe dq0-dq15 valid ai05638
5/15 m616z08 table 2. read mode ac characteristics note: 1. valid for ambient operating temperature: t a = ?40 to 125c (except where noted). 2. c l = 5pf. symbol parameter (1) m616z08 unit ?20 2.34 to 3.0v 3.0 to 3.6v min max min max t avav read cycle time 36 20 ns t av qv address valid to output valid 36 20 ns t elqv chip enable low to output valid 36 20 ns t glqv output enable low to output valid 20 10 ns t elqx chip enable low to output transition 0 0 ns t glqx output enable low to output transition 0 0 ns t ehqz (2) chip enable high to output hi-z 10 10 ns t ghqz (2) output enable high to output hi-z 10 10 ns t axqx address transition to output transition 0 0 ns
m616z08 6/15 write mode the m616z08 is in the write mode whenever the we0 (low memory addresses) or we1 (high mem- ory addresses) and c e pins are low (see table 4., page 8 ). either the chip enable input (c e ) or the write enable input (we0 or we1 ) must be de-asserted during address transitions for subse- quent write cycles. write begins with the con- currence of chip enable being active with we0 or we1 low. therefore, address setup time is refer- enced to write enable and chip enable as t avwl and t av eh respectively, and is determined by the latter occurring edge. the write cycle can be terminated by the earlier rising edge of c e , or we0 /we1 . if the output is enabled (c e = low and oe = low), then we0 or we1 will return the outputs to high impedance within t wlqz of its falling edge. care must be taken to avoid bus contention in this type of operation. data input must be valid for t dvwh before the rising edge of write enable, or for t d- veh before the rising edge of c e , whichever oc- curs first, and remain valid for t whdx or t ehdx . note: when using mcp555 with to pin high, re- laxed write timing (csnt = 1 in the chip select configuration register) should be selected. figure 6. write enable controlled, write mode ac waveforms figure 7. chip enable controlled, write mode ac waveforms note: 1. output enable (oe ) = high. 2. if ce goes high with we0 or we1 high, the output remains in a high-impedance state. tavav twhax tdvwh data input a0-a12 we (0,1) dq0-dq15 ce valid tavwh tavel twlwh tavwl twlqz twhdx twhqx ai04211 tavav tehax tdveh data input a0-a12 we (0,1) dq0-dq15 ce valid taveh tavel tavwl tehdx teleh ai05639
7/15 m616z08 table 3. write mode ac characteristics note: 1. valid for ambient operating temperature: t a = ?40 to 125c (except where noted). 2. c l = 5pf 3. at any given temperature and voltage condition, t wlqz is less than t whqx for any given device. symbol parameter (1) m616z08 unit ?20 2.34 to 3.0v 3.0 to 3.6v min max min max t avav write cycle time 36 20 ns t avw l address valid to write enable low 2 2 ns t avwh address valid to write enable high 34 18 ns t aveh address valid to chip enable high 34 18 ns t wlwh write enable pulse width 25 11 ns t whax write enable high to address transition 2 2 ns t whdx write enable high to input transition 2 2 ns t whqx (3) write enable high to output transition 0 0 ns t wlqz (2,3) write enable low to output hi-z 10 10 ns t ave l address valid to chip enable low 2 2 ns t eleh chip enable low to chip enable high 25 11 ns t ehax chip enable high to address transition 2 2 ns t ehdx chip enable high to input transition 2 2 ns t dvwh input valid to write enable high 20 8 ns t dveh input valid to chip enable high 20 8 ns
m616z08 8/15 ?operational? mode the m616z08 has a chip enable power down fea- ture which invokes an automatic standby mode whenever chip enable is de-asserted (c e = high). an output enable (oe ) signal provides a high speed tri-state control, allowing fast read/write cycles to be achieved with the common i/o data bus. operational modes are determined by device control inputs we0 or we1 and c e as summa- rized in ?operating modes? (see tables 4 and 5 ). noise immunity when designing with high speed memory, proper power trace layout and capacitive decoupling must be maintained to ensure proper system oper- ation. power and ground line inductance should be reduced by providing separate power planes. the impedance of the decoupling path from the power pin through the decoupling capacitor should also be kept to a minimum. small decoupling capaci- tors (10nf) should be located as close to the de- vice pins as possible to limit the high frequency noise. larger capacitor values (10uf and 1uf) are recommended to reduce low frequency noise and should be placed next to the power entry point of the board. proper line termination should also be employed to minimize signal reflection. see motorola semiconductor application note an2127/d for additional electromagnetic compat- ibility (emc) system design guidelines. table 4. we(0,1) states during access table 5. operating modes note: 1. x = '1' or '0' write enable used during 16-bit port access we0 write enable for dq (0-7) we1 write enable for dq (8-15) operation ce oe we0 we1 dq0?dq7 dq8?15 deselect v ih x (1) x (1) x (1) hi-z hi-z word write v il v ih v il v il hi-z hi-z byte 0 write v il v ih v il v ih hi-z hi-z byte 1 write v il v ih v ih v il hi-z hi-z byte 0 write, byte 1 read v il v il v il v ih hi-z data byte 1 write, byte 0 read v il v il v ih v il data hi-z word read v il v il v ih v ih data data
9/15 m616z08 maximum rating stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicat- ed in the operating sections of this specification is not implied. exposure to absolute maximum rat- ing conditions for extended periods may affect de- vice reliability. refer also to the stmicroelectronics sure program and other rel- evant quality documents. table 6. absolute maximum ratings note: 1. for standard (snpb) lead finish: reflow at peak temperature of 225c (total thermal budget not to exceed 180c for betwe en 90 to 150 seconds). 2. for lead-free (pb-free) lead finish: reflow at peak temperature of 260c (total thermal budget not to exceed 245c for greate r than 30 seconds). 3. up to a maximum operating v cc of 3.6v only. 4. v il (min) = v ss ? 2.0v ac (pulse width 10% t avav (min)) v ih (max) = v cc + 2.0v ac (pulse width 10% t avav (min)) 5. one output at a time, not to exceed 1 second duration. symbol parameter value unit t a ambient operating temperature ?40 to 125 c t stg storage temperature ?65 to 150 c t sld (1,2) lead solder temperature for 10 seconds 260 c v io (3,4) input or output voltage ?0.3 to v cc + 0.3 v v cc supply voltage ?0.3 to 4.0 v i o (5) output current 10 ma p d power dissipation 270 mw
m616z08 10/15 dc and ac parameters this section summarizes the operating and mea- surement conditions, as well as the dc and ac characteristics of the device. the parameters in the following dc and ac characteristic tables are derived from tests performed under the measure- ment conditions listed in the relevant tables. de- signers should check that the operating conditions in their projects match the measurement condi- tions when using the quoted parameters. table 7. dc and ac measurement conditions note: output high z is defined as the point where data is no longer driven. figure 8. ac testing load circuit table 8. capacitance note: 1. effective capacitance measured with power supply at 3.3v; sampled only, not 100% tested. 2. at 25c; f = 1mhz. 3. outputs deselected. parameter m616z08 v cc supply voltage 2.34 to 3.0v or 3.0 to 3.6v ambient operating temperature ?40 to 125c load capacitance (c l ) 50pf input rise and fall times 5ns input pulse voltages 0 to 3v input and output timing ref. voltages 1.5v c l = 50 pf or 5pf device under test 2.6 k ? 2.6 k ? ai05650 3.0v out symbol parameter (1,2) min max unit c in input capacitance on all pins (except dq) 10 pf c out (3) output capacitance 10 pf
11/15 m616z08 table 9. dc characteristics note: 1. valid for ambient operating temperature: t a = ?40 to 125c; v cc = 3.0 to 3.6v or 2.34 to 3.0v (except where noted). 2. input leakage on to pin due to internal pull-down to v ss . 3. average ac current, outputs open, cycling at t avav minimum. 4. all other inputs at v il 0.2v or v ih v cc ?0.2v. sym parameter test condition (1) min typ max unit i li input leakage current 0v vin v cc to pin (2) 65 125 a all other inputs 1 a i lo output leakage current 0v v out v cc 1 a i cc1 (3) supply current v cc = 3.6v 75 ma i cc3 (4) supply current (standby) cmos v cc = 3.6v, ce v cc ? 0.2v, f = 0 1ma v il input low voltage ?0.3 0.3v cc v v ih input high voltage 0.7v cc v cc + 0.3 v v ol output low voltage i ol = 1ma 0.2 v v oh output high voltage i oh = ?1ma 2.34 to 3.0v v cc ?0.2v 3.0 to 3.6v v cc ?0.3v v
m616z08 12/15 package mechanical information figure 9. so44 ? 44-lead, plastic, hatless, small package outline note: drawing is not to scale. table 10. so44 ? 44-lead, plastic, hatless, small package mechanical data symb mm inches min typ max min typ max a 3.05 0.120 a1 0.05 0.36 0.002 0.014 a2 2.34 2.69 0.092 0.106 b 0.36 0.46 0.014 0.018 c 0.15 0.32 0.006 0.012 d 17.71 18.49 0.697 0.728 e 8.23 8.89 0.324 0.350 e 0.81 ? ? 0.032 ? ? h 11.51 12.70 0.453 0.500 l 0.41 1.27 0.016 0.050 a0808 n44 44 cp 0.10 0.004 soh-c e n d c l a1 1 h a cp be a2
13/15 m616z08 part numbering table 11. ordering information example for other options, or for more information on any aspect of this device, please contact the st sales office nearest you. example: m6 16z08 ?20 mh 3 f device type m6 device function 16z08 = 128kbit (8kbit x16) speed ?20 = 20ns (3.0 to 3.6v) package mh = 44-lead, hatless soic temperature range 3 = ?40 to 125c shipping method blank = tubes (not for new design - use e) e = lead-free package (eco pack ? ), tubes f = lead-free package (eco pack ? ), tape & reel tr = tape & reel (not for new design - use f)
m616z08 14/15 revision history table 12. document revision history automotive, automotive, automotive, automotive, automotive, automotive, automotive, automotive, au- tomotive, automotive, automotive, automotive, automotive, automotive, automotive, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, low, power, sram, sram, sram, sram, sram, sram, sram, sram, sram, sram, sr am, sram, sram, sram, sram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, lpsram, auto, auto, auto, auto, auto, auto, auto, auto, auto, auto, au- to, auto, auto, auto, auto, auto, auto, auto, auto, auto, high, temperature, temp, range, high, temper- ature, temp, range, high, temperature, temp, range, high, temperature, temp, range, high, temperature, temp, range, high, temperature, te mp, range, high, temperature, temp, range, high, temperature, temp, range, high, temperature, temp, range, high, temperature, temp, range date version revision details september 2001 1.0 first issue 11/1901 2.0 correction of operating modes text (table 5 ); document status changed to ?data sheet;? add text for noise immunity (page 10) 02/12/02 2.1 add to pin (figure 2 , 3 , table 1 ); change write mode ac characteristics (table 3 ) 02/21/02 2.2 changes for to pin (table 9 ) and change characteristics (table 2 , 3 ) 05/13/02 2.3 add reflow time and temperature footnote (table 6 ) 07/22/02 2.4 add ?hatless? to package description (figure 1 , 9 and table 11 , 10 ) 22-mar-04 3.0 reformatted; updated lead-free information (table 6 , 11 )
15/15 m616z08 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com

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