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publication# 080213 rev: c amendment: / 0 issue date: october 1999 am79486 subscriber line interface circuit the am79486 subscriber line interface circuit implements the basic telephone line interface functions and enables the design of low cost, high performance pots line interface cards. distinctive characteristics control states: active, ringing, standby and disconnect low standby power ?19 v to ?58 v battery operation on-hook transmission two-wire impedance set by single external impedance programmable constant-current feed programmable loop-detect threshold programmable ring-trip detect threshold no ?5 v supply required current gain = 500 on-chip thermal management (tmg) feature two on-chip relay drivers with relay snubbers block diagram c1 two-wire interface hpa hpb input decoder and control ring-trip detector power-feed controller da db bgnd vcc vbref cas agnd/dgnd vbat a(tip) b(ring) ringout det vdc testout rd tmg relay driver ring relay driver rsn signal transmission vtx testin off-hook detector c2 rdc
2 am79486 data sheet ordering information standard products legerity standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the elements below. note: * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ?25 c to +85 c is guaranteed by characterization and periodic sampling of production units. am79486 j c temperature range c = commercial (0 c to 70c)* package type j = 32-pin plcc (pl 032) device number/description am79486 subscriber line interface circuit ?1 performance grade option ?1 = 52 db longitudinal balance ?2 = 63 db longitudinal balance valid combinations am79486 ?1 jc ?2 valid combinations valid combinations list configurations planned to be supported in volume for this device. consult the local legerity sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on legerity?s standard military grade products.
slic products 3 connection diagram top view notes: 1. pin 1 is marked for orientation. 2. nc = no connect 3. rsvd = reserved. do not connect to these pins. 4 3 2 1 32 31 30 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 rsvd rd hpa vtx rsn agnd nc 26 27 28 29 da testout rdc c1 32-pin plcc a(tip) b(ring) c2 cas rsvd vdc ringout rsvd bgnd db vcc vbat rsvd testin nc det hpb vbref nc rsvd tmg am79486
4 am79486 data sheet pin descriptions pin names type description agnd/dgnd gnd analog and digital ground. a(tip) output output of a(tip) power amplifier. bgnd gnd battery (power) ground. b(ring) output output of b(ring) power amplifier. c2 ? c1 inputs decoder. slic control pins. c2 is msb and c1 is lsb. ttl compatible with internal current source pullups. cas capacitor anti-saturation pin for capacitor to filter reference voltage when operating in anti-saturation region. da input ring-trip negative. negative input to ring-trip comparator. db input ring-trip positive. positive input to ring-trip comparator. det output switchhook detector. a logic low indicates that selected condition is detected. the detect condition is selected by the logic inputs (c1 and c2). the output is open-collector with a built-in 15 k ? pull-up resistor. hpa capacitor high-pass filter capacitor. a(tip) side of high-pass filter capacitor. hpb capacitor high-pass filter capacitor. b(ring) side of high-pass filter capacitor. nc ? no connect. pin not internally connected. rd resistor detect resistor. detector threshold set and filter pin. rdc resistor dc feed resistor. connection point for the dc feed current programming network. the other end of the network connects to the receiver summing node (rsn). ringout output ring relay driver. open collector driver with emitter internally connected to bgnd. rsn input receive summing node. the metallic current (both ac and dc) between a(tip) and b(ring) is equal to 500 times the current into this pin. the networks which program receive gain, two-wire impedance and feed resistance all connect to this node. rsvd ? these pins are reserved for legerity use. no connection should be made to these pins. testin input relay driver control. a logic low at testin forces testout low. ttl compatible with internal current source pullups. testout output relay driver. open collector driver with emitter internally connected to bgnd. tmg ? thermal management. external resistor connects between this pin and vbat to offload power from slic. vbat battery battery supply and connection to substrate. vbref ? this is a legerity reserved pin and always must be connected to the vbat pin. vcc power +5 v power supply. vdc output voltage output at this pin is proportional to the voltage across pins a and b (v ab ). vtx output transmit audio. this output is a 0.50 gain version of the a(tip) and b(ring) metallic voltage. vtx also sources the two-wire input impedance programming network.
slic products 5 absolute maximum ratings storage temperature . . . . . . . . . . . . ? 55 c to +150 c v cc with respect to agnd/dgnd . . . . ? 0.4 v to +7 v v bat with respect to agnd/dgnd: continuous . . . . . . . . . . . . . . . . . . +0.4 v to ? 70 v 10 ms . . . . . . . . . . . . . . . . . . . . . . +0.4 v to ? 75 v bgnd with respect to agnd/dgnd . . . .+3 v to ? 3 v a(tip) or b(ring) to bgnd: continuous . . . . . . . . . . . . . . . . . . . . .v bat to +1 v 10 ms (f = 0.1 hz) . . . . . . . . . . . . . . ? 70 v to +5 v 1 s (f = 0.1 hz) . . . . . . . . . . . . . . . . ? 80 v to +8 v 250 ns (f = 0.1 hz) . . . . . . . . . . . . . ? 90 v to +12 v current from a(tip) or b(ring). . . . . . . . . . 150 ma ringout current . . . . . . . . . . . . . . . . . . . . . . 50 ma testout current . . . . . . . . . . . . . . . . . . . . . 100 ma ringout/testout voltage . . . . . . . bgnd to +7 v ringout/testout transient . . . . . bgnd to +10 v da and db inputs voltage on ring-trip inputs . . . . . . . . . . .v bat to 0 v current into ring-trip inputs . . . . . . . . . . . . 10 ma c2 ? c1, testin input voltage . . . . . . . . . . . . ? 0.4 v to v cc + 0.4 v maximum power dissipation, continuous, t a = 70 c, no heat sink (see note): in 32-pin plcc package. . . . . . . . . . . . . . . . 1.7 w thermal data: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ja in 32-pin plcc package. . . . . . . . . . . .43 c/w typ esd immunity/pin (hbm) . . . . . . . . . . . . . . . . . 1500 v note: thermal limiting circuitry on chip will shut down the cir- cuit at a junction temperature of about 165 c. the device should never see this temperature and operation above 145 c junction temperature may degrade device reliability. see the slic packaging considerations for more information. stresses above those listed under absolute maximum rat- ings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maxi- mum ratings for extended periods may affect device reliability. operating ranges commercial (c) devices ambient temperature . . . . . . . . . . . . . . 0 c to +70 c* v cc . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 v to 5.25 v v bat . . . . . . . . . . . . . . . . . . . . . . . . . . ? 19 v to ? 58 v agnd/dgnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 v bgnd with respect to agnd/dgnd . . . . . . . . . . . . ? 100 mv to +100 mv load resistance on vtx to ground . . . . . . . 20 k ? min the operating ranges define those limits between which the functionality of the device is guaranteed. * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ? 25 c to +85 c is guaranteed by characterization and periodic sampling of pro- duction units.
6 am79486 data sheet electrical characteristics description test conditions (see note 1) min typ max unit note transmission performance 2-wire return loss 200 hz to 3.4 khz 18 36 db 1, 4 analog output (v tx ) impedance 3 20 ? 4 analog (v tx ) output offset voltage 0 c to +70 c ? 25 c to +85 c ? 40 ? 50 +40 +50 mv ? 4 overload level, 2 wire and 4 wire active state 2.5 vpk 2a overload level on hook, r lac = 900 ? 1.5 vrms 2b thd, total harmonic distortion 0 dbm +7 dbm ? 64 ? 55 ? 50 ? 40 db 5 thd, on hook +3 dbm, r lac = 900 ? ? 36 longitudinal capability (see test circuit d) longitudinal to metallic l-t, l-4 balance 200 hz to 1 khz 0 c to +70 c ? 1* 53 db 0 c to +70 c ? 263 ? 25 c to +85 c ? 150 4 ? 25 c to +85 c ? 258 1 khz to 3.4 khz 0 c to +70 c ? 1* 53 db 0 c to +70 c ? 258 ? 25 c to +85 c ? 150 ? 25 c to +85 c ? 253 longitudinal current per pin (a or b) active state 8.5 27 marms 7 longitudinal impedance at a or b 0 to 100 hz 25 35 ? /pin idle channel noise c-message weighted noise r l = 600 ? 0 c to +70 c r l = 600 ? ? 25 c to +85 c +7 +11 +13 dbrnc 4 insertion loss and balance return signal (see test circuits a and b) gain accuracy 4- to 2-wire 0 dbm, 1 khz 0 c to +70 c ? 25 c to 85 c ? 0.15 ? 0.20 0 0 +0.15 +0.20 db 4 gain accuracy 2- to 4-wire, 4- to 4-wire 0 dbm, 1 khz 0 c to +70 c ? 25 c to 85 c ? 6.17 ? 6.22 ? 6.02 ? 6.02 ? 5.87 ? 5.82 4 gain accuracy, 4- to 2-wire on hook, r lac = 900 ? ? 0.35 +0.35 4 gain accuracy, 2- to 4-wire, 4- to 4-wire on hook, r lac = 900 ? ? 6.37 ? 6.02 ? 5.67 gain accuracy over frequency 300 hz to 3400 hz 0 c to +70 c relative to 1 khz ? 25 c to +85 c ? 0.10 ? 0.15 +0.10 +0.15 4 gain tracking +3 dbm to ? 55 dbm 0 c to +70 c relative to 0 dbm ? 25 c to +85 c ? 0.10 ? 0.15 +0.10 +0.15 4 note: * performance grade
slic products 7 gain tracking on hook, r lac = 900 ? 0 dbm to ? 37 dbm 0 c to +70 c ? 25 c to +85 c +3 dbm to 0 dbm ? 0.10 ? 0.15 ? 0.35 +0.10 +0.15 +0.35 db ? 4 ? group delay 0 dbm, 1 khz 4 s 4, 7 line characteristics i l , short loops, active state r ldc = 900 ? 20 23 26 ma i l , long loops, active state r ldc = 1600 ? , bat = ? 42.75 v, t a = 25 c18 22 i l , accuracy, standby state t a = 25 c 0.7i l i l 1.3i l constant-current region 18 30 i l , loop current, disconnect state r l = 0 100 a i l lim active, a and b to gnd 80 120 ma vdc accuracy r l = 300 ? r l = 900 ? 0.300 0.920 0.350 1.050 0.400 1.18 v v ab , open circuit voltage v bat = ? 52 v ? 42.75 ? 46 power supply rejection ratio (v ripple = 100 mvrms), active normal state v cc 50 hz to 3400 hz 500 hz to 3000 hz 30 35 50 db 5 v bat 50 hz to 3400 hz 500 hz to 3000 hz 28 40 50 v cc , on hook 50 hz to 3400 hz 30 50 v bat , on hook 50 hz to 100 hz 100 hz to 200 hz 200 hz to 300 hz 300 hz to 500 hz 500 hz to 1000 hz 1 khz to 3400 hz 4 9 16 24 30 34 8 14 24 28 34 40 4 control pin feed-through (c2 ? c1) 50 hz to 3400 hz 35 50 effective internal resistance cas pin to v bat 85 170 255 k ? power dissipation on hook, disconnect state 45 70 mw on hook, standby state 55 85 on hook, active state r tmg = 2500 ? 150 270 off hook, standby state r l = 600 ? 860 1200 off hook, active state r l = 300 ? , r tmg = 2500 ? 700 950 supply currents, battery = ? 48 v icc, on-hook v cc supply current disconnect state standby state active state 3.0 2.8 6.3 4.0 4.0 8.5 ma ibat, on-hook v bat supply current disconnect state standby state active state 0.6 0.8 2.8 1.0 1.5 4.8 rfi rejection rfi rejection 100 khz to 30 mhz, (see figure f) 1.0 mvrms 4 electrical characteristics (continued) description test conditions (see note 1) min typ max unit note i l bat 3 v ? r l 400 + ------------------------------ - =
8 am79486 data sheet receive summing node (rsn) rsn dc voltage i rsn = 0 ma 0 v 4 rsn impedance 200 hz to 3.4 khz 10 20 ? logic inputs (c2 ? c1, testin) v ih , input high voltage 2.0 v v il , input low voltage 0.8 i ih , input high current ? 75 40 a i il , input low current ? 400 ? 13 logic output (det ) v ol , output low voltage iout = 0.3 ma, 15 k ? to v cc 0.40 v v oh , output high voltage iout = ? 0.1 ma, 15 k ? to v cc iout = ? 10 a 2.4 0.7 v cc 0.97 v cc ring-trip detector input (da, db) bias current ? 20 ? 5na4 offset voltage source resistance = 2 m ? ? 50 0 +50 mv 6 offset voltage source resistance mismatch = 3 m ? ? 50 0 +50 4 relay driver output (ringout, testout) v oh , on voltage, ringout i ol = 40 ma +0.3 +0.7 v v oh , on voltage, testout i ol = 80 ma +0.4 +1.0 i ol , off leakage, ringout v oh = +5 v 0 100 a i ol , off leakage, testout v oh = +5 v 80 140 200 zener breakover i z = 300 a 5.7 7.2 v zener on voltage, ringout i z = 30 ma 8 zener on voltage, testout i z = 80 ma 8 loop detector r lth , loop-detect threshold resistance active state, r d = 35.4 k ? standby state, r d = 35.4 k ? rd/11.5 rd/15 rd/10.1 rd/12.6 rd/8.8 rd/10 ? 8 electrical characteristics (continued) description test conditions (see note 1) min typ max unit note
slic products 9 relay driver schematics notes: 1. unless otherwise noted, test conditions are bat = ? 52 v, v cc = +5 v, r l = 900 ? , r t = 225 k ? , rrx = 225 k ? , r dc1 = r dc2 = 27.17 k ? , r tmg = 2500 ? , rd = 35.4 k ? , no fuse resistors, chp = 0.1 f, c dc = 0.1 f, c cas = 0.1 f, d1 = 1n400x, bswen = logic low (0), (two-wire ac input impedance is a 900 ? ). 2. a. overload level is defined when thd = 1%. b. overload level is defined when thd = 1.5%. 3. balance return signal is the signal generated at v tx by v rx . this specification assumes that the two-wire ac load impedance matches the programmed impedance. 4. not tested in production. this parameter is guaranteed by characterization or correlation to other tests. 5. this parameter is tested at 1 khz in production. performance at other frequencies is guaranteed by characterization. 6. tested with 0 ? source impedance. 2 m ? is specified for system design only. 7. minimum current level guaranteed not to cause a false loop detect. 8. det goes high during loss of v bat supply. table 1. slic decoding state c2 c1 2-wire status det output 0 0 0 disconnect ring trip 1 0 1 ringing ring trip 2 1 0 active loop detector 3 1 1 standby loop detector ringout bgnd testout bgnd
10 am79486 data sheet table 2. user-programmable components z t is connected between the vtx and rsn pins. the fuse re- sistors are r f , and z 2win is the desired 2-wire ac input imped- ance. when computing z t , the internal current amplifier pole and any external stray capacitance between vtx and rsn must be taken into account. z rx is connected from v rx to r sn . z t is defined above, and g 42l is the desired receive gain. r dc1 , r dc2 , and c dc form the network connected to the rdc pin. r dc1 and r dc2 are approximately equal. i loop is the de- sired loop current in the constant-current region. for |v bat | > 40 v for |v bat | < 40 v r lth is the desired loop resistance detect threshold. i lth is the loop current at r lt h for a given battery. c cas is the regulator filter capacitor and f c is the desired filter cut-off frequency. standby loop current (resistive region). vdc scale factor = vdc scale factor valid for constant-current region. thermal management equations (normal active and tip open states) r tmg is connected from t mg to v bat and is used to limit power dissipation within the slic in active and disconnect states only. power dissipated in the thermal management resistor, r tmg , during active and disconnect states. power dissipated in the slic while in active and disconnect states. z t 250 z 2win 2r f ? () = z rx z l g 42l ----------- = 500 z t ? z t 250 z l 2r f + () + ------------------------------------------------- ? r dc1 r dc2 1250 i loop ------------- - = + c dc 1.5 =ms r dc1 r dc2 + r dc1 r dc2 ? ------------------------------- - ? rd active 10.1 =r lth ? rd standby 10 =r lth 400 + () 54 v bat 3 ? --------------------- ? rd active 375 i det ---------- - = rd standby 375 i det ---------- - = c cas 1 3.4 10 5 f c ? ----------------------------- = i standby v bat 3v ? 400 ? r l + ---------------------------- - = 63.4 r l ? r dc1 r dc2 + ------------------------------- - r tmg v bat 6v ? i loop --------------------------------- 70 ? ? p rtmg v bat 6v ? i l r l ? () ? () 2 r tmg 70 ? + () 2 ----------------------------------------------------------------------- r tmg ? = p slic v bat i l p rtmg ? r l i l () 2 0.12 w + ? ? =
slic products 11 dc feed characteristics 0 0 i (ma) vab (volts) 30 60 1 2 3 l 1. where 2. 3. v ab i = l r l 1250 rdc ------------ - r l , ' = ' r l r l 2r f + = ' v ab v bat =3.3 ? i l rdc 300 ------------ - ? v ab v bat 5.5 ? i l rdc 300 ------------ - ? = a. load line (typical) r dc = r dc1 + r dc2 = 54.34 k ? bat = ? 48 v a b i l rsn rdc r dc1 r dc2 c dc slic r l a b feed current programmed by r dc1 and r dc2 b. feed programming figure 1. dc feed characteristics
12 am79486 data sheet test circuits r t r rx v ab v l r l 2 i l2-4 = 20 log (v tx / v ab ) a. two- to four-wire insertion loss a(tip) b(ring) agnd vtx rsn slic r t v ab a(tip) b(ring) agnd vtx rsn slic r l r rx v rx i l4-2 = 20 log (v ab / v rx ) brs = 20 log (v tx / v rx ) b. four- to two-wire insertion loss and balance return signal r t r rx r l 2 r l 2 v rx s1 c s2 v l v l a(tip) b(ring) agnd vtx rsn slic 1 c << r l l-4 long. bal. = 20 log (v tx / v l ) l-t long. bal. = 20 log (v ab / v l ) 4-l long. sig. gen. = 20 log (v l / v rx ) c. longitudinal balance r l 2 v ab s2 open, s1 closed s2 closed, s1 open
slic products 13 test circuits (continued) d. two-wire return loss test circuit r r return loss = ? 20 log (2 v m / v s ) z d : the desired impedance; e.g., the characteristic impedance of the line v m z in v s a(tip) b(ring) agnd vtx rsn slic rrx r t z d e. rfi test circuit 50 ? l 1 200 ? 200 ? c 1 c 2 b hf gen vtx a slic under test l 2 cax 33 nf cbx 33 nf r f1 r f2 50 ? 50 ? 1.5 vrms 80% amplitude modulated 100 khz to 30 mhz
14 am79486 data sheet test circuits (continued) f. am79486 test circuit vcc r d rd vtx agnd/ dgnd rsn r rx r dc2 r dc1 c dc r t rdc det vdc +5 v vbat d 1 bgnd ringout hpb c hp hpa db da a(tip) b(ring) cas c cas bat 2.2 nf 2.2 nf v tx v rx a(tip) b(ring) testout c1 tmg r tmg testin c2 vbref battery ground analog ground digital ground
slic products 15 physical dimensions pl032 revision summary revision a to revision b ? minor changes were made to the data sheet style and format to conform to legerity standards. ? absolute maximum ratings: added esd immunity specification revision b to revision c ? the physical dimensions (pl032) were added to the physical dimensions section. ? updated the pin description table to correct inconsistencies. .050 ref. .026 .032 top view pin 1 i.d. .485 .495 .447 .453 .585 .595 .547 .553 16-038fpo-5 pl 032 da79 6-28-94 ae side view seating plane .125 .140 .009 .015 .080 .095 .042 .056 .013 .021 .400 ref. .490 .530
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