triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 1 dc-18ghz mpa with agc TGA1328-SCC oc-192 12.5gb/s ln/mz driver and receive agc applic ations key features and performance ? 0.5um phemt technology ? dc - 14ghz linear bandwidth ? dc -18ghz saturated power bw ? 16db small signal gain ? 6db agc range ? 20ps edge rates (20/80) ? 8vpp 12.5gb/s nrz prbs ? 4db noise figure @ 10ghz ? low power dissipation ? chip dimensions 3.4mm x 2.3mm primary applications ? 12.5gbit oc192 ln/mz driver ? 12.5gbit oc192 agc receive description the triquint TGA1328-SCC is a medium power wideband agc amplifier that typically provides 12db saturated gain with 6db agc range. typical input a nd output return loss is >10db. typical noise figure is 2.5db at 3ghz. minimum saturated output power is 25dbm. small signal bw is near 14ghz with saturate d power performance to 18ghz. rf ports are dc couple d enabling the user to customize system corner frequencies. the TGA1328-SCC is an excellent choice for 9.9, 10. 7, and 12.5gb/s nrz applications driving a lithium nio bate optical modulator with electrical non-return-to-zer o (nrz) data. in addition it may be used as a receiv e agc amplifier. drain bias may be applied thru the on-chip drain termination resistor for low drive applications or thru the rf output port for high drive applications. the TGA1328-SCC requires off-chip decoupling and blocking components. each device is 100% dc and rf tested on-wafer to ensure performance compliance. the tga1328scc is available in chip form or assembl ed into a surface mount package (see the tga8652-epu data sheet for more information on the smt package) . february 14, 2008 12.5 gb/s eye: 8v(amp) ** measured 12.5gb/s performance ** input 12.5gb/s data stream generated using an anritsu ppg (vin=2vpp). 12.5gb/s nrz 2^31-1 single stage
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 2 symbol parameter 6/ value notes v + vd(fet) positive supply voltage biased thru on-chip drain termination biased thru the rf output port using a bias tee 12 v 10 v i + id positive supply current biased thru on-chip drain termination biased thru the rf output port using a bias tee 110 ma 250 ma 1/ p d power dissipation 2.25 w 2/ vg ig negative gate voltage gate current 0v to -3v 5 ma vctl ictl control gate voltage gate current vd/2 to -3v 5 ma 3/ p in v in rf input sinusoidal continuous wave power 12.5gb/s prbs input voltage peak to peak 23 dbm 5 vpp t ch operating channel temperature 150 0 c 4/ 5/ t m mounting temperature (30 seconds) 320 0 c t stg storage temperature -65 to 150 0 c TGA1328-SCC notes: 1 / assure that the combination of vd and id does no t exceed the maximum power dissipation rating. 2 / when operated at this bias condition with a base plate temperature of 70 0 c, the median life is reduced from >1e8 to 2.4e6 hours. 3 / assure that vctl never exceeds vd during bias up and down sequences. also, assure that vctl never ex ceeds 1.5v during normal operation. 4 / these ratings apply to each individual fet. 5 / junction operating temperature will directly aff ect the device median time to failure (mttf). for maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 6 / these ratings represent the maximum operable val ues for the device. maximum ratings
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 3 parameter test condition p diss (w ) t base ( c) t ch ( c) r ? jc ( c/w) mttf (hrs) vd(fet)=6.5v, vctl=1v id=170ma +/-5% 1.1 70 103 30 >1e7 r jc thermal resistance (channel to backside of carrier) v+ = 8 v**, v ctrl = 1.5 v, id = 80 ma 5% 0.36 70 80 29 >1e8 thermal information* dc specifications (100%) (t a = 25 c + 5 c) notes: * based on a detailed thermal model. assumes w orst case power dissipation condition where no rf is applied at the input (no power is di ssipated in the load). ** when applying drain bias at v+, several volts a re dropped across the internal drain terminations resistor (between v+ and vd). for id= 80ma, approximately 3.5v is dropped across the drain termination resistor making vd(fet )=4.5v. total power dissipation in the fet is .36 watts. TGA1328-SCC notes symbol test conditions limits units 2/ min max i dss std 110 516 ma i max std infor. only infor. only ma gm std 241 581 ms 1/ |v p1 | std 0.5 1.5 v 1/ |v p2 | std 0.5 1.5 v 1/ |v bvgd | std 13 30 v 1/ |v bvgs | std 13 30 v r1,2 std 30 45 ohm r4 std 35 56 ohm 1/ v p , v bvgd , and v bvgs are negative. 2/ the measurement conditions are subject to change at the manufacture?s discretion
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 4 TGA1328-SCC rf specifications (t a = 25 c + 5 c) note test measurement conditions value units min typ max 3db bandwidth 14 ghz saturated power bw 18 ghz 1/, 2 / small-signal gain magnitude 2 and 4 ghz 6 ghz 10 ghz 14 ghz 18 ghz 16 15 14 13 11 db small signal agc range midband 6 db noise figure 3ghz 2.5 db saturated output voltage (eye amplitude) vin=2vpp at 12.5gb/s prbs 8 vpp 1/, 3 / output power @ pin = 14dbm 2, 4, and 6 ghz 25 dbm input return loss magnitude dc-10 ghz -12 db output return loss magnitude dc-10 ghz -12 db additive jitter < 2 ps group delay dc-10 ghz +/- 20 ps rise time < 30 ps notes: 1 / verified at rf on-wafer probe. 2 / s21bias: v+=8v, adjust vg1 to achieve id=80ma+/-5 %, vg2=1.5v note: drain bias is applied thru the on-chip drain termination resistor. 3 / power bias: vtee=8v, adjust vg1 to achieve id=175 ma+/-5%, vg2=1.5v note: drain bias is applied thru the rf output port using a bias tee, voltage is at the dc input to th e bias tee.
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 5 TGA1328-SCC 0 2 4 6 8 10 12 14 16 18 20 2 4 6 8 10 12 14 16 18 20 frequency (ghz) s21 (db) -45 -40 -35 -30 -25 -20 -15 -10 -5 0 2 4 6 8 10 12 14 16 18 20 frequency (ghz) s11 (db) and s22 (db) s11 s22 tga1328 typical measured s-parameters
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 6 tga1328 typical measured noise figure 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 frequency (ghz) noise figure (db) TGA1328-SCC 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 frequency (ghz) noise figure (db) high bias: vd = 8v, idq = 175ma, vg2 = +1.5v low bias: vd = 4.5v, idq = 80ma, vg2 = +1.5v
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 7 TGA1328-SCC 10gbit/s performance output = 8v p-p, input = 2v p-p scale 2v/div, 20ps/div 10gbit/s performance output =6v p-p, input = 1v p-p scale 2v/div, 20ps/div measured performance 2 1?s and 2 0?s, 100ps/div 8 1?s and 8 0?s, 200ps/div 32 1?s and 32 0?s, 1ns/div 8v p-p (saturated) 6v p-p (near small signal) 8v p-p 6v p-p 2 1?s and 2 0?s, 100ps/div 8 1?s and 8 0?s, 200ps/div 32 1?s and 32 0?s, 1ns/div
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 8 TGA1328-SCC
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 9 TGA1328-SCC bias procedure 1) make sure no rf power is applied to the device b efore continuing. 2) pinch off device by setting vg to ?2.5v. 3) raise vd to 8.0v while monitoring drain current. current should be zero. note: vd bias should be applied to the rf output port via a bias tee for high power bias . 4) raise vctl to 1.0v (no greater than 1.5v). 5) make vg more positive until drain current reache s 170ma. (80 ma for low noise bias) 6) apply rf power. note vg supply must be capable of sinking 5ma of current. 1 2 5 4 7 rf in rfout and vd v+ vg vctrl (vctl) tga1328 note: drain bias must be applied at vd (pin 5) thru broadband bias tee for high bias mode. bypass caps must remain on pin 4 v(tee) designator description manufacture r part number c1 dc block, broadband presidio bb0502x7r104m16vnt9 820 c2, c5 1800 pf capacitor tantalum - - c3, c4, c6, c7, c8 0.01 uf capacitor mlc ceramic avx 0603yc103kat recommended components: c1 c2 c3 c5 c6 c8 c4 c7
triquint semiconductor texas: phone (972)994-8465 f ax (972)994-8504 email: info-mmw@tqs.com web: ww w.triquint.com product data sheet 10 gaas mmic devices are susceptible to damage from el ectrostatic discharge. proper precautions should be observed during handling, assembly and test. TGA1328-SCC recommend additional 0.01uf bypass cap located on vctrl supply line on test fixture 0.01uf vctrl reflow process assembly notes: ? use ausn (80/20) solder with limited exposure to te mperatures at or above 300 c. ? an alloy station or conveyor furnace with reducing atmosphere should be used. ? no fluxes should be utilized. ? coefficient of thermal expansion matching is critic al for long-term reliability. ? devices must be stored in a dry nitrogen atmosphere . component placement and adhesive attachment assembl y notes: ? vacuum pencils and/or vacuum collets are the prefer red method of pick up. ? air bridges must be avoided during placement. ? the force impact is critical during auto placement. ? organic attachment can be used in low-power applica tions. ? curing should be done in a convection oven; proper exhaust is a safety concern. ? microwave or radiant curing should not be used beca use of differential heating. ? coefficient of thermal expansion matching is critic al. interconnect process assembly notes: ? thermosonic ball bonding is the preferred interconn ect technique. ? force, time, and ultrasonics are critical parameter s. ? aluminum wire should not be used. ? discrete fet devices with small pad sizes should be bonded with 0.0007-inch wire. ? maximum stage temperature is 200 c.
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