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DG308B in 1 in 2 d 1 d 2 s 1 s 2 v v+ gnd nc s 4 s 3 d 4 d 3 in 4 in 3 dual-in-line, soic and tssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view DG308B/309b vishay siliconix document number: 70047 s-52896erev. e, 14-jul-97 www.vishay.com faxback 408-970-5600 4-1 improved quad cmos analog switches

22-v supply voltage rating cmos compatible logic low on-resistanceer ds(on) : 45 low leakageei d(on) : 20 pa single supply operation possible extended temperature range fast switchinget on : < 200 ns low glitchingeq: 1 pc wide analog signal range simple logic interface higher accuracy minimum transients reduced power consumption superior to dg308a/309 space savings (tssop) industrial instrumentation test equipment communications systems disk drives computer peripherals portable instruments sample-and-hold circuits

the DG308B/309b analog switches are highly improved versions of the industry-standard dg308a/309. these devices are fabricated in vishay siliconix' proprietary silicon gate cmos process, resulting in lower on-resistance, lower leakage, higher speed, and lower power consumption. these quad single-pole single-throw switches are designed for a wide variety of applications in telecommunications, instrumentation, process control, computer peripherals, etc. an improved charge injection compensation design minimizes switching transients. the DG308B and dg309b can handle up to 22-v input signals. an epitaxial layer prevents latchup. all devices feature true bi-directional performance in the on condition, and will block signals to the supply levels in the off condition. the DG308B is a normally open switch and the dg309b is a normally closed switch. (see truth table.)

logic DG308B dg309b 0 off on 1 on off logic a0o 3.5v logic a1o 11 v

temp range package part number 40 85 c 16 - pin plastic dip DG308Bdj 40 85 c 16 - pin plastic dip dg309bdj 40 to 85 c 16 - pin narrow soic DG308Bdy 40 to 85 c 16 - pin narrow soic dg309bdy 16 - pin tssop DG308Bdq 16 - pin tssop dg309bdq 55 125 c 16 pi c dip DG308Bak 55 to 125 c 16 - pin cerdip DG308Bak/883 55 to 125 c 16 - pin cerdip dg309bak dg309bak/883
DG308B/309b vishay siliconix www.vishay.com faxback 408-970-5600 4-2 document number: 70047 s-52896erev. e, 14-jul-97

voltages referenced to v v+ 44 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd 25 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital inputs a v s , v d (v) 2 v to (v+) +2 v . . . . . . . . . . . . . . . . . . . . . . . . . . or 30 ma, whichever occurs first current, any terminal 30 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . peak current, s or d (pulsed at 1 ms, 10% duty cycle max) 100 ma . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature (ak, suffix) 65 to 150 c . . . . . . . . . . . . . . . . . (dj, dy, dq suffix) 65 to 125 c . . . . . . . . . . power dissipation (package) b 16-pin plastic dip c 470 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-pin narrow soic and tssop d 640 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-pin cerdip e 900 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. signals on s x , d x , or in x exceeding v+ or v will be clamped by internal diodes. limit forward diode current to maximum current ratings. b. all leads welded or soldered to pc board. c. derate 6.5 mw/ c above 75 c d. derate 7.6 mw/ c above 75 c e. derate 12 mw/ c above 75 c test conditions unless specified a suffix 55 to 125 c d suffix 40 to 85 c parameter symbol v+ = 15 v, v = 15 v v in = 11 v, 3.5 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full v drain-source on-resistance r ds(on) v d = 10 v, i s = 1 ma room full 45 r ds(on) match r ds(on) ds room 2 source off leakage current i s(off) v s = 14 v, v d = 14 v room full 0.01 5 0.5 5 a drain off leakage current i d(off) v d = 14 v, v s = 14 v room full 0.01 5 0.5 5 na drain on leakage current i d(on) v s = v d = 14 v room full 0.02 0.5 10 0.5 10 digital control input voltage high v inh full v input voltage low v inl full v input current i inh or i inl v inh or v inl full a input capacitance c in room 5 pf dynamic characteristics turn-on time t on v s = 3 v , see figure 2 room ns turn-off time t off v s = 3 v , see figure 2 room ns charge injection q c l = 1000 pf, v g = 0 v, r g = 0 room 1 pc source-off capacitance c s(off) v s = 0 v , f = 1 mhz room 5 f drain-off capacitance c d(off) v s = 0 v , f = 1 mhz room 5 pf channel on capacitance c d(on) v d = v s = 0 v, f = 1 mhz room 16 off isolation oirr c l = 15 pf , r l = 50 room 90 db channel-to-channel crosstalk x talk c l = 15 pf , r l = 50 v s = 1 v rms , f = 100 khz room 95 db
DG308B/309b vishay siliconix document number: 70047 s-52896erev. e, 14-jul-97 www.vishay.com faxback 408-970-5600 4-3
test conditions unless specified a suffix 55 to 125 c d suffix 40 to 85 c parameter symbol v+ = 15 v, v = 15 v v in = 11 v, 3.5 v f temp b typ c min d max d min d max d unit power supply positive supply current i+ v in =0or15v room full 1 1 a negative supply current i v in = 0 or 15 v room full a power supply range for continuous operation v op full v

test conditions unless specified a suffix 55 to 125 c d suffix 40 to 85 c parameter symbol v+ = 12 v, v = 0 v v in = 11 v, 3.5 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full v drain-source on-resistance r ds(on) v d = 3 v, 8 v, i s = 1 ma room full 90 dynamic characteristics turn-on time t on v s = 8 v , see figure 2 room ns turn-off time t off v s = 8 v , see figure 2 room ns charge injection q c l = 1 nf, v gen = 6 v, r gen = 0 room 4 pc power supply positive supply current i+ v in =0or12v room full 1 1 a negative supply current i v in = 0 or 12 v room full a power supply range for continuous operation v op full v notes: a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function.
DG308B/309b vishay siliconix www.vishay.com faxback 408-970-5600 4-4 document number: 70047 s-52896erev. e, 14-jul-97
20 16 12 8 4 0 4 8 12 16 20 40 50 60 70 80 90 100 110 0 10 20 30 40 50 15 10 5 0 5 10 15 0246810121416 0 25 50 75 100 125 150 175 200 225 5 v r ds(on) vs. v d and power supply voltages v d drain voltage (v) 10 v 15 v 20 v r ds(on) vs. v d and temperature v d drain voltage (v) 125 c 85 c 25 c 55 c v+ = 15 v v = 15 v r ds(on) vs. v d and single power supply voltages v d drain voltage (v) 30 20 10 60 70 80 90 100 250 v+ = 5 v 7 v 10 v 12 v 15 v i d(on) 20 15 10 5 0 5 10 15 20 analog voltage leakage currents vs. analog voltage i s, i d current (pa) 55 25 45 5 15 65 35 85 105 125 v+ = 15 v v = 15 v v s, v d = 14 v i s(off) , i d(off) 1 na 10 pa 1 pa temperature ( c) 15 10 5 0 5 10 15 30 20 10 0 10 20 30 v+ = 15 v v = 15 v v+ = 12 v v = 0 v analog voltage (v) q charge (pc) q s, q d charge injection vs. analog voltage i s, i d current 100 pa leakage currents vs. temperature r ds(on) drain-source on-resistance ( ) r ds(on) drain-source on-resistance ( ) 40 30 20 10 0 10 20 30 40 i s(off) , i d(off) v+ = 22 v v = 22 v t a = 25 c r ds(on) drain-source on-resistance ( )
DG308B/309b vishay siliconix document number: 70047 s-52896erev. e, 14-jul-97 www.vishay.com faxback 408-970-5600 4-5 10 k 100 k 1 m 10 m 40 50 60 70 80 90 100 110 120 f frequency (hz) off isolation vs. frequency oirr (db) v+ = 15 v v = 15 v r l = 50
figure 1. d x s x v+ in x v level shift/ gnd v+ v drive figure 2. switching time 50% 0 v 12 v t off t on v o t r <20 ns t f <20 ns logic input switch output 90% c l 35 pf r l 1 k v o = v s r l + r ds(on) r l v s = +3 v v o v v+ in s d 12 v 15 v gnd +15 v
DG308B/309b vishay siliconix www.vishay.com faxback 408-970-5600 4-6 document number: 70047 s-52896erev. e, 14-jul-97
figure 3. off isolation s in 50 d r g = 50 v s v o 0v, 15 v off isolation = 20 log v s v o v+ 15 v gnd v c c +15 v in 1 0v, 15 v v o +15 v 15 v gnd v+ v nc x talk isolation = 20 log c v s c v o 0v, 15 v 50 v s s 1 in 2 s 2 r g = 50 d 1 d 2 c = rf bypass figure 4. channel-to-channel crosstalk 50 figure 5. charge injection c l 1000 pf v g 12 v d v+ v r g 15 v gnd in s v o +15 v v o v o in x on on off v o = measured voltage error due to charge injection the charge injection in coulombs is q = c l x v o gain = gain 1 (x1) gain 2 (x10) gain 3 (x100) gain 4 (x1000) 15 v +15 v 15 v gnd dg419 30 pf +15 v +15 v 15 v DG308B logic high = switch on + lm101a r f + r g r g v in1 v in2 ch r f1 18 k r f1 9.9 k r f1 100 k r g3 100 r g2 100 r g1 2 k v+ v gnd v +5 v v l figure 6. a precision amplifier with digitally programmable inputs and gains
DG308B/309b vishay siliconix document number: 70047 s-52896erev. e, 14-jul-97 www.vishay.com faxback 408-970-5600 4-7 lm101a +15 v 15 v 30 pf 15 v 15 v v+ v dg309b 50 pf 1000 pf j202 j500 j507 +15 v 2n4400 15 v v in v out 1 k 200 5 m 5.1 m aquisition time = 25 s aperature time = 1 s sample to hold offset = 5 mv droop rate = 5 mv/s logic input low = sample high = hold + figure 7. sample-and-hold ttl control 150 pf 1500 pf +15 v dg309b gnd 30 pf lm101a +15 v 15 v frequency hz 1 10 100 1 k 10 k 100 k 1 m 40 0 160 120 80 voltage gain db f c4 select f c3 select f c2 select f c1 select r 1 = 10 k r 2 = 10 k r 3 = 1 m v out v 1 v c 4 c 3 c 2 c 1 a l (voltage gain below break frequency) = = 100 (40 db) r 3 r 1 f c (break frequency) = 1 2 r 3 c x 1 2 r 1 c x f l (unity gain frequency) = max attenuation = r ds(on) 10 k 40 db 0.015 f 0.15 f 15 v + 40 figure 8. active low pass filter with digitally selected break frequency f c1 f c2 f c3 f c4 f l1 f l2 f l3 f l4

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