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  1/8 november 2002 n input voltage from 2.7v to 5.02v n stable with low esr ceramic and tantalum capacitors n very low quiescent current (30a typ. at no load; 2a in off mode) n guaranteed output current up to 15ma n output voltage: 1.5v n logic-controlled electronic shutdown n internal current limit n junction temperature range: -40c to 95c description the stc2g15 provides up to 15ma, from 2.5v to 6v input voltage. the low quiescent current make it suitable for low power applications and in battery powered systems. shutdown logic control function is available, this means that when the device is used as local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption. the stc2g15 is designed to work with low esr ceramic and tantalum capacitors. typical applications are in mobile phone, blue-tooth module and similar battery powered wireless systems. stc2g15 bcmos voltage regulator designed for use with very low esr and tantalium output capacitor schematic diagram sot23-5l
stc2g15 2/8 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition is not implied. thermal data application circuits connection diagram (top view) pin description symbol parameter value unit v i dc input voltage -0.3 to 5.4 v v o dc output voltage -0.3 to v in +0.3 v v inh inhibit input voltage -0.3 to v in +0.3 v i o output current internally limited p tot power dissipation internally limited t stg storage temperature range -55 to +150 c t op operating junction temperature range -40 to +95 c esd electrostatic discharge hbm (dh11c) 2 kv symbol parameter sot23-5l unit r thj-amb thermal resistance junction-ambient 225 c/w r thj-case thermal resistance junction-case 81 c/w pin n symbol name and function 1 in input pin 2 gnd ground pin 3 shdn shutdown input: disables the regulator when < 0.4v. not internally pulled down. 4 cmp compensation pin: bypass with a 1 m f ceramic x7r capacitor to gnd or leave floating if the c o is connected to out pin 5 out output pin: bypass with a 1 m f tantalium capacitor to gnd if ceramic x7r capacitoror is not used.
stc2g15 3/8 ordering codes electrical characteristics (c i =1 m f, c o =1 m f (tantalium connected between out pin and gnd pin) or c cmp =1 m f (ceramic x7r connected between cmp pin and gnd pin) (unless otherwise specified) note 1 :time for the output voltage to rise from 50% to 85% of nominal value. note 2 : time for the output voltage to fall from 85% to 50 of nominal value. note 3 : regulator must be able to sustain regulated output voltage without load. note 4 : parameters are uncritical as long as the output voltage stays within limits. note 5 : a sudden voltage rise/drop of 500mv mustn't bring the output voltage out of limits. note 6 : ceramic capacitors can be used if connected between cmp pin and gng, instead of v out pin and gnd. note 8 : maximum and minimum values are guaranteed in full temperature range. note 9 : line transient is tested when the input voltage changes from 2.7 to 3.2v in 10s in full load range. note 10 : line transient is tested when the input voltage changes from 3.2 to 2.7v in 10s in full load range. note 11 : load transient is tested when the load changes from 0.1 to 15ma in 10s in all the input range note 13 : response time is defined as the time form the load line step until the output reaches a value within specification (1.41v, 1.59v). note 14 : the maximum power dissipation for the operation depends on the ambient temperature. for t j =95c, t a =85c and r tja =220c/w the maximum power can be 0.045w. the maximum power dissipation for operation can be increased by 4.5mw each degree below t a =85c, and it must be derated by 4.5mw for each degree above 85c type sot23-5l output voltages stc2g15 STC2G15R 1.5v symbol parameter test conditions min. typ. max. unit v i input voltage 2.7 5.2 v v o output voltage v i = 2.7 to 5.2v i o = 0 to 15ma t j = -40 to 95 c 1.41 1.5 1.59 v t ru output voltage ramp-up time (note 1) i o = 0 to 15ma 10 15 m s t rd output voltage ramp-down time (note 2) i o = 0 to 15ma 10 15 m s i o current capability 15 ma i min minimum load current (note 3) 0ma load regulation (note 4) 350 m v/ma temperature drift (note 4) 100 m v/k svr supply voltage rejection (note 5) f = 1khz 30 db i d quiescent current (on mode) i o =0 30 m a i o =0 v i = 2.7 to 5.2v 60 m a i d quiescent current (off mode) 24 m a i shdn shutdown pin current 2 4 m a v shdn shutdown logic enable low 0.4 v v shdn shutdown logic disabled high 1.15 v line transient response time (notes 9, 13) 40 m s load transient response time (notes 10, 13) 50 m s line transient response peak + (notes 9) 80 mv line transient response peak - (notes 10) 60 mv load transient response peak (notes 11) 50 mv en output noise voltage b= 1khz to 1mhz c o =1 m f10mv
stc2g15 4/8 typical performance characteristics (unless otherwise specified c in =c comp =smdx5r c out = tant., t j = 25c) figure 1 : output voltage vs temperature figure 2 : output voltage vs temperature figure 3 : output voltage vs temperature figure 4 : output voltage vs temperature figure 5 : line regulation vs temperature figure 6 : load regulation vs temperature
stc2g15 5/8 figure 7 : inhibit threshold voltage vs temperature figure 8 : quiescent current vs temperature figure 9 : supply voltage rejection vs temperature figure 10 : supply voltage rejection vs output current figure 11 : dynamic precharge mode figure 12 : dynamic precharge mode v i =5 v , i o = 0 . 1 to 1 5m a , c i = 1 m fsmd x 7 r , c o = 2 . 2 m f( tant ) v i = 2 .7 to 3 .7 v , i o = 1 5m a , c i = 1 m fsmd x 7 r , c o = 2 . 2 m f( tant ) , t=1ms
stc2g15 6/8 figure 13 : dynamic precharge mode figure 14 : dynamic precharge mode figure 15 : dynamic precharge mode v inh = 0 to 2v , n o l oa d , c i = 1 m fsmd x 7 r , c o = 2 . 2 m f( tant ) v inh = 0t o 2v , i o = 15 m a , c i = 1 m fsmd x7r , c o = 2 . 2 m f(t an t) v inh = 0 to 2v , i o = 1 5m a , c i = 1 m fsmd x 7 r , c o = 1 m f( tant )
stc2g15 7/8 dim. mm. mils min. typ max. min. typ. max. a 0.90 1.45 35.4 57.1 a1 0.00 0.15 0.0 5.9 a2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 c 0.09 0.20 3.5 7.8 d 2.80 3.00 110.2 118.1 e 2.60 3.00 102.3 118.1 e1 1.50 1.75 59.0 68.8 e.95 37.4 e1 1.9 74.8 l 0.35 0.55 13.7 21.6 sot23-5l mechanical data 0
stc2g15 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com


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