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04-14-00 kc original release o date revisions approved description rev zone 17 serial & test connectors,user leds,& dip switches 16 mictor connectors 15 memory, upper data bus 14 memory, lower data bus 13 cpld control logic & buffers 12 mmc2107 mcu: adc, serial,& timer 11 once port, clock, and reset 10 mmc2107 mcu: data, address, control,& edge 9 decoupling 8 power supply 7 mapi test points 6 mapi j4/p4 5 mapi p3/j3 4 mapi p2/j2 3 mapi p1/j1 notes 2 table of contents drawing last_modified=tue apr 18 09:19:30 2000 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. metrowerks does not assume any to any products herein to improve make changes without further notice metrowerks reserves the right to product engineer: project lead: or circuit described herein. application or use of any product liability arising out of the reliability, function, or design. date: date: designed by: date: drawn by: date: title: 9801 metric blvd austin, texas 78758 usa metrowerks systems engineering 63are10031s 63are10031s o o sch_1 sch_1 1 of 17 kevin cheney kevin cheney carlos blanco mmc2107 cmb/evb schematic 04-14-00 04-14-00 04-14-00 04-14-00 john dumas/kevin cheney f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
p3_3v 0.01uf c125 gnd r96 1k j34 nopop j35 nopop j33 nopop 0.01uf c117 gnd r97 0 p3_3v p3_3v cr3 cmdsh r95 0 j32 nopop j31 nopop cr2 cmdsh j29 nopop gnd j30 nopop gnd 0.01uf c128 xtal extal vddsyn vsssyn vddf vpp vssf reset_b int2_b/pstat0 int3_b/pstat1 int4_b/pstat2 int5_b/pstat3 int6_b/tsiz0 int7_b/tsiz1 int1_b int0_b r/w_b clkout rstout_b test vstby tclk tdi tdo trst_b tms de_b oe_b d31/pa7 d30/pa6 d29/pa5 d28/pa4 d27/pa3 d26/pa2 d25/pa1 d24/pa0 d23/pb7 d22/pb6 d21/pb5 d20/pb4 d19/pb3 d18/pb2 d17/pb1 d16/pb0 d15/pc7 d13/pc5 d12/pc4 d11/pc3 d10/pc2 d9/pc1 d8/pc0 d7/pd7 d6/pd6 d5/pd5 d4/pd4 d3/pd3 d2/pd2 d1/pd1 d0/pd0 d14/pc6 tc2 tc1 tc0 eb3_b eb2_b eb1_b eb0_b a22 a21 a20 a19 a18 a17 a16 a15 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 cse1 cse0 ta_b/pe6 tea_b/pe5 a14 shs_b/pe7 cs3_b cs2_b cs1_b cs0_b vss=gnd vdd=mcu3_3v xmc2107cfcpv_skt u10 0.1uf c124 0.1uf c118 0.1uf c119 r114 10.0k r121 10.0k r122 10.0k r125 10.0k gnd r126 10.0k r127 10.0k r129 10.0k r128 10.0k j37 hdr2 j36 hdr2 j38 hdr2 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:21 2000 nopop nopop 60 62 96 98 100 101 133 135 138 130 143 142 128 73 87 74 63 126 123 124 144 1 2 3 4 5 7 10 12 15 16 17 20 21 22 25 27 30 31 34 35 36 37 38 39 40 41 42 43 46 48 51 81 83 85 86 59 99 95 102 125 120 118 97 92 67 78 80 89 88 84 82 79 75 72 71 116 117 119 121 122 131 132 134 136 137 139 6 11 13 14 23 24 26 28 29 47 49 50 11 1 1 111 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 12 12 1 2 1 2 1 2 2 1 2 1 2 1 63are10031s 63are10031s o o 10 of 17 data<15..0> data<31..16> data<16> data<18> data<17> data<20> data<21> data<19> data<23> data<22> data<25> data<26> data<24> data<27> data<28> data<29> data<31> data<30> data<0> data<1> data<3> data<4> data<2> data<5> data<6> data<9> data<7> data<8> data<10> data<11> data<12> data<14> data<13> data<15> test cse0 cse1 addr<22> addr<20> addr<21> addr<18> addr<19> addr<17> addr<16> addr<15> addr<14> addr<12> addr<13> addr<10> addr<11> addr<9> addr<8> addr<7> addr<6> addr<5> addr<4> addr<3> addr<2> addr<0> addr<1> oe_b ta_b shs_b tea_b eba_b ebb_b ebc_b ebd_b once_tdi once_tdo once_tms once_tclk once_de_b once_trst_b clk_out clk_out rstout_b rstout_b vstby tc<2> tc<0> tc<1> int_b<7> int_b<6> r_w_b cs_b<3> cs_b<2> cs_b<1> cs_b<0> reset_b reset_b vddf flash_vpp flash_vpp vsssyn vsssyn vddsyn vddsyn osc_mcu osc_mcu xtal vstbx vsb_ext cs_b<10..0> eb_bus once_bus ctl_bus addr<31..0> tc_bus int_bus xtal mmc2107 mcu: data, address, control,& edge sch_1 sch_1 int_b<5> int_b<4> int_b<3> int_b<2> int_b<1> int_b<0> 6d4<> 14d1<> 16d4<> 6d4<> 15d1<> 16d4<> 6b4< 10b1> 13c4< 16c4< 5b4< 10b1> 13c4< 16a1< 5b4<> 10b4<> 11d1> 14a4< 15a4< 16a4< 8a1> 10b4< 8a1> 10b4< 10b4< 11a1< 10b4< 11c1< 10b4< 11b1> 6a4< 13b1< 13d4< 16c4< 6b4< 13c4< 16b1< 5a4<> 11d4<> 5b4<> 6a4<> 13c1<> 13d4< 16d4<> 6d4< 13d4< 16c4< 3a4> 13b1> 16b1< 17b4<> 10b4< 11a1< f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
gnd r99 1k j7 smt-ra r110 0 r111 0 rst3_3_b rst5_b vin5 tol5 pbrst_b vin3_3 tol3_3 gnd=4 gnd=gnd ds1834 u5 p5v out vdd oe gnd 32mhz y2 sg8002 gnd p3_3v c11 4.7uf 0.01uf c135 1uh l4 1uh l3 c21 4.7uf 0.01uf c144 r112 1.00m j39 hdr2 p3_3v r113 0 r119 0 j40 nopop j41 nopop r123 0 j44 nopop j45 nopop j47 nopop j46 nopop r120 0 j24 nopop j25 nopop r86 1k r87 1k 10pf c146 y1 8.0mhz 10pf c147 0.1uf c145 0.1uf c134 r118 10.0k r104 10.0k r100 10.0k r103 10.0k r105 10.0k j50 nopop j49 nopop s3 spst 0.01uf c152 0.1uf c153 0.01uf c88 0.1uf c87 gnd gnd p3_3v gnd p3_3v gnd c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:22 2000 nopop nopop nopop ext clk input nopop ext clk from mapi vddsyn is a power plane vsssyn is a power plane nopop disable osc option key once nopop 2a 1a 4 3 1 2 1 5 3 8 6 7 2 4 1 5 7 2 4 8 10 14 11 3 9 13 12 6 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 12 1 2 1 2 12 1 2 12 12 12 12 2 1 2 1 2 1 63are10031s 63are10031s o o 11 of 17 once_tdi xcndt rst_5v vsssyn vddsyn_iso reset_b once_tclk once_tdo once_de_b once_trst_b once_bus extal xtal osc_mcu vddsyn reset_b pshbtn_b sch_1 sch_1 once port, clock, and reset ext_clk nc_5 nc_3 nc_4 once_tms 10b4< 5a4<> 10c1<> 5b4> 10b4< 10b4< 10b4< 5b4<> 10b4<> 14a4< 15a4< 16a4< f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
0.01uf c155 c26 4.7uf 1uh l2 1uh l1 c25 4.7uf 0.01uf c151 a b r10 0_ohm a b r11 0_ohm r124 0 j62 nopop agnd apwr p5v 0.068uf c148 0.068uf c150 0.068uf c138 0.068uf c140 0.068uf c142 0.068uf c149 0.068uf c143 0.068uf c141 0.068uf c139 0.068uf c133 j43 nopop j42 nopop agnd j52 berg gnd 0.01uf c129 c10 4.7uf p5v gnd p3_3v 0.1uf c127 0.1uf c123 0.1uf c112 0.1uf c114 0.1uf c113 0.1uf c131 0.1uf c132 j26 nopop r93 0 j27 nopop 0.01uf c109 0.01uf c116 0.01uf c122 0.01uf c136 0.01uf c126 0.01uf c137 0.01uf c111 0.01uf c110 0.1uf c115 c6 33uf icoc20 vddh vdda vssa ss_b sck mosi txd2 rxd2 txd1 rxd1 miso vss:8,18,32,44,64,76,127,140 vdd:9,19,33,45,65,77,129,141 pqb1 pqa0 pqa1 pqa3 pqa4 pqb0 vrl vrh pqb2 pqb3 icoc22 icoc21 icoc13 icoc12 icoc11 icoc10 icoc23 xmc2107cfcpv_skt u10 vss=gnd vdd=mcu3_3v 0.1uf c130 0.1uf c156 0.1uf c154 j28 hdr2 j48 hdr2 gnd drawing last_modified=tue apr 18 09:21:23 2000 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. nopop nopop nopop 2 4 8 5 7 14 16 20 19 15 11 3 9 13 17 18 6 12 1 10 3 2 1 3 2 1 103 113 112 69 70 68 66 114 115 104 105 106 107 52 53 54 55 56 57 58 61 108 109 110 111 94 91 93 90 11 1 11 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 12 12 12 12 2 1 2 1 63are10031s 63are10031s o o 12 of 17 mapivrl mapivrh mapivrl mapivrh vrl vrh vrl vrh vrl vrh pqa<0> pqa<0> pqa<1> pqa<3> pqa<4> pqb<0> pqb<1> pqb<2> pqb<3> pqa<1> pqa<3> pqa<4> pqb<0> pqb<1> pqb<2> pqb<3> pqb<3> pqb<2> pqb<1> pqb<0> vdda pqa<0> pqa<1> pqa<3> pqa<4> icoc2<3> icoc2<2> icoc2<1> icoc2<0> icoc1<3> icoc1<2> icoc1<0> icoc1<1> timer_bus sci2_in sci2_out sci1_out sci1_in miso mosi ss_b sck serial_bus vddh mcu3_3v adc_bus mmc2107 mcu: adc, serial,& timer sch_1 sch_1 13d4<> 17a4<> 3d4<> 4b1<> 17a4<> 3d4<> 4a1<> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
p3_3v gnd a b r4 0_ohm a b r3 0_ohm a b r1 0_ohm custom pqfp body only ebv_b ebx_b ebw_b eby_b eba_b ebb_b ebc_b ebd_b rin1 rin2 rin3 rin4 rin5 p110 ws_ram swap invert m0 m1 pad_st tc0 usr0 usr1 usr2 ck2 ck1 ck0 tc1 tc2 cs0_b cs1_b gts1 gsr oe_b r/w tsiz1 tsiz0 gts2 gck1 gck3 gts3 gts4 osc_in tdi tms tck tdo p66 p62 p38 p70 p127 p85 p112 p154 a28 a30 a31 a29 a25 a26 a27 clk_out rstout_b a24 boot_ext port_sz rcon_enab cpld_enab ws_flsh gnd:2,13,24,27,42,52,68,81, vccio:1,26,53,65,79,92,105 vccint:11,59,124,153,204 156,163,177,190,207 ba0 93,104,108,129,130,141, 132,157,172,181,184 ba7 ba6 ba5 ba8 ba9 ba3 ba2 ba4 ba1 ba10 ba16 ba15 ba13 ba18 ba19 ba14 ba12 ba17 ba11 ba20 ba25 ba28 ba30 ba29 ba23 ba24 ba22 ba26 ba27 ba21 res_out1 res_out3 res_out2 ba31 shs_b ta_b bb2_dir vddsyn bb3_dir bb1a_dir bb1b_dir md18 md19 md17 md16 md20 md30 md29 md28 md27 md26 md22 md24 md25 md23 md21 md31 br_w boe_b p23 p43 a23 a22 a21 a20 a19 a18 a17 a14 a15 a16 a13 a11 a12 a10 a9 a7 a8 a6 a5 a4 a3 a2 a1 a0 ramb_b rama_b flshb_b flsha_b tea_b cse1 cse0 devsp_b progv_b led3_b led2_b led1_b led0_b bb3_e_b bb2_e_b bb1_e_b xc95288xl-6pq208c gnd=gnd vccio=p3_3v u1 vccint=p3_3v gnd r71 1k r78 1k r79 1k p3_3v r60 1k p3_3v gnd r72 1k r73 1k r56 1k r57 1k r62 1k r63 1k r70 1k hdr8_1 j6 r51 10.0k r50 10.0k r81 10.0k r66 10.0k r52 10.0k r67 10.0k r75 10.0k r59 10.0k r61 10.0k r58 10.0k a b r6 0_ohm a b r2 0_ohm a b r5 0_ohm c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:25 2000 could be connected in place of addr<31..28> note: if needed, any of the chip selects cs_b<5..2) jtag (cpld) 3 4 8 6 2 5 7 1 50 16 60 7 75 128 71 56 110 136 98 133 143 102 64 76 73 86 95 91 137 194 187 201 197 138 186 9 99 109 3 5 97 77 123 74 55 183 29 205 151 192 140 203 117 87 90 54 49 66 131 62 144 38 171 70 202 85 196 127 189 112 154 43 23 46 101 58 200 175 198 193 169 179 173 180 182 166 162 160 188 174 167 199 178 161 165 147 159 185 168 150 158 135 195 164 170 191 33 32 31 30 28 25 20 19 18 17 14 12 10 8 6 4 21 22 94 176 96 103 120 44 106 107 67 83 48 149 61 51 45 57 47 122 115 114 69 41 34 134 145 84 111 100 139 89 155 35 116 125 121 126 37 152 80 208 36 82 40 72 146 39 148 78 118 15 206 113 119 88 63 142 3 2 1 3 2 1 3 2 1 3 2 1 3 2 1 3 2 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 63are10031s 63are10031s o o 13 of 17 addr<29> addr<28> cpld control logic & buffers sch_1 sch_1 tc<2..0> addr<30> addr<31> tms tms tck tck tdo tdo tdi tdi clk_out clk_out cs_b<3> cs_b<2> cs_b<10..0> ba<21..0> ba<0> ba<9> ba<2> ba<1> ba<3> ba<4> ba<6> ba<7> ba<8> ba<5> ba<12> ba<15> ba<10> ba<13> ba<19> ba<16> ba<14> ba<18> ba<11> ba<17> ba<20> ba<21> nc_2 nc_1 icoc1<3> timer_bus icoc1<1> icoc1<2> icoc1<0> icoc2<3> icoc2<2> icoc2<1> icoc2<0> ctl_bus cs_b<10..0> led0_b led0_b ctl_bus md<31..16> int_bus shs_b ta_b tea_b oe_b r_w_b int_b<7> int_b<6> int_b<5> int_b<4> int_b<3> int_b<2> int_b<1> int_b<0> cs_b<0> eb_bus tc<2> cs_b<1> tc<1> tc<0> md<31> eba_b ebd_b ebb_b ebc_b addr<26> rstout_b rstout_b invert addr<0> addr<1> addr<2> addr<3> addr<4> addr<5> addr<6> addr<7> addr<8> addr<9> addr<10> addr<11> addr<12> addr<13> addr<14> addr<15> addr<16> addr<17> addr<18> addr<19> addr<20> addr<21> addr<22> addr<23> addr<24> addr<25> addr<27> md<29> md<30> md<28> md<27> md<26> md<25> md<24> md<22> md<23> md<21> md<19> md<20> md<18> md<16> md<17> cse1 cse0 ck1 ck2 ck0 rcon_enab pad_str gck3 gck1 gts4 gts3 gts2 gts1 gsr nc_12 nc_11 nc_10 nc_9 nc_8 nc_7 addr<31..0> ext_clk ext_clk ramb_b ramb_b flsha_b flsha_b rama_b rama_b flshb_b flshb_b eby_b eby_b ebx_b ebx_b ebv_b ebv_b ebw_b ebw_b boe_b boe_b br_w br_w bb1a_dir bb1a_dir bb1_e_b bb1_e_b bb2_e_b bb2_e_b bb1b_dir bb1b_dir bb3_dir bb3_dir bb2_dir bb2_dir bb3_e_b bb3_e_b progv_b progv_b devsp_b<0> devsp_b<0> led3_b led3_b led2_b led2_b led1_b led1_b m1 m1 m0 m0 boot_ext boot_ext port_sz port_sz swap swap ws_ram ws_flsh cpld_enab p110 rin1 rin2 rin3 rin4 rin5 usr0 usr0 usr2 usr2 usr1 usr1 5d1> 16b4<> 6b4< 10b1> 13c4< 16c4< 6b4< 10b1> 13c4< 16c4< 6a4< 10d1> 13d4< 16c4< 14d4< 15d4< 12c1< 17a4<> 5b4<> 6a4<> 10d1> 13c1<> 16d4<> 6a4< 10d1> 13b1< 16c4< 13a1> 17b4< 13a1> 17b4< 5b4<> 6a4<> 10d1> 13d4< 16d4<> 15c1<> 3a4> 10c4<> 16b1< 17b4<> 6b4< 10d1> 16b1< 5b4< 10b1> 13c4< 16a1< 5b4< 10b1> 13c4< 16a1< 6d4< 10d1> 16c4< 13c4< 13c4< 13d1> 14d4< 15d4< 13d1> 15a4< 13d1> 15a4< 13d1> 14b4< 15b4< 13d1> 14b4< 15b4< 13d1> 14a4< 13d1> 14a4< 13d1> 15c4< 16a1< 13d1> 15c4< 16a1< 13d1> 15c4< 16a1< 13d1> 14d4< 16a1< 13d1> 14d4< 16a1< 13d1> 14d4< 16a1< 13d1> 14c4< 15a4< 13d1> 14c4< 15a4< 13d1> 14c4< 15a4< 13c1> 15a4< 13c1> 15a4< 13c1> 15a4< 13c1> 15a4< 13c1> 14a4< 13c1> 14a4< 13c1> 15a4< 13c1> 15a4< 13c1> 15a4< 13c1> 15a4< 13c1> 14a4< 13c1> 14a4< 13c1> 15a4< 13c1> 15a4< 8a4> 13b1> 8a4> 13b1> 3b4> 13b1> 16b1< 3b4> 13b1> 16b1< 13a1> 17b4< 13a1> 17b4< 13a1> 17b4< 13a1> 17b4< 13a1> 17b4< 13a1> 17b4< 13b4< 17b1> 13b4< 17a1> 13b4< 17a1> 13b4< 17a1> 13b4< 17a1> 13b4< 17b1> 13b4< 17b1> 13b4< 17b1> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
we oe cs ub a<17> lb a<5> a<4> a<3> a<2> a<1> a<0> a<6> a<13> a<14> a<15> a<16> a<12> a<7> a<10> a<11> a<9> a<8> nc:28 vss:34,12 vdd:33,11 dq<3> dq<2> dq<1> dq<0> dq<4> dq<15> dq<14> dq<13> dq<12> dq<5> dq<6> dq<7> dq<8> dq<11> dq<9> dq<10> vss=gnd vdd=p3_3v u6 mcm6343ts we oe cs ub a<17> lb a<5> a<4> a<3> a<2> a<1> a<0> a<6> a<13> a<14> a<15> a<16> a<12> a<7> a<10> a<11> a<9> a<8> nc:28 vss:34,12 vdd:33,11 dq<3> dq<2> dq<1> dq<0> dq<4> dq<15> dq<14> dq<13> dq<12> dq<5> dq<6> dq<7> dq<8> dq<11> dq<9> dq<10> vss=gnd vdd=p3_3v u14 mcm6343ts dir2 dir1 oe2 oe1 gnd:10,4 gnd:28,21,15, gnd:45,39,34, vcc:42,31,18,7 b2<1> b2<2> b2<3> b2<4> b2<5> b2<6> b2<7> b2<8> a2<1> a2<2> a2<3> a2<4> a2<5> a2<6> a2<7> a2<8> a1<6> a1<7> a1<8> b1<8> b1<7> b1<6> a1<5> b1<5> a1<2> a1<3> a1<4> a1<1> b1<1> b1<2> b1<3> b1<4> u4 alvch16245 gnd=gnd vcc=p3_3v p3_3v p3_3v p3_3v r85 10.0k r88 10.0k r92 10.0k r106 10.0k r90 10.0k r94 10.0k r91 10.0k dq15/a-1 dq<0> dq<1> dq<3> dq<4> dq<5> dq<6> dq<7> dq<8> dq<14> dq<13> dq<12> dq<11> dq<9> dq<10> a<13> a<12> a<8> a<9> a<7> a<6> a<5> a<4> a<3> a<10> a<11> a<1> a<0> a<2> dq<2> ce reset byte a<14> a<15> a<16> a<17> a<18> a<19> we oe ry/by vss:27,46 nc:10,13,14 vcc:37 u8 vss=gnd vcc=p3_3v am29lv160bb90ec c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:26 2000 sram bank "b" sram bank "a" flash bank "b" note: sram is byte addressable only. addressable. flash is word bb2 bus buffer 12 15 45 11 28 26 47 43 41 39 36 34 32 30 44 42 40 38 35 33 31 29 9 16 17 48 1 2 3 4 5 6 7 8 18 19 20 21 22 23 24 25 24 25 48 1 23 22 20 19 17 16 14 13 12 11 9 8 6 5 3 2 37 38 40 41 43 44 46 47 26 27 29 30 32 33 35 36 39 40 41 17 6 38 37 36 35 32 31 30 29 16 15 14 13 10 9 8 7 44 43 42 27 26 25 24 23 22 21 20 19 18 5 4 3 2 1 39 40 41 17 6 38 37 36 35 32 31 30 29 16 15 14 13 10 9 8 7 44 43 42 27 26 25 24 23 22 21 20 19 18 5 4 3 2 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 63are10031s 63are10031s o o 14 of 17 memory, lower data bus sch_1 sch_1 rama_b ebw_b bb2_dir nc_1 md<15..0> md<15..0> data<15..0> ba<21..0> reset_b byte_b boe_b br_w md<15> ba<19> ba<19> md<15> md<14> md<13> md<12> md<11> md<10> md<9> md<8> md<7> md<6> md<5> md<4> md<3> md<2> md<1> md<0> md<0> ba<18> ba<17> ba<16> ba<15> ba<14> ba<13> ba<12> ba<11> ba<10> ba<9> ba<8> ba<7> ba<6> ba<5> ba<4> ba<3> ba<2> md<3> md<12> md<13> md<14> md<0> md<1> md<2> md<5> md<4> md<6> md<7> md<8> md<10> md<9> md<11> ba<18> ba<17> ba<16> ba<15> ba<14> ba<13> ba<12> ba<11> ba<10> ba<9> ba<8> ba<7> ba<6> ba<5> ba<4> ba<3> ba<2> ba<1> ba<0> md<1> md<2> md<3> md<4> md<5> md<6> md<7> data<0> data<1> data<2> data<3> data<4> data<5> data<6> data<7> ba<19> ba<18> ba<17> ba<16> ba<15> ba<14> ba<12> ba<13> ba<11> ba<10> ba<9> ba<7> ba<8> ba<6> ba<5> ba<4> ba<3> ba<2> md<15> md<14> md<13> md<12> md<10> md<11> md<9> md<8> md<7> md<6> md<5> md<4> md<3> md<2> md<1> md<0> data<11> data<12> data<9> data<13> data<10> data<8> data<14> data<15> md<9> md<10> md<8> md<12> md<11> md<14> md<15> md<13> ebv_b ramb_b flshb_b bb2_e_b 13d1> 15b4< 13d1> 16a1< 13c1> 14d1<> 15c1<> 14d1<> 15c1<> 6d4<> 10d4<> 16d4<> 13b1> 15d4< 5b4<> 10b4<> 11d1> 15a4< 16a4< 15a4< 13d1> 15a4< 13d1> 15a4< 13d1> 16a1< 13d1> 15d4< 13d1> 13c1> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
dq15/a-1 dq<0> dq<1> dq<3> dq<4> dq<5> dq<6> dq<7> dq<8> dq<14> dq<13> dq<12> dq<11> dq<9> dq<10> a<13> a<12> a<8> a<9> a<7> a<6> a<5> a<4> a<3> a<10> a<11> a<1> a<0> a<2> dq<2> ce reset byte a<14> a<15> a<16> a<17> a<18> a<19> we oe ry/by vss:27,46 nc:10,13,14 vcc:37 u9 vss=gnd vcc=p3_3v am29lv160bb90ec we oe cs ub a<17> lb a<5> a<4> a<3> a<2> a<1> a<0> a<6> a<13> a<14> a<15> a<16> a<12> a<7> a<10> a<11> a<9> a<8> nc:28 vss:34,12 vdd:33,11 dq<3> dq<2> dq<1> dq<0> dq<4> dq<15> dq<14> dq<13> dq<12> dq<5> dq<6> dq<7> dq<8> dq<11> dq<9> dq<10> vss=gnd vdd=p3_3v u7 mcm6343ts we oe cs ub a<17> lb a<5> a<4> a<3> a<2> a<1> a<0> a<6> a<13> a<14> a<15> a<16> a<12> a<7> a<10> a<11> a<9> a<8> nc:28 vss:34,12 vdd:33,11 dq<3> dq<2> dq<1> dq<0> dq<4> dq<15> dq<14> dq<13> dq<12> dq<5> dq<6> dq<7> dq<8> dq<11> dq<9> dq<10> vdd=p3_3v vss=gnd u15 mcm6343ts dir2 dir1 oe2 oe1 gnd:10,4 gnd:28,21,15, gnd:45,39,34, vcc:42,31,18,7 b2<1> b2<2> b2<3> b2<4> b2<5> b2<6> b2<7> b2<8> a2<1> a2<2> a2<3> a2<4> a2<5> a2<6> a2<7> a2<8> a1<6> a1<7> a1<8> b1<8> b1<7> b1<6> a1<5> b1<5> a1<2> a1<3> a1<4> a1<1> b1<1> b1<2> b1<3> b1<4> u3 alvch16245 gnd=gnd vcc=p3_3v dir2 dir1 oe2 oe1 gnd:10,4 gnd:28,21,15, gnd:45,39,34, vcc:42,31,18,7 b2<1> b2<2> b2<3> b2<4> b2<5> b2<6> b2<7> b2<8> a2<1> a2<2> a2<3> a2<4> a2<5> a2<6> a2<7> a2<8> a1<6> a1<7> a1<8> b1<8> b1<7> b1<6> a1<5> b1<5> a1<2> a1<3> a1<4> a1<1> b1<1> b1<2> b1<3> b1<4> u2 alvch16245 gnd=gnd vcc=p3_3v p3_3v p3_3v p3_3v p3_3v r74 10.0k r80 10.0k r83 10.0k r89 10.0k r84 10.0k r107 10.0k r109 10.0k r108 10.0k r115 10.0k r116 10.0k r65 10.0k r64 10.0k c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:27 2000 sram bank "b" sram bank "a" flash bank "a" bb1 bus buffer bb3 bus buffer dir=1...a=>b dir=0...b=>a 12 15 45 11 28 26 47 43 41 39 36 34 32 30 44 42 40 38 35 33 31 29 9 16 17 48 1 2 3 4 5 6 7 8 18 19 20 21 22 23 24 25 24 25 48 1 23 22 20 19 17 16 14 13 12 11 9 8 6 5 3 2 37 38 40 41 43 44 46 47 26 27 29 30 32 33 35 36 24 25 48 1 23 22 20 19 17 16 14 13 12 11 9 8 6 5 3 2 37 38 40 41 43 44 46 47 26 27 29 30 32 33 35 36 39 40 41 17 6 38 37 36 35 32 31 30 29 16 15 14 13 10 9 8 7 44 43 42 27 26 25 24 23 22 21 20 19 18 5 4 3 2 1 39 40 41 17 6 38 37 36 35 32 31 30 29 16 15 14 13 10 9 8 7 44 43 42 27 26 25 24 23 22 21 20 19 18 5 4 3 2 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 63are10031s 63are10031s o o 15 of 17 ramb_b sch_1 sch_1 memory, upper data bus md<31..16> md<31..16> data<31..16> md<15..0> data<31> md<2> md<0> md<1> md<4> md<3> md<6> md<7> md<5> md<16> md<17> md<18> md<19> md<20> md<23> md<22> md<21> md<30> md<29> md<31> md<28> md<27> md<26> md<25> md<24> data<26> data<25> data<27> data<29> data<28> data<30> data<24> md<15> md<14> md<13> md<12> md<11> md<10> md<9> md<8> md<31> ba<17> ba<21..0> ba<14> ba<16> ba<15> ba<13> ba<12> ba<11> ba<9> ba<10> ba<0> ba<1> ba<2> ba<3> ba<4> ba<5> ba<6> ba<8> ba<7> md<16> md<17> md<18> md<19> md<21> md<20> md<22> md<23> md<24> md<25> md<26> md<27> md<29> md<28> md<30> ba<17> ba<16> ba<15> ba<0> ba<1> ba<2> ba<3> ba<4> ba<5> ba<6> ba<9> ba<8> ba<7> ba<10> ba<11> ba<13> ba<14> ba<12> md<16> md<17> md<18> md<19> md<21> md<20> md<22> md<23> md<24> md<25> md<26> md<27> md<29> md<28> md<30> md<31> md<16> md<17> md<18> md<19> md<20> md<21> md<22> md<23> ba<19> ba<18> ba<17> ba<14> ba<13> ba<16> ba<15> md<31> md<30> md<29> md<28> md<27> md<25> md<26> md<24> md<23> md<22> md<20> md<19> md<21> md<18> md<17> md<16> ba<12> ba<10> ba<11> ba<7> ba<8> ba<9> ba<5> ba<6> ba<4> ba<3> ba<2> ba<0> ba<1> nc_2 data<16> data<17> data<18> data<19> data<20> data<21> data<22> data<23> md<31> md<30> md<29> md<28> md<27> md<26> md<25> md<24> rama_b bb3_dir bb3_e_b bb1a_dir bb1b_dir bb1_e_b reset_b br_w boe_b boe_b boe_b boe_b eby_b ebx_b byte_b flsha_b 13d1> 14d4< 13d1<> 6d4<> 10d4<> 16d4<> 14d1<> 13b1> 14d4< 13d1> 14b4< 13c1> 13c1> 13c1> 13c1> 13c1> 5b4<> 10b4<> 11d1> 14a4< 16a4< 13d1> 14c4< 13d1> 14c4< 15a4< 13d1> 16a1< 13d1> 16a1< 14a4< 13d1> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
tektronix nc nc clk/qual d1:7 d1:6 d1:5 d1:4 d1:3 d1:2 d1:1 d1:0 d0:0 d0:7 d0:6 d0:5 d0:4 d0:3 d0:2 d0:1 gnd_dc d3:2 d3:3 d3:4 d3:5 d3:6 d3:7 clk/qual nc d3:1 d3:0 d2:0 d2:1 d2:2 d2:3 d2:4 d2:5 d2:6 d2:7 vss=gnd j17 mictor38 j19 nopop j21 nopop j20 nopop j22 nopop j13 nopop j23 nopop j12 nopop j11 nopop j10 nopop j9 nopop tektronix nc nc clk/qual d1:7 d1:6 d1:5 d1:4 d1:3 d1:2 d1:1 d1:0 d0:0 d0:7 d0:6 d0:5 d0:4 d0:3 d0:2 d0:1 gnd_dc d3:2 d3:3 d3:4 d3:5 d3:6 d3:7 clk/qual nc d3:1 d3:0 d2:0 d2:1 d2:2 d2:3 d2:4 d2:5 d2:6 d2:7 vss=gnd j18 mictor38 tektronix nc nc clk/qual d1:7 d1:6 d1:5 d1:4 d1:3 d1:2 d1:1 d1:0 d0:0 d0:7 d0:6 d0:5 d0:4 d0:3 d0:2 d0:1 gnd_dc d3:2 d3:3 d3:4 d3:5 d3:6 d3:7 clk/qual nc d3:1 d3:0 d2:0 d2:1 d2:2 d2:3 d2:4 d2:5 d2:6 d2:7 vss=gnd j5 mictor38 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:28 2000 mictor connector d mictor connector a mictor connector c 36 3 2 1 38 37 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 36 3 2 1 38 37 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 36 3 2 1 38 37 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 1 1 1 1 1 1 1 1 1 1 63are10031s 63are10031s o o 16 of 17 clk_out mictor connectors sch_1 sch_1 cse1 cse0 ctl_bus cs_b<10..0> cs_b<3> addr<31..0> tea_b r_w_b r_w_b ta_b ta_b shs_b shs_b nc_15 data<8> data<0> data<1> data<2> data<3> data<4> data<5> data<6> data<7> data<9> data<15> data<14> data<13> data<12> data<11> data<10> nc_16 addr<9> addr<11> addr<10> addr<14> addr<15> addr<12> addr<13> nc_19 nc_20 addr<7> addr<5> addr<6> addr<4> addr<1> addr<3> addr<2> addr<0> nc_13 nc_14 data<21> data<23> data<24> data<17> data<16> data<19> data<18> data<20> data<25> data<26> data<27> data<28> data<29> data<30> data<31> data<22> data<31..0> nc_17 nc_18 addr<25> addr<24> addr<23> addr<22> addr<20> addr<16> addr<17> addr<18> addr<19> cs_b<0> cs_b<2> cs_b<1> addr<21> clk_out tc<2..0> addr<8> int_bus j7p28 ebv_b ebv_b ebw_b ebw_b ebx_b ebx_b eby_b eby_b rstout_b rstout_b nc_23 nc_24 j7p35 int_b<0> int_b<1> devsp_b<0> devsp_b<0> j7p31 j7p30 tea_b int_b<3> int_b<4> int_b<5> j7p11 j7p18 j7p19 reset_b reset_b j7p17 int_b<2> j7p10 int_b<6> int_b<7> tc<0> tc<1> tc<2> j7p4 oe_b oe_b nc_22 nc_21 eba_b ebb_b ebd_b ebc_b eb_bus 6b4< 10b1> 13c4< 16c4< 5b4<> 6a4<> 10d1> 13c1<> 13d4< 6a4< 10d1> 13b1< 13d4< 6d4< 10d1> 13d4< 6d4<> 10d4<> 14d1<> 15d1<> 6b4< 10b1> 13c4< 16c4< 5d1> 13c4< 3a4> 10c4<> 13b1> 17b4<> 13d1> 14d4< 16a1< 13d1> 14d4< 16a1< 13d1> 14d4< 16a1< 13d1> 15c4< 16a1< 13d1> 15c4< 16a1< 13d1> 15c4< 16a1< 5b4< 10b1> 13c4< 16a1< 5b4< 10b1> 13c4< 16a1< 3b4> 13b1> 16b1< 3b4> 13b1> 16b1< 5b4<> 10b4<> 11d1> 14a4< 15a4< 16a4< 6b4< 10d1> 13c4< f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
gnd 1.0uf c35 1.0uf c37 1.0uf c36 1.0uf c34 1.0uf c33 1.0uf c32 j57 db9s tx2 tx3 tx1 rx4 rx5 rx3 rx1 rx2 stb rimon di3 di2 di1 do5 do4 do3 do2 do1 c2- c2+ vdd vss c1+ c1- c5+ c5- gnd vcc u13 mc145583vf p5v p3_3v r133 300 r136 4.7k p5v r137 4.7k j58 db9s ds5 super yel lxl1206syc ds4 super yel lxl1206syc r82 300 r77 300 ds3 super yel lxl1206syc p3_3v r76 300 ds2 super yel lxl1206syc r69 300 gnd p5v r135 4.7k r131 4.7k r130 4.7k r132 4.7k r134 4.7k p3_3v berg j53 j51 berg gnd gnd p3_3v 90hbj s1 90hbj s2 gnd drawing last_modified=tue apr 18 09:27:47 2000 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. nopop nopop porta dce dce portb led3 led2 led1 led0 icoc1<1> sci1_in icoc2<0> serial & test connectors,user leds,& dip switches sch_1 sch_1 icoc2<1> icoc2<2> icoc1<0> icoc1<2> icoc2<3> icoc1<3> led0x led0_b led1x led1_b led3x led3_b usr1 swap port_sz boot_ext m0 m1 usr0 usr2 int_b<0> int_b<7> int_b<6> int_b<5> int_b<4> int_b<3> int_b<2> int_b<1> int_bus led2_b led2x timer_bus ri dsrb_232 rtsb_232 cda_232 dsra_232 rtsa_232 sci2_in sci2_in sci1_in sci2_out sci2_out sci1_out sci1_out cdb_232 stby v1+ c1- c1+ c5- c5+ c2+ c2- v1- nc_28 ri_232 ri_232 txdb_232 txda_232 rxda_232 rxdb_232 nc_29 nc_30 nc_6 nc_26 nc_27 nc_25 serial_bus miso ss_b sck sci2_out sci1_out sci1_in sci2_in mosi rstout_b rstout_b reset_b reset_b nc_31 nc_32 nc_33 nc_34 17 of 17 o o 63are10031s 63are10031s 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 10 1 12 6 18 17 13 9 3 11 15 19 20 16 14 7 5 8 4 2 10 1 12 6 18 17 13 9 3 11 15 19 20 16 14 7 5 8 4 2 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 2 23 12 14 10 9 11 13 8 7 4 6 27 24 25 5 3 1 28 26 21 22 18 20 16 15 17 19 17c4> 13a1> 13a1> 13a1> 13b4< 13b4< 13b4< 13b4< 13b4< 13b4< 13b4< 13b4< 16b1< 13b1> 10c4<> 3a4> 13a1> 13d4<> 12c1< 17c4> 17c4> 17c4> 12c4<> 4b1<> 3d4<> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. _b denotes - active low signal. all voltages are dc. all capacitors are in uf. all resistors are in ohms, 5%, 1/8 watt. is as follows: 1. unless otherwise specified: 2. interrupted lines coded with the 3. device type number is for reference 4. special symbol usage: 5. interpret diagram in accordance 6. code for sheet to sheet references > < input output revision, with the exception of institute specifications, current with american national standards <> denotes - vectored signals. only. the number varies with the logic block symbology. manufacturer. c7 5 sheet zone are electrically connected. same letter or letter combinations notes: drawing last_modified=tue apr 18 09:14:39 2000 2 of 17 notes sch_1 sch_1 o o 63are10031s 63are10031s f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
p3_3v gnd1 gnd1 gnd1 p5v p5v gnd gnd gnd gnd agnd agnd j1-88 j1-87 j1-86 j1-85 j1-84 j1-83 j1-82 j1-81 j1-80 j1-79 j1-78 cs_b8 cs_b4 cs_b9 cs_b5 cs_b10 cs_b6 cs_b7 trgsp_b0 dvsp_b2 dvsp_b1 dvsp_b0 int_b6 int_b7 int_b4 int_b5 int_b2 int_b3 int_b0 int_b1 p1-17 p1-15 p1-13 p1-11 p1-9 p1-7 p1-5 p1-3 p1-1 p1-19 gnd1 p1-39 p1-37 p1-35 p1-33 p1-31 p1-29 p1-27 p1-23 p1-21 p1-57 p1-55 p1-53 p1-51 p1-49 p1-47 p1-45 p1-43 gnd vdd3v gnd rs11 gnd vdd3v p1-18 p1-16 p1-14 p1-8 p1-6 p1-4 gnd1 gnd2 gnd2 p1-20 p1-38 p1-36 p1-32 p1-30 p1-24 p1-22 mid2 mid3 gnd gnd1 p1-56 p1-54 p1-50 p1-48 p1-44 p1-42 mid0 mid1 gnd vdd3v gnd rs12 rs10 gnd vdd5v vpp1 p1 plug j1-88 j1-87 j1-86 j1-85 j1-84 j1-83 j1-82 j1-81 j1-80 j1-79 j1-78 cs_b8 cs_b4 cs_b9 cs_b5 cs_b10 cs_b6 cs_b7 trgsp_b0 dvsp_b2 dvsp_b1 dvsp_b0 int_b6 int_b7 int_b4 int_b5 int_b2 int_b3 int_b0 int_b1 vdd5v vpp1 gnd gnd rs12 rs10 vdd3v mid0 mid1 gnd j1-42 j1-44 j1-48 j1-50 j1-54 j1-56 mid2 mid3 gnd gnd1 j1-22 j1-24 j1-30 j1-32 j1-36 j1-38 j1-20 gnd1 gnd2 gnd2 j1-4 j1-6 j1-8 j1-14 j1-16 j1-18 j1-1 j1-3 j1-17 j1-15 j1-13 j1-11 j1-9 j1-7 j1-5 j1-19 gnd1 j1-21 j1-23 j1-39 j1-37 j1-35 j1-33 j1-31 j1-29 j1-27 gnd vdd3v j1-43 j1-57 j1-55 j1-53 j1-51 j1-49 j1-47 j1-45 rs11 gnd gnd vdd3v j1 socket drawing last_modified=tue apr 18 09:21:10 2000 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 63are10031s 63are10031s o o 3 of 17 adc_bus serial_bus mapivrh mapivrl pqa<0> mapivrh mapivrl pqa<0> ptj1<69> ptj1<69> mapi p1/j1 sch_1 sch_1 ptj1<31> ptj1<27> ptj1<31> ptj1<37> ptj1<39> ptj1<37> ptj1<39> ptj1<27> ptj1<94> ptj1<96> ptj1<98> ptj1<97> ptj1<95> ptj1<93> ptj1<91> ptj1<94> ptj1<96> ptj1<98> ptj1<97> ptj1<95> ptj1<93> ptj1<91> icoc2<2> icoc1<3> icoc1<1> icoc2<3> icoc2<1> icoc2<0> icoc1<2> icoc1<0> ptj1<47> int_b<6> int_b<0> int_b<1> int_b<3> int_b<2> int_b<4> int_b<5> int_b<7> icoc1<1> icoc1<3> icoc2<2> ptj1<79> ptj1<81> ptj1<83> ptj1<85> ptj1<87> ptj1<23> ptj1<33> ptj1<35> ptj1<47> ptj1<45> ptj1<43> ptj1<32> ptj1<30> ptj1<24> ptj1<70> ptj1<88> ptj1<86> ptj1<84> ptj1<36> ptj1<80> ptj1<78> ptj1<72> ptj1<82> ptj1<100> ptj1<9> ptj1<7> ptj1<13> ptj1<15> ptj1<17> ptj1<19> ptj1<21> ptj1<11> ptj1<22> ptj1<20> ptj1<18> ptj1<16> ptj1<14> ptj1<81> ptj1<85> ptj1<87> ptj1<83> ptj1<79> ptj1<45> ptj1<43> ptj1<35> ptj1<33> ptj1<29> ptj1<23> ptj1<70> ptj1<72> ptj1<82> ptj1<78> ptj1<80> ptj1<84> ptj1<86> ptj1<88> ptj1<24> ptj1<32> ptj1<30> ptj1<36> int_b<0> int_b<2> int_b<6> ptj1<100> int_b<4> ptj1<7> ptj1<9> ptj1<11> ptj1<21> ptj1<19> ptj1<17> ptj1<15> ptj1<13> ptj1<22> ptj1<20> ptj1<16> ptj1<14> ptj1<18> ptj1<76> ptj1<77> ptj1<75> ptj1<76> icoc2<3> icoc2<1> icoc2<0> icoc1<2> timer_bus icoc1<0> ptj1<75> ptj1<77> devsp_b<0> devsp_b<0> devsp_b<0> int_b<7> int_b<5> int_b<3> int_b<1> int_bus idvdd idvdd idvdd idvdd idvdd ptj1<29> mosi miso ss_b sck ptj_bus sck mosi miso ss_b 4a1<> 12c1<> 4b1<> 12c4<> 17a4<> 4d1> 5d1< 6d1> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
p3_3v p5v p5v gnd gnd gnd gnd gnd3 gnd3 agnd agnd agnd gnd3 gnd3 gnd p2-90 p2-88 p2-92 p2-94 p2-96 p2-98 p2-100 gnd3 vdd3v gnd p2-66 p2-68 p2-70 p2-72 p2-74 p2-76 p2-78 p2-80 vdd3v vdd3v rs40 rs44 rs46 rs48 rs50 rs52 rs54 rs56 gnd rs28 rs30 rs32 rs34 rs36 rs38 p2-22 p2-24 p2-26 p2-28 vdd3v gnd p2-2 p2-4 p2-6 p2-8 p2-10 p2-12 p2-14 gnd2 gnd3 gnd3 gnd p2-87 p2-89 p2-91 p2-93 p2-95 p2-97 vpp3 vdd5v gnd p2-65 p2-67 p2-69 p2-71 p2-73 p2-75 p2-77 p2-61 vdd5v rs41 gnd rs45 rs47 rs49 rs51 rs53 rs55 rs57 vdd5v rs33 rs35 rs37 rs39 p2-21 p2-23 p2-25 p2-27 sdcps vpp2 gnd gnd2 gnd2 p2-3 p2-5 p2-7 p2-9 p2-11 p2-13 p2 plug agnd gnd3 gnd j2-88 j2-90 j2-92 j2-94 j2-96 j2-98 j2-100 vdd3v j2-68 j2-66 gnd j2-70 j2-72 j2-74 j2-76 j2-78 j2-80 vdd3v vdd3v gnd rs56 rs54 rs52 rs50 rs48 rs46 rs44 rs40 j2-22 j2-24 j2-26 j2-28 rs38 rs36 rs34 rs32 rs30 rs28 vdd3v j2-2 gnd j2-4 j2-6 j2-8 j2-10 j2-12 j2-14 gnd2 gnd gnd3 gnd3 j2-87 j2-89 j2-91 j2-93 j2-95 j2-97 vpp3 vdd5v j2-65 j2-67 gnd j2-69 j2-71 j2-73 j2-75 j2-77 j2-61 vdd5v rs57 rs55 rs53 rs51 rs49 rs47 rs45 gnd rs41 sdcps vdd5v rs39 rs37 rs35 rs33 j2-21 j2-23 j2-25 j2-27 vpp2 gnd2 gnd2 gnd j2-3 j2-5 j2-7 j2-9 j2-11 j2-13 j2 socket drawing last_modified=tue apr 18 09:21:11 2000 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 63are10031s 63are10031s o o 4 of 17 sdcps sdcps sdcps ptj2<81> ptj2<73> ptj2<71> sci2_out ptj2<67> ptj2<61> sci1_out ptj2<59> ptj2<57> ptj2<55> ptj2<51> ptj2<53> ptj2<49> ptj2<47> ptj2<41> ptj2<39> ptj2<37> ptj2<35> ptj2<33> ptj2<27> ptj2<25> ptj2<23> ptj2<21> ptj2<19> ptj2<78> ptj2<72> ptj2<74> ptj2<76> sci2_in ptj2<68> sci1_in ptj2<60> ptj2<58> ptj2<56> ptj2<52> ptj2<54> ptj2<50> ptj2<48> ptj2<42> ptj2<40> ptj2<38> ptj2<36> ptj2<32> ptj2<34> ptj2<30> ptj2<28> ptj2<26> ptj2<24> ptj2<22> ptj_bus ptj2<73> ptj2<78> ptj2<76> sci1_out sci2_out serial_bus sci2_in sci1_in ptj2<74> ptj2<72> ptj2<68> ptj2<60> ptj2<58> ptj2<56> ptj2<54> ptj2<52> ptj2<50> ptj2<48> ptj2<42> ptj2<40> ptj2<38> ptj2<36> ptj2<34> ptj2<19> ptj2<21> ptj2<23> ptj2<25> ptj2<27> ptj2<33> ptj2<35> ptj2<37> ptj2<39> ptj2<41> ptj2<47> ptj2<49> ptj2<51> ptj2<53> ptj2<57> ptj2<55> ptj2<59> ptj2<61> ptj2<22> ptj2<24> ptj2<26> ptj2<28> ptj2<30> ptj2<32> ptj2<71> ptj2<67> ptj2<75> ptj2<75> sch_1 sch_1 mapi p2/j2 ptj2<77> ptj2<81> ptj2<87> ptj2<89> ptj2<93> ptj2<95> ptj2<91> ptj2<97> ptj2<80> ptj2<88> ptj2<90> ptj2<92> ptj2<94> ptj2<96> ptj2<98> ptj2<100> pqa<4> pqa<3> pqa<1> pqb<3> pqb<2> pqb<1> pqb<0> pqa<4> pqa<3> pqa<1> pqb<3> pqb<2> pqb<1> pqb<0> ptj2<77> ptj2<89> ptj2<91> ptj2<93> ptj2<95> ptj2<97> ptj2<80> ptj2<88> ptj2<90> ptj2<92> ptj2<94> ptj2<96> ptj2<98> ptj2<100> adc_bus ptj2<87> 4d4> 8c4> 4d4> 8c4> 4d4> 8c4> 3a1> 5d1< 6d1> 3d4<> 12c4<> 17a4<> 3d4<> 12c1<> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
siz_b1 siz_b0 j3-17 j3-15 j3-13 j3-11 j3-5 j3-3 gnd3 gnd3 gnd4 j3-19 j3-39 j3-35 j3-33 j3-29 j3-27 j3-21 gnd4 gnd mid7 mid6 vdd3v j3-57 j3-53 j3-51 j3-47 j3-45 j3-41 gnd mid5 mid4 mid8 rout_b rin_b pstat3 pstat2 pstat1 pstat0 shs gnd mid9 gnd gpioso trst_b vdd3v tms tclk gnd extal gnd gnd j3-18 j3-16 j3-14 j3-12 j3-10 j3-8 j3-6 j3-4 j3-2 j3-20 gnd4 j3-40 j3-38 j3-36 j3-34 j3-32 j3-30 j3-28 j3-26 j3-22 vdd3v j3-58 j3-56 j3-54 j3-52 j3-50 j3-48 j3-46 j3-44 j3-42 tc0 rs67 vdd5v tc2 tc1 gnd vstby tdo idvdd tdi frez_b de_b vdd3v gpiosi tsc clkctl vpp4 tbusy_b j3 socket p3_3v gnd4 gnd4 gnd4 gnd4 gnd gnd gnd gnd p5v p5v gnd gnd gnd3 gnd3 siz_b1 siz_b0 p3-17 p3-15 p3-13 p3-11 p3-5 p3-3 gnd3 gnd3 gnd4 p3-19 p3-39 p3-35 p3-33 p3-29 p3-27 p3-21 gnd4 gnd mid7 mid6 p3-57 p3-53 p3-51 p3-47 p3-45 p3-41 gnd mid5 mid4 vdd3v mid8 mid9 shs gnd pstat0 pstat1 pstat2 pstat3 gnd extal gnd tclk tms gpioso gnd gnd vdd3v p3-18 p3-16 p3-14 p3-12 p3-10 p3-8 p3-6 p3-4 p3-2 p3-20 gnd4 p3-40 p3-38 p3-36 p3-34 p3-32 p3-30 p3-28 p3-26 p3-22 p3-58 p3-56 p3-54 p3-52 p3-50 p3-48 p3-46 p3-44 p3-42 vdd3v tc0 tdo vstby gnd idvdd tc1 tc2 rs67 vdd5v tdi tsc gpiosi clkctl vpp4 vdd3v rin_b rout_b trst_b tbusy_b de_b frez_b p3 plug drawing last_modified=tue apr 18 09:21:12 2000 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 63are10031s 63are10031s o o 5 of 17 ptj3<2> ptj3<4> ptj3<6> ptj3<8> ptj3<5> ptj3<3> ptj3<11> ptj3<13> ptj3<2> ptj3<6> ptj3<4> ptj3<8> ptj3<5> ptj3<3> ptj3<11> sch_1 sch_1 mapi p3/j3 ptj3<57> idvdd idvdd idvdd idvdd idvdd vstby vstby vstby extal extal extal ptj_bus ptj3<72> ptj3<70> ptj3<73> ptj3<73> ptj3<71> ptj3<69> ptj3<67> ptj3<89> once_bus ptj3<71> ptj3<69> ptj3<67> ptj3<57> ptj3<89> ptj3<72> ptj3<86> ptj3<88> ptj3<90> ptj3<92> ptj3<96> ptj3<98> ptj3<70> once_tdo once_tdi once_de_b ctl_bus ptj3<86> ptj3<88> ptj3<90> ptj3<92> ptj3<94> ptj3<96> ptj3<98> once_tdo once_tdi once_de_b ptj3<10> ptj3<10> tc<0> tc<1> tc<2> tc<1> tc<0> tc<2> ptj3<19> ptj3<21> ptj3<15> ptj3<17> ptj3<29> ptj3<27> ptj3<22> ptj3<12> ptj3<14> ptj3<16> ptj3<18> ptj3<20> ptj3<22> ptj3<12> ptj3<14> ptj3<16> ptj3<18> ptj3<20> ptj3<39> ptj3<47> ptj3<45> ptj3<41> ptj3<35> ptj3<33> ptj3<53> ptj3<51> once_trst_b once_tclk once_tms shs_b ptj3<40> ptj3<38> ptj3<36> ptj3<32> ptj3<34> ptj3<30> ptj3<42> ptj3<58> ptj3<56> ptj3<52> ptj3<54> ptj3<50> ptj3<48> ptj3<46> ptj3<44> ptj3<28> ptj3<26> once_tms shs_b once_trst_b once_tclk ptj3<53> ptj3<51> ptj3<45> ptj3<39> ptj3<47> ptj3<41> ptj3<35> ptj3<33> ptj3<44> ptj3<46> ptj3<48> ptj3<50> ptj3<54> ptj3<52> ptj3<56> ptj3<58> ptj3<42> ptj3<30> ptj3<34> ptj3<32> ptj3<36> ptj3<38> ptj3<40> ptj3<26> ptj3<28> reset_b reset_b reset_b rstout_b rstout_b rstout_b tc<2..0> ptj3<13> ptj3<15> ptj3<17> ptj3<19> ptj3<21> ptj3<27> ptj3<29> ptj3<94> 5b4> 5b4> 5b4> 5b4> 11a4< 5b4> 11a4< 3a1> 4d1> 6d1> 10c1<> 11d4<> 6a4<> 10d1> 13c1<> 13d4< 16d4<> 5b4<> 10b4<> 11d1> 14a4< 15a4< 16a4< 5b4< 10b1> 13c4< 16a1< 5b4< 10b1> 13c4< 16a1< f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
p3_3v p5v p5v gnd gnd gnd gnd cs_b3 cs_b2 cs_b1 cs_b0 r_w_b d13 d7 d5 d3 d1 d9 d11 gnd vdd3v d15 gnd d31 d29 d27 d25 d23 d17 d19 d21 gnd a17 a7 a5 a3 a1 a9 a11 a13 a15 gnd a19 gnd a31 a29 a27 a25 a23 a21 gnd clkout gnd gnd vdd3v d8 d6 d12 d4 d2 d0 d10 gnd vdd3v d14 gnd d30 d28 d26 d24 d22 d16 d18 d20 gnd a16 a8 a6 a4 a2 a0 a10 a12 a14 gnd a18 gnd a30 a28 a26 a24 a22 a20 rs72 rs73 gnd vdd5v cse1 cse0 ta_b treq_b tea_b ebb_b eba_b ebc_b ebd_b oe_b p4 plug cs_b3 cs_b2 cs_b1 cs_b0 r_w_b vdd3v d13 d7 d5 d3 d1 d9 d11 gnd d15 gnd d31 d29 d27 d25 d23 d17 d19 d21 gnd a17 a7 a5 a3 a1 a9 a11 a13 a15 gnd a19 treq_b ta_b gnd a31 a29 a27 a25 a23 a21 vdd3v clkout gnd gnd gnd vdd3v d8 d6 d12 d4 d2 d0 d10 gnd d14 gnd d30 d28 d26 d24 d22 d16 d18 d20 gnd a16 a8 a6 a4 a2 a0 a10 a12 a14 gnd a18 ebb_b tea_b gnd a30 a28 a26 a24 a22 a20 eba_b oe_b ebd_b ebc_b cse0 cse1 vdd5v gnd rs72 rs73 j4 socket drawing last_modified=tue apr 18 09:21:13 2000 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. ebc_b controls d16..d23 ebd_b controls d24..d31 ebb_b controls d15..d8 eba_b controls d7..d0 to the data bus as follows: note: the enable byte signals relate 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 63are10031s 63are10031s o o 6 of 17 mapi j4/p4 sch_1 sch_1 cs_b<0> cs_b<0> ptj4<79> data<16> data<17> data<16> r_w_b cs_b<3> addr<21> ta_b cs_b<2> cs_b<1> addr<3> addr<5> addr<7> addr<9> addr<13> addr<11> addr<15> addr<17> addr<19> addr<1> data<31> data<29> data<25> data<27> data<23> data<21> data<19> ebd_b ebc_b eba_b ebb_b data<30> data<28> data<24> data<26> data<22> data<20> data<18> ptj4<92> ptj4<90> tea_b addr<18> addr<20> addr<22> addr<16> addr<14> addr<10> addr<12> addr<8> addr<6> addr<4> cse0 cse1 addr<23> addr<25> addr<27> addr<29> addr<31> addr<2> addr<0> oe_b data<5> addr<2> addr<4> addr<6> addr<8> addr<12> addr<10> addr<14> addr<16> addr<22> addr<20> addr<18> addr<24> addr<26> addr<30> addr<28> tea_b ebb_b eba_b addr<0> data<18> data<20> data<22> data<26> data<24> data<28> data<30> ebc_b ebd_b oe_b ptj4<92> cse0 cse1 addr<3> addr<5> addr<7> addr<9> addr<13> addr<11> addr<15> addr<17> addr<23> addr<19> addr<21> addr<25> addr<27> addr<29> addr<31> ta_b r_w_b addr<1> data<7> data<11> data<9> data<13> data<15> data<17> data<19> data<21> data<23> data<27> data<25> data<29> data<31> cs_b<1> cs_b<2> cs_b<3> data<15> data<13> data<11> data<9> data<7> data<5> data<3> data<1> data<14> data<12> data<10> data<8> data<6> data<4> data<2> data<0> data<0> data<14> data<12> data<10> data<8> data<6> data<4> data<2> data<3> data<1> clk_out clk_out clk_out eb_bus cs_b<10..0> ctl_bus ptj4<79> addr<24> addr<26> addr<28> addr<30> ptj4<90> addr<31..0> data<31..16> ptj_bus data<15..0> 6b4< 10b1> 13c4< 16c4< 10d1> 13c4< 16b1< 10d1> 13b1< 13d4< 16c4< 5b4<> 10d1> 13c1<> 13d4< 16d4<> 10d1> 13d4< 16c4< 10d4<> 15d1<> 16d4<> 3a1> 4d1> 5d1< 10d4<> 14d1<> 16d4<> f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
tp102 tp103 tp108 tp105 tp104 tp107 tp106 tp113 tp112 tp109 tp111 tp110 tp118 tp116 tp114 tp115 tp117 tp121 tp120 tp119 tp122 tp123 tp124 tp128 tp127 tp126 tp125 tp129 tp133 tp134 tp130 tp132 tp131 tp139 tp138 tp135 tp137 tp136 tp144 tp143 tp140 tp142 tp141 tp149 tp146 tp145 tp148 tp147 tp150 tp1100 tp197 tp198 tp195 tp196 tp199 tp191 tp192 tp190 tp193 tp194 tp186 tp187 tp185 tp188 tp189 tp181 tp182 tp180 tp184 tp183 tp179 tp175 tp176 tp177 tp178 tp174 tp173 tp172 tp169 tp170 tp171 tp167 tp165 tp164 tp166 tp168 tp160 tp161 tp159 tp162 tp163 tp156 tp157 tp154 tp155 tp158 tp153 tp152 tp151 tp399 tp398 tp3100 tp393 tp394 tp395 tp396 tp397 tp388 tp389 tp390 tp391 tp392 tp387 tp385 tp383 tp384 tp386 tp382 tp379 tp378 tp380 tp381 tp499 tp4100 tp498 tp490 tp493 tp491 tp492 tp494 tp495 tp489 tp488 tp496 tp497 tp487 tp480 tp481 tp482 tp483 tp484 tp479 tp478 tp485 tp486 tp477 tp377 tp376 tp375 tp372 tp373 tp374 tp367 tp368 tp369 tp370 tp371 tp362 tp363 tp364 tp366 tp365 tp358 tp357 tp359 tp360 tp361 tp352 tp353 tp354 tp355 tp356 tp347 tp348 tp349 tp350 tp351 tp342 tp343 tp344 tp345 tp346 tp341 tp338 tp337 tp339 tp340 tp469 tp470 tp473 tp472 tp471 tp474 tp468 tp467 tp475 tp476 tp459 tp462 tp460 tp461 tp463 tp464 tp458 tp457 tp466 tp465 tp450 tp449 tp452 tp451 tp453 tp454 tp448 tp447 tp455 tp456 tp440 tp442 tp439 tp441 tp443 tp444 tp438 tp437 tp445 tp446 tp436 tp336 tp335 tp334 tp331 tp332 tp333 tp326 tp327 tp328 tp329 tp330 tp321 tp322 tp323 tp325 tp324 tp316 tp317 tp318 tp320 tp319 tp312 tp311 tp313 tp314 tp315 tp307 tp306 tp308 tp310 tp309 tp302 tp303 tp304 tp305 tp430 tp432 tp428 tp429 tp431 tp433 tp426 tp427 tp434 tp435 tp422 tp421 tp418 tp419 tp420 tp423 tp416 tp417 tp424 tp425 tp409 tp411 tp408 tp412 tp410 tp413 tp406 tp407 tp414 tp415 tp403 tp402 tp404 tp405 tp205 tp204 tp202 tp203 tp215 tp214 tp207 tp206 tp213 tp210 tp212 tp208 tp211 tp209 tp225 tp224 tp217 tp216 tp223 tp220 tp219 tp218 tp221 tp222 tp235 tp234 tp227 tp226 tp233 tp231 tp229 tp228 tp232 tp230 tp236 tp246 tp245 tp237 tp238 tp244 tp243 tp241 tp239 tp242 tp240 tp256 tp255 tp247 tp248 tp254 tp253 tp251 tp252 tp249 tp250 tp265 tp266 tp257 tp258 tp264 tp263 tp261 tp260 tp262 tp259 tp276 tp275 tp267 tp268 tp274 tp271 tp272 tp273 tp270 tp269 tp277 tp286 tp285 tp278 tp279 tp284 tp283 tp282 tp281 tp280 tp287 tp297 tp296 tp288 tp289 tp295 tp294 tp292 tp291 tp293 tp290 tp298 tp2100 tp299 gnd p5v p5v p5v tp401 tp301 tp201 tp101 p5v p3_3v p3_3v p3_3v p3_3v p3_3v gnd4 gnd1 agnd gnd3 gnd3 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:18 2000 1111 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 11 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 11 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 63are10031s 63are10031s o o ptj3<5> ptj3<3> ptj3<2> mapivrh mapivrl pqa<0> idvdd cs_b<2> sdcps ptj3<36> ptj3<35> ptj3<34> ptj3<33> ptj3<32> ptj3<30> ptj3<29> ptj3<26> ptj3<27> ptj3<28> ptj3<19> ptj3<21> ptj3<22> ptj3<20> ptj3<16> ptj3<15> ptj3<14> ptj3<17> ptj3<18> ptj3<12> ptj3<11> ptj3<10> ptj3<13> ptj3<8> ptj3<96> ptj3<98> ptj3<92> extal ptj3<94> once_trst_b ptj3<86> ptj3<88> ptj3<89> ptj3<90> once_tclk once_tms once_tdi once_de_b once_tdo idvdd reset_b vstby rstout_b shs_b ptj3<73> ptj3<71> ptj3<70> ptj3<72> ptj3<67> tc<2> ptj3<69> tc<0> tc<1> ptj3<56> ptj3<57> ptj3<51> ptj3<52> ptj3<50> ptj3<53> ptj3<54> ptj3<46> ptj3<47> ptj3<45> ptj3<48> ptj3<41> ptj3<42> ptj3<40> ptj3<44> ptj3<39> ptj3<38> ss_b ptj1<37> ptj1<39> mosi ptj1<43> miso icoc1<0> sck ptj1<45> ptj1<47> icoc1<3> icoc2<0> icoc1<1> icoc1<2> icoc2<3> idvdd icoc2<1> icoc2<2> int_b<2> int_b<3> int_b<0> int_b<1> ptj1<69> int_b<6> int_b<4> int_b<7> int_b<5> ptj1<72> ptj1<70> devsp_b<0> ptj1<75> ptj1<79> ptj1<78> ptj1<77> ptj1<76> ptj1<80> ptj1<84> ptj1<81> ptj1<82> ptj1<83> ptj1<85> ptj1<88> ptj1<86> ptj1<87> ptj1<94> ptj1<95> ptj1<93> ptj1<91> ptj1<98> ptj1<96> ptj1<97> ptj1<7> ptj1<13> ptj1<11> ptj1<18> ptj1<17> ptj1<14> ptj1<15> ptj1<16> ptj1<23> ptj1<20> ptj1<22> ptj1<21> ptj1<19> ptj1<24> ptj1<29> ptj1<30> ptj1<31> ptj1<32> ptj1<33> idvdd ptj1<36> ptj1<35> ptj2<25> ptj2<24> ptj2<23> ptj2<19> ptj2<22> ptj2<21> ptj2<35> ptj2<34> ptj2<27> ptj2<26> ptj2<33> ptj2<28> ptj2<32> ptj2<30> ptj2<36> ptj2<37> ptj2<38> ptj2<41> ptj2<40> ptj2<42> ptj2<39> ptj2<56> ptj2<55> ptj2<47> ptj2<48> ptj2<54> ptj2<53> ptj2<51> ptj2<52> ptj2<49> ptj2<50> sci1_out sci1_in ptj2<57> ptj2<58> ptj2<61> ptj2<59> ptj2<60> ptj2<76> ptj2<75> ptj2<67> ptj2<68> ptj2<74> ptj2<71> ptj2<72> ptj2<73> sci2_in sci2_out ptj2<77> ptj2<78> ptj2<80> ptj2<81> data<1> data<0> data<3> data<7> data<4> data<5> data<2> data<6> data<9> data<8> data<10> data<11> data<12> data<15> data<13> data<14> data<16> data<17> data<21> data<18> data<19> data<22> data<20> data<24> data<25> data<29> data<26> data<27> data<28> data<31> data<30> addr<1> addr<0> addr<3> addr<5> addr<4> addr<2> addr<8> addr<9> addr<7> addr<6> addr<11> addr<10> addr<13> addr<14> addr<15> addr<12> addr<17> addr<16> addr<19> addr<18> addr<21> addr<23> addr<22> addr<20> addr<27> addr<26> addr<25> addr<24> addr<29> addr<31> addr<28> addr<30> ta_b ebb_b r_w_b tea_b ptj4<79> eba_b cs_b<0> ebc_b cs_b<1> ptj4<90> cs_b<3> oe_b cse0 clk_out cse1 data<23> ebd_b ptj4<92> ptj1<100> ptj3<58> ptj1<9> ptj1<27> mapi test points sch_1 sch_1 pqb<3> pqb<2> pqb<1> pqb<0> pqa<4> pqa<3> pqa<1> ptj3<4> ptj3<6> ptj2<98> ptj2<97> ptj2<96> ptj2<95> ptj2<94> ptj2<93> ptj2<92> ptj2<91> ptj2<90> ptj2<89> ptj2<88> ptj2<87> ptj2<100> 7 of 17 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
g ss s d d d d q1 si4431dy ds1 super red lxl1206src p5v cr1 cmdsh p3_3v r53 820 r55 10.0 r54 4.7k c7 33uf c15 100uf c14 100uf sleeve sw rasm722 j61 ds6 green lxl1206gc spdt s4 68pf c20 j15 nopop j14 nopop r68 0 j8 nopop c30 22uf c29 22uf gnd 0.1uf c51 j16 nopop p12v 47pf c17 c24 4.7uf vout vin adj adj u11 lt1086_cm j60 hdr1 j56 hdr1 j54 hdr1 0.1uf c19 c27 0.1uf 1.5a fuseclip_smt f1 330pf c18 gnd c22 100pf gnd 100pf c16 p3_3v r12 0.02 cr5 mbrs140t3 cr4 cmdsh gnd c23 1000pf gnd gnd gnd sensem sensep extvcc pgnd bg intvcc vin sw boost tg sgnd vosense sfb ith run cosc u12 ltc1435 r117 300 gnd 0.1uf c106 0.1uf c107 r8 11.0k r9 35.7k j59 hdr1 j55 hdr1 10uh l5 s s s d d d d g q2 si4420dy s s s d d d d g q3 si4420dy r7 10.0k r102 121.0 r98 169.0 r101 29.4 0.1uf c108 p5v cr6 ss32 cr7 ss32 c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:19 2000 power +12vdc input program power on off 1 1 1 1 1 1 1 1 1 2 1 2 1 2 12 1 2 1 2 1 2 1 2 12 12 1 2 1 2 10 2 6 5 7 9 13 8 15 4 1 3 12 11 14 16 1 2 3 3 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 1 12 1 2 12 2 3 1 12 1 2 1 2 1 2 1 2 1 2 1 2 4 3 2 1 876 5 4 3 2 1 876 5 12 4 3 2 1 8 7 6 5 2 1 63are10031s 63are10031s o o 8 of 17 prog3 sensep sw prog1 progv_b ithrc vos bg cosc ith vin12 tg v1 boost sfb sdcps on3_3v fvpp flash_vpp prog2 sch_1 sch_1 power supply v2 13b1> 4d4> 10b4< f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
c d dwg. no. rev: a rev: 1 2 1 sheet gedabv: gedttl: a size 2 c 4 d 3 3 b 4 a no. drawing last_modified=tue apr 18 09:21:20 2000 p3_3v j79 nopop j77 j75 nopop j70 nopop j67 j65 nopop p5v j82 nopop j80 j76 j78 nopop j74 nopop j73 j71 nopop j66 j69 j63 nopop gnd apwr j84 nopop j83 j81 nopop agnd j72 nopop j68 j64 nopop 0.1uf c9 0.1uf c81 0.1uf c67 0.1uf c61 0.1uf c53 0.1uf c79 0.1uf c72 0.1uf c69 0.1uf c101 0.1uf c120 0.1uf c55 0.1uf c76 0.1uf c13 0.1uf c82 0.1uf c56 0.1uf c64 0.1uf c63 0.1uf c103 0.1uf c158 0.1uf c99 0.1uf c80 0.1uf c98 0.1uf c160 0.1uf c86 0.1uf c54 0.1uf c73 0.1uf c70 0.1uf c104 0.1uf c91 0.1uf c93 0.1uf c65 0.1uf c97 0.01uf c95 0.01uf c78 0.01uf c71 0.01uf c90 0.01uf c89 0.01uf c94 0.01uf c92 0.01uf c157 p3_3v p3_3v p3_3v gnd gnd gnd c3 33uf 0.01uf c85 0.01uf c105 0.01uf c96 0.01uf c8 c28 33uf c5 33uf c38 33uf c2 33uf c4 33uf c1 33uf c31 33uf 0.01uf c57 0.01uf c60 0.01uf c59 0.01uf c58 0.01uf c84 0.01uf c68 0.01uf c83 0.01uf c102 0.01uf c12 0.01uf c121 0.01uf c161 0.01uf c100 0.01uf c159 0.01uf c66 0.01uf c52 0.01uf c50 0.01uf c77 0.01uf c74 0.01uf c75 0.01uf c62 gnd p3_3v power and ground for breadboard area no pop headers added cpld vccint bus buffers flashb rama0 flasha rama1 ramb0 memory chips 1 26 53 65 cpld vccio 79 92 105 11 bb3 bb1 bb2 cpld vccio 172 181 184 59 124 153 204 132 157 ramb1 1 1 1 1 1 1 1 1 11 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 63are10031s 63are10031s o o 9 of 17 sch_1 sch_1 decoupling f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .

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