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| motorola.com/semiconductors 56800 hybrid controller DRM026/d rev. 0, 03/2003 3-phase bldc motor control with sensorless detection adc zero crossing back-emf manual designer reference using 56f805 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola 3 3-phase bldc motor control with sensorless back-emf adc zero crossing detection using the 56f805 designer reference manual ? rev 0 by: libor prokop motorola czech s ystem laboratories roznov pod radhostem, czech republic f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . revision history designer reference manual DRM026 ? rev 0 4 motorola to provide the most up-to-date info rmation, the re vision of our documents on the world wide web will be the most current. your printed copy may be an earlier revision. to veri fy you have the latest information available, refer to: http://www.motorol a.com/semiconductors the following revision history table summarizes cha nges contained in this document. for your conven ience, the page number designators have been linked to the appropriate location. revision history date revision level description page number(s) february, 2003 1 initial release n/a f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola 5 designer reference manual ? 3-ph bl dc with sensorless adc zc detection list of sections section 1. introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 section 2. system description. . . . . . . . . . . . . . . . . . . . . 17 section 3. bldc motor co ntrol . . . . . . . . . . . . . . . . . . . . 23 section 4. hardware design. . . . . . . . . . . . . . . . . . . . . . . 57 section 5. software design . . . . . . . . . . . . . . . . . . . . . . . 79 section 6. software algorithms . . . . . . . . . . . . . . . . . . . 103 section 7. customization guide . . . . . . . . . . . . . . . . . . 157 section 8. application se tup . . . . . . . . . . . . . . . . . . . . . 169 appendix a. references. . . . . . . . . . . . . . . . . . . . . . . . . 185 appendix b. glossary. . . . . . . . . . . . . . . . . . . . . . . . . . . 187 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . list of sections designer reference manual DRM026 ? rev 0 6 motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola 7 designer reference manual ? 3-ph bl dc with sensorless adc zc detection table of contents section 1. introduction 1.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 1.2 application functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.3 benefits of the solu tion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 section 2. system description 2.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 2.2 system specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3 system concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 section 3. bldc motor control 3.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 3.2 brushless dc motor con trol theory. . . . . . . . . . . . . . . . . . . . .23 3.3 control technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 section 4. hardware design 4.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 4.2 system configuration an d documentation . . . . . . . . . . . . . . . . 57 4.3 all hw sets components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 4.4 low-voltage evaluation motor hardware set components . . . 68 4.5 low-voltage hardware se t components . . . . . . . . . . . . . . . . . 70 4.6 high-voltage hardware set components. . . . . . . . . . . . . . . . . 73 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . table of contents designer reference manual DRM026 ? rev 0 8 motorola section 5. software design 5.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 5.2 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.3 main sw flow chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.4 data flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 5.5 state diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 section 6. software algorithms 6.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103 6.2 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 6.3 bldc motor commutat ion with zero crossi ng sensing. . . . . 103 section 7. customization guide 7.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157 7.2 application suitability guide . . . . . . . . . . . . . . . . . . . . . . . . . . 157 7.3 setting of sw parameters for cust omer motor . . . . . . . . . . . 159 section 8. application setup 8.1 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .169 8.2 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 8.3 warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 8.4 application outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 8.5 application description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 8.6 application set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 8.7 projects files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .180 8.8 application build & execute . . . . . . . . . . . . . . . . . . . . . . . . . . 182 appendix a. references f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola 9 appendix b. glossary f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . table of contents designer reference manual DRM026 ? rev 0 10 motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola 11 designer reference manual ? 3-ph bl dc with sensorless adc zc detection list of figures figure title page 2-1 system concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3-1 bldc motor - cross sectio n . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3-2 three phase voltage system . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3-3 bldc motor - back emf and magnetic flux . . . . . . . . . . . . . . 26 3-4 classical system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3-5 power stage - motor topology . . . . . . . . . . . . . . . . . . . . . . . . . 28 3-6 phase voltage waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 3-7 mutual inductance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3-8 detail of mutual inductanc e effect . . . . . . . . . . . . . . . . . . . . . . 34 3-9 mutual capacitance model . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 3-10 distributed back-emf by unbalanced capacity coupling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 3-11 balanced capacity coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3-12 pwm with bldc power stage . . . . . . . . . . . . . . . . . . . . . . . . . 39 3-13 3-phase bldc motor commutation pwm signal. . . . . . . . . . . 40 3-14 bldc commutation with bipolar (hard) switchin g. . . . . . . . . . 41 3-15 bemf zero crossing synchronization with pwm . . . . . . . . . . 44 3-16 commutation control stages . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3-17 alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3-18 flow chart - bldc commutation with bemf zero crossing s ensing. . . . . . . . . . . . . . . . . . . . . . 48 3-19 bldc commutation times with ze ro crossing sensing. . . . . . 49 3-20 vectors of magnetic fields . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 3-21 back-emf at start-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3-22 calculation of the commut ation times duri ng the starting (back-emf acquisition) stage . . . . . . . . . . . . . . . . . . . . . . . . . 55 4-1 low-voltage evalua tion motor hardware system configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 4-2 low-voltage hardware s ystem configuration . . . . . . . . . . . . . 62 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . list of figures designer reference manual DRM026 ? rev 0 12 motorola 4-3 high-voltage hardware system config uration . . . . . . . . . . . . . 64 4-4 block diagram of the dsp56f805evm . . . . . . . . . . . . . . . . . . 67 4-5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 4-6 3-phase ac high voltage power stage . . . . . . . . . . . . . . . . . . 74 5-1 main software flow chart - part 1 . . . . . . . . . . . . . . . . . . . . . . 81 5-2 main software flow chart - part 2 . . . . . . . . . . . . . . . . . . . . . . 82 5-3 data flow - part 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83 5-4 data flow - part 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84 5-5 data flow - part3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 5-6 closed loop control system . . . . . . . . . . . . . . . . . . . . . . . . . . 87 5-7 state diagram - process applicat ion state machine . . . . . . . . 91 5-8 state diagram - process commutati on control . . . . . . . . . . . . 93 5-9 substates - running . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 5-10 state diagram - proc ess adc zero crossing checking . . . . . 97 5-11 state diagram - proc ess adc zero crossing offset setting . . 98 5-12 state diagram - process speed pi controller . . . . . . . . . . . . . 99 5-13 state diagram - process speed pi controller . . . . . . . . . . . . 100 6-1 bldczc_stimes structure members and bldc commutation with zero crossing sensing . . . . . . . . . . . . . . . . . . . . . . . . . . 114 8-1 run/stop switch and up/down buttons at dsp56f805evm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 8-2 user and pwm leds at dsp56f805evm. . . . . . . . . . . . . . 172 8-3 pc master software control window . . . . . . . . . . . . . . . . . . . 174 8-4 set-up of the bldc mo tor control application using dsp56f805evm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 8-5 set-up of the low-voltage bldc motor control application . 176 8-6 set-up of the high-voltage bl dc motor control application . 177 8-7 dsp56f805evm jumper re ference . . . . . . . . . . . . . . . . . . . 179 8-8 target build selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182 8-9 execute make command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola 13 designer reference manual ? 3-ph bl dc with sensorless adc zc detection list of tables table title page 2-1 low voltage eval uation hardware set specif ications . . . . . . . 18 2-2 low voltage hardware se t specifications . . . . . . . . . . . . . . . . 18 2-3 high voltage evaluation hardware set specifications . . . . . . . 19 4-1 electrical characterist ics of the evm motor boar d. . . . . . . . . . 69 4-2 characteristics of the bl dc motor . . . . . . . . . . . . . . . . . . . . . . 69 4-3 electrical chatacteri stics of the 3-ph bldc low voltage power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 4-4 electrical characteristi cs of power stage. . . . . . . . . . . . . . . . . 75 4-5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 6-1 bldczc_stimes structure members . . . . . . . . . . . . . . . . . . . . . 112 6-2 bldczc_sstates structur e members . . . . . . . . . . . . . . . . . . . . 115 6-3 bldczc_sstatecomput structure members . . . . . . . . . . . . . . . 115 6-4 bldczc_sstatecmt structure members . . . . . . . . . . . . . . . . . . 116 6-5 bldczc_sstatezcros structure members. . . . . . . . . . . . . . . . . 116 6-6 bldczc_sstategeneral structure members . . . . . . . . . . . . . . . 117 6-7 bldczchndlrinit arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 6-8 bldczchndlr arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 6-9 bldczctimeoutint alg arguments . . . . . . . . . . . . . . . . . . . . . . . 125 6-10 bldczctimeoutintalg events . . . . . . . . . . . . . . . . . . . . . . . . . . 126 6-11 bldczchndlrstop arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 129 6-12 bldczccomputinit argument s . . . . . . . . . . . . . . . . . . . . . . . . . 130 6-13 bldczccomput arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 6-14 bldczccmtinit arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 6-15 bldczccmtserv arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 6-16 bldczczcinit arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 6-17 bldczczcrosintalg argument s. . . . . . . . . . . . . . . . . . . . . . . . . 138 6-18 bldczczcrosedgeintalg ar guments . . . . . . . . . . . . . . . . . . . . 144 6-19 bldczczcrosserv arguments . . . . . . . . . . . . . . . . . . . . . . . . . 151 6-20 bldczczcrosedgeserv arguments . . . . . . . . . . . . . . . . . . . . . 153 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . list of tables designer reference manual DRM026 ? rev 0 14 motorola 7-1 sw parameters marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 7-2 start-up periods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 8-1 motor application states. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 8-2 dsp56f805evm jumper sett ings . . . . . . . . . . . . . . . . . . . . . 179 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola introduction 15 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 1. introduction 1.1 contents 1.2 application functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.3 benefits of the solu tion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.2 application functionality this reference design de scribes the design of a 3-phase sensorless brushless dc (bldc) motor control wi th back-emf (electromotive force) zero-crossing sensing using an ad conv ertor. it is based on motorola?s dsp56f805 dsp which is dedicated fo r motor control applications. the system is designed as a motor dr ive system for three phase bldc motors and is targeted for applicatio ns in both indust rial and appliance fields (e.g. compressors, air cond itioning units, pumps or simple industrial drives). the reference design incorporates both hardware and software parts of the system including hardware schematics. 1.3 benefits of the solution the design of very low co st variable speed bldc motor control drives has become a prime focus point for the applianc e designers and semiconductor suppliers. today more and more vari able speed drives are put in appliance or automotive products to increase t he whole system efficiency and the product performance. using of the control systems based on semiconductor components and mcus or dsps is mandatory to satisfy requirements for hi gh efficiency, performanc e and cost of the system. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . introduction designer reference manual DRM026 ? rev 0 16 introduction motorola once using the semiconductor com ponents, it is opened to replace classical universal and dc-motors with maintenance-free electrically commutated bldc motors . this brings many advantages of bldc motors when the system costs c ould be maintained equivalent. the advantages of bldc mo tor versus universal and dc-motors are: high efficiency reliability (no brushes) low noise easy to drive features to control the bldc motor, the rotor position must be known at certain angles in order to align the applied voltage with the ba ck-emf, which is induced in the stator winding due to the movement of the permanent magnets on the rotor. although some bldc drives uses sens ors for position sensing, there is a trend to use sensorless control. the position is then evaluated from voltage or current going to the motor. one of the sensorless technique is sensorless bldc control with ba ck-emf (electromotive force) zero-crossing sensing. the advantages of this control are: save cost of the pos ition sensors & wiring can be used where there is impo ssibility or expansive to make additional connections between position sens ors and the control unit low cost system (medium demand for control dsp power) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola system description 17 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 2. system description 2.1 contents 2.2 system specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3 system concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.2 system specification the system was designed to m eet the following performance specifications: control technique incorporates ? using a/d convertor for sensorless back-emf zero crossing commutation control ? motoring mode ? single speed feedback loop ? both direction of the rotation targeted for dsp56f805evm platforms running on one of three optional board and motor hardware sets ? low voltage evaluati on motor hardware set ? low voltage hardware set ? high voltage hardware set at variable line voltage 115 - 230v ac over-voltage, under -voltage, over-current, and temperature fault protection manual interface (start/stop swit ch, up/down push button control, led indication) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . system description designer reference manual DRM026 ? rev 0 18 system description motorola pcmaster interface power stage identification with c ontrol parameters set according to used hardware set the introduced bldc motor control dr ive with back-emf zero crossing using a/d convertor is designed as a dsp system that meets the following general perfor mance requirements: table 2-1. low voltage evaluat ion hardware set specifications hardware boards characteristics input voltage: 12 vdc maximum dc-bus voltage: 16.0 v maximal output current: 4.0 a motor characteristics motor type: 4 poles, three phase, star connected, bldc motor speed range: < 5000 rpm (at 60 v) maximal line voltage: 60 v phase current: 2 a output torque: 0.140 nm (at 2 a) drive characteristics speed range: < 1400 rpm input voltage: 12 vdc maximum dc-bus voltage: 15.8 v protection: over-current, over-voltage, and under-voltage fault protection load characteristic type: varying table 2-2. low voltage hardware set specifications hardware boards characteristics input voltage: 12 vdc or 42 v maximum dc-bus voltage: 16.0 v or 55.0 v maximal output current: 50.0 a f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . system description system specification DRM026 ? rev 0 designer reference manual motorola system description 19 motor -brake set manufactured em brno, czech republic motor characteristics motor type: em brno sm40n 3 phase, star connected bldc motor, pole-number: 6 speed range: 3000 rpm (at 12 v) maximum electrical power: 150 w phase voltage: 3*6.5 v phase current: 17 a brake characteristics brake type: sg40n 3-phase bldc motor nominal voltage: 3 x 27 v nominal current: 2.6 a pole-number: 6 nominal speed: 1500 rpm drive characteristics speed range: < 2500 rpm input voltage: 12 vdc maximum dc-bus voltage: 15.8 v protection: over-current, over-voltage, and under-voltage fault protection load characteristic type: varying table 2-2. low voltage hardware set specifications table 2-3. high voltage evaluat ion hardware set specifications hardware boards characteristics input voltage: 230 vac or 115 vac maximum dc-bus voltage: 407 v maximal output current: 2.93a motor -brake set manufactured em brno, czech republic f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . system description designer reference manual DRM026 ? rev 0 20 system description motorola 2.3 system concept the chosen system concept is show n below. the sensorless rotor position detector detects the zero cr ossing points of back-emf induced in non-fed motor windings. the obtai ned information is processed in order to commutate ener gized phase pair and c ontrol the phase voltage, using pulse-width-modulation. motor characteristics motor type: em brno sm40v 3 phase, star connected bldc motor, pole-number: 6 speed range: 2500 rpm (at 310 v) maximum electrical power: 150 w phase voltage: 3*220 v phase current: 0.55 a brake characteristics brake type: sg40n 3-phase bldc motor nominal voltage: 3 x 27 v nominal current: 2.6 a pole-number: 6 nominal speed: 1500 rpm drive characteristics speed range: < 2500 rpm (determined by motor used) maximum dc-bus voltage: 380 v optoisolation: required protection: over-current, over-voltage, and under-voltage fault protection load characteristic type: varying table 2-3. high voltage evaluat ion hardware set specifications f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . system description system concept DRM026 ? rev 0 designer reference manual motorola system description 21 figure 2-1. system concept the resistor network is used to divide sensed voltages down to a 0-3.3v voltage level. zero crossi ng detection is synchroniz ed with the center of center aligned pwm signal by the software in order to filter high voltage spikes produced by the switchi ng of the igbts (mosfets). 3 phase voltages, dc bus current & dc bus voltage sensing adc speed pi regulator dsp56f80x power line actual speed pwm 3 phase voltages dc-bus voltage/current temperature three-phase inverter 3-ph bldc motor start stop up down pwm generator with dead time pc master sci 3 phase bldc power stage commutation control zero crossing period, position recognition zero crossing duty cycle required speed 1/t commutation period zero crossing time moment f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . system description designer reference manual DRM026 ? rev 0 22 system description motorola the divided phase voltages are connect ed to the a/d convertor module on the dsp and are processed in order to get the back-emf zero crossing signal. the back-emf zer o crossing detection enables position recognition, as explained in previous sections. the software selects one of the phases whic h corresponds to the present commutation step. a current shunt is used to measure the dc-bus current. the obtained signal is rectified and amplified (0 -3.3v with 1.65v offset). the dsp a/d converter as well as zero crossing detection is synchronized with the pwm signal. this synch ronization avoids spik es when the igbts (or mosfets) are switching and simp lifies the elec tric circuit. the a/d converter is also used to sense the dc-bus voltage and drive temperature. the dc-bus voltage is divided down to a 3.3v signal level by a resistor network. the six igbts (copack wi th built-in fly back di ode) or mosfets and gate drivers create a compact power stage. the drivers provide the level shifting that is required to drive high side bri dge circuits commonly used in motor drives. the pw m technique is applied to the control motor phase voltage. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola bldc motor control 23 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 3. bldc motor control 3.1 contents 3.2 brushless dc motor con trol theory. . . . . . . . . . . . . . . . . . . . .23 3.3 control technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 3.2 brushless dc motor control theory 3.2.1 bldc motor target ed by this application the brushless dc motor (bldc moto r) is also referred to as an electronically commuted motor. t here are no brushe s on the rotor and the commutation is performed electron ically at certain rotor positions. the stator magnetic circui t is usually made from magnetic steel sheets. the stator phase windings are inserted in the slots (distributed winding) as shown in figure 3-1 or it can be wound as one coil on the magnetic pole. the magnetization of t he permanent magnets and their displacement on the rotor are chosen such a way that the back-emf (the voltage induced into the stator windi ng due to rotor movement) shape is trapezoidal. this allows the th ree phase volt age system (see figure 3-2 ), with a rectangular shape, to be used to create a rotational field with low torque ripples. the motor can have more then just one pole-pair per phase. this defines the ratio between the elec trical revolution and the mechanical revolution. the bldc motor shown has three pol e-pairs per phase which represent three electrical re volutions per one mechanical revolution. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 24 bldc motor control motorola the rectangular, easy to create, s hape of applied voltage ensures the simplicity of control and drive. but the rotor position must be known at certain angles in order to align the applied voltage with the back-emf. the alignment between back-emf and commutation events is very important. in this condition the mo tor behaves as a dc motor and runs at the best working point. thus simplicity of control and good performance make this motor a nat ural choice for low-cost and high-efficiency applications figure 3-1. bldc mo tor - cross section stator stator winding (in slots) shaft rotor air gap permanent magnets f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control brushless dc motor control theory DRM026 ? rev 0 designer reference manual motorola bldc motor control 25 . figure 3-3 shows number of waveforms: the magnetic flux linkage, the phase back-emf voltage and the phase -to-phase back-emf voltage. the magnetic flux linkage can be measur ed; however in this case it was calculated by integrat ing the phase back-em f voltage, which was measured on the non- fed motor terminals of the bldc motor. as can be seen, the shape of the back-emf is approximately trapezoidal and the amplitude is a function of the actual speed. during the speed reversal the amplitude is changed its sign and the phase se quence change too. the filled areas in the tops of the phase back- emf voltage waveforms indicate the intervals where the particular phase power stage commutations occur. as can be seen, the power switches are cyclically commutated through the six steps. the crossing points of the phase back-emf voltages represent the natural commutation points. in normal operation the commutation is perform ed here. some control techniques advance the commutation by a defined ang le in order to control the drive above the pwm voltage control electrical angle figure 3-2. three phase voltage system f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 26 bldc motor control motorola 3.2.2 3-phase bl dc power stage the voltage for 3-phase bl dc motor is provi ded by a 3-phase power stage controlled by a dsp. the pwm module is us ually implemented on a dsp to create desir ed control signals. a dsp with bldc motor and power stage is shown in figure 3-3 . figure 3-3. bldc motor - b ack emf and magnetic flux ps i_ a ps i_ b ps i_ c ui_a ui_b ui_c ui_a b ui_bc ui_ca atop btop ctop cbot abot bbot phase magnetic flux linkage ph. a ph. b ph. c phase back emf phase-phase back emf ph. a ph. b ph. c a-b b-c c-a acting power switch in the power stage speed reversal ?natural? commutation point f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control brushless dc motor control theory DRM026 ? rev 0 designer reference manual motorola bldc motor control 27 3.2.3 why sensorless control? as explained in the previous section, the rotor position must be known in order to drive a brushless dc motor. if any sensors are used to detect rotor position, then sensed informat ion must be transferred to a control unit (see figure 3-4 ). therefore additional connections to the moto r are necessary. this may not be acceptable for some applications (see 1.3 benefits of the solution ). for additional bldc control info rmation, refer also to an1627 ( appendix a. references , 8 ). 3.2.4 power stage - motor system model in order to explain and simulate the idea of back-emf sensing techniques, a simplified mathematical model based on the basic circuit topology (see figure 3-5 ) is provided. m ~ = ac line voltage power stage control unit position sensors load speed setting position feedback control signals figure 3-4. classical system f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 28 bldc motor control motorola the second goal of the model is to find how the motor characteristics depend on the swit ching angle. the switching angle is the angular difference between a real switching event and an ideal one (at the point where the phase to phase back-emf crosses zero). the motor-drive model consists of a normal three phase power stage plus a brushless dc mo tor. the power for the syst em is provided by a voltage source (u d ). six semiconductor switches (s a/b/c t/b ), controlled elsewhere, allow the rectan gular voltage waveforms (see figure 3-2 ) to be applied. the semicon ductor switches and diode s are simulated as ideal devices. the natural voltage leve l of the whole model is put at one half of the dc-bus voltage. this simplifies the ma thematical expressions. figure 3-5. power stage - motor topology f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control brushless dc motor control theory DRM026 ? rev 0 designer reference manual motorola bldc motor control 29 3.2.4.1 math ematical model the following set of equations is va lid for the presented topology: (eq 3-1.) where: are ?branch? voltages; the voltages between one power stage output and its virtual zero. are motor phase wi nding voltages. are phase back-emf voltages in duced in the stator winding. is the voltage betw een the central poin t of the star of motor winding and the pow er stage natural zero are phase currents the equations (eq 3-1.) can be written taking in to account the motor phase resistance and the inductan ce. the mutual i nductance between u a 1 3 -- -2u va u vb ?u vc ? u ix xa = c + ?? ?? ?? ?? = u b 1 3 -- -2u vb u vc ?u va ?u ix xa = c + ?? ?? ?? ?? = u c 1 3 -- -2u vc u va ?u vb ?u ix xa = c + ?? ?? ?? ?? = u o 1 3 -- -u vx xa = c u ix xa = c ? ?? ?? ?? ?? = 0i a i b i c ++ = u va u vc u a u c u ia u ic u o i a i c f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 30 bldc motor control motorola the two motor phase windi ngs can be neglected becaus e it is very small and has no significant effect for our abstraction level. (eq 3-2.) where: r,l motor phase resistance, inductance the internal torque of the motor itself is defined as: (eq 3-3.) where: t i internal motor torque (no mechanical losses) , motor speed, rotor position x phase index, it stands for a,b,c x magnetic flux of phase winding x it is important to und erstand how the back-emf c an be sensed and how the motor behavior depends on the alignment of the back-emf to commutation events. this is ex plained in the next sections. 3.2.5 back-emf sensing the back-emf sensing tech nique is based on the fact that only two phases of a dc brushl ess motor are connected at a time (see u va u ia ? 1 3 -- -u vx xa = c u ix xa = c ? ?? ?? ?? ?? ?ri a ? l t d d i a + = u vb u ib ? 1 3 -- -u vx xa = c u ix xa = c ? ?? ?? ?? ?? ?ri b ? l t d d i b + = u vc u ic ? 1 3 -- -u vx xa = c u ix xa = c ? ?? ?? ?? ?? ?ri c ? l t d d i c + = t i 1 --- -u ix i x ? xa = c d d x i x ? xa = c == f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control brushless dc motor control theory DRM026 ? rev 0 designer reference manual motorola bldc motor control 31 figure 3-2 ), so the third phase can be used to sense the back-emf voltage. let us assume the situation w hen phases a and b are powered and phase c is non-fed. no current is going through this phase. this is described by the following conditions: (eq 3-4.) the branch voltage c can be calculated when considering the above conditions: (eq 3-5.) as shown in figure 3-5 , the branch voltage of phase c can be sensed between the power stage output c and t he zero voltage level. thus the back-emf voltage is obtained and t he zero crossing can be recognized. the general expression s can also be found: (eq 3-6.) there are two necessary cond itions which must be met: top and bottom switch (in diagonal ) have to be dr iven with the same pwm signal no current is going through the non-fed phase used to sense the back-emf the figure 3-6 shows branch and motor p hase winding voltages during a 0-360electrical interval. shaded re ctangles designate the validity of the equation (eq 3-6.) . in other words, the back-emf voltage can be sensed during designated intervals s ab s bt , are energized u va 1 2 -- -u d + ? =u vb 1 2 -- - u d = , i a i b ? =i c 0 =i c d0 = ,, u ia u ib u ic ++ 0 = u vc 3 2 -- -u ic = u vx 3 2 -- -u ix where x a b c , , = = f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 32 bldc motor control motorola . however simple this solution looks, in reality it is more difficult, because the sensed ?branch? voltage also contains some ripples. 3.2.5.1 effect of mutual inductance as shown in previous equations (eq 3-4.) through (eq 3-6.) , the mutual inductances play an im portant role here. the di fference of the mutual inductances between the coils whic h carry the phase current, and the coil used for back-emf sensing, causes the pwm pulses to be superimposed onto the detected back- emf voltage. in fact, it is produced by the high rate of change of phas e current, transferred to the free phase through the coupling of the mutual inductance. figure 3-7. mut ual inductance effect 0 30 60 90 120 150 180 210 240 270 300 330 360 390 uva ua figure 3-6. phase voltage waveforms 0 v f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control brushless dc motor control theory DRM026 ? rev 0 designer reference manual motorola bldc motor control 33 figure 3-7 shows the real measured ?br anch? voltage. the red curves highlight the effect of the differ ence in the mutual inductances. this difference is not constant. due to the construction of the bldc motor, both mutual inductances vary. they are equal at the position that corr esponds to the back-emf zero crossing detection. the branch waveform detail is shown in figure 3-8 . channel 1 in figure 3-8 shows the disturbed ?branch? voltage. the superimposed ripples clearly match the width of the pwm pulses, and thus prove the conclusions from the theoretical analysis. the effect of the mutual inductanc e corresponds well in observations carried out on the five different bldc motors. these observations were made during the development of the sensorless technique. note: the bldc motor with stator windi ngs distributed in the slots has technically higher mutual inductances than other types. therefore, this effect is more significant. on the other hand the bldc motor with windings wounded on separat e poles, shows minor presence of the effect of mut ual inductance. caution: however noticeable this effect, it does not degrade t he back-emf zero crossing detection because it is canc elled at the zero crossing point. simple additional filtering he lps to reduce ripples further. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 34 bldc motor control motorola figure 3-8. detail of mutual inductance effect 3.2.5.2 effect of mu tual phase capacitance the negative effect of mut ual inductance is not t he only one to disturb the back-emf sensing. so far, the mutual capacitance of the motor phase windings was neglect ed in the motor model, since it affects neither the phase currents nor the gen erated torque. usual ly the mutual capacitance is very small. its infl uence is only signif icant during pwm switching, when the system experiences very high du/dt . the effect of the mutual capacit ance can be studied using the model shown in figure 3-9 . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control brushless dc motor control theory DRM026 ? rev 0 designer reference manual motorola bldc motor control 35 figure 3-9. mutual capacitance model let us focus on the si tuation when the motor phas e a is switched from negative dc-bus rail to positive, and the phase b is switched from positive to negative. this is described by t hese conditions (eq 3-7.) : (eq 3-7.) the voltage that disturbs the back-emf sensing, ut ilizing the free (not powered) motor phase c, can be calculated based the equation: (eq 3-8.) the final expression fo r disturbing voltage can be found as follows: (eq 3-9.) note: (eq 3-9.) expresses the fact that onl y the unbalance of the mutual capacitance (not the capacitance itself ) disturbs the back-emf sensing. when both capacities ar e equal (they are balanc ed), the disturbances disappear. this is demonstrated in figure 3-10 and figure 3-11 . u ccb b c a r c c c c r c r c u /2 d = + - u /2 d = + - u cba i d0 s at s bt s ab s bb i sb i c i cab i c u cac u vc cap u vb u va s ab s bt , pwm u va 1 2 -- -u d ? 1 2 -- -u d =u vb 1 2 -- -u d 1 2 -- -u d ? = , i cac i ccb i c == u vc cap 1 2 -- -u ccb u cac 2r c ++ () u ccb r c + () ? 1 2 -- -u cac u ccb ? () == u vc cap 1 2 -- - 1 c ac ------- - 1 c cb -------- ? ?? ?? i c t d 1 2 -- - c cb c ac ? c cb c ac ? ---------------------- ?? ?? i c t d == f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 36 bldc motor control motorola figure 3-10. distributed back-emf by unbalanced capacity coupling channel 1 in figure 3-11 shows the disturbed ?b ranch? voltage, while the other phase (c hannel 2) is not affected because it faces balanced mutual capacitance. the unbalance wa s purposely made by adding a small capacitor on the motor terminal s, in order to better demonstrate the effect. after the unbalance was removed the ?branch? voltage is clean, without any spikes. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control brushless dc motor control theory DRM026 ? rev 0 designer reference manual motorola bldc motor control 37 figure 3-11. balan ced capacity coupling note: the configuration of the phase win dings end-turns has significant impact; therefore, it needs to be properly m anaged to preserve the balance in the mutual capacity. this is important, especially for prototype motors that are usually hand-wound. caution: failing to maintain balance in t he mutual capacitance can easily disqualify such a motor from us ing sensorless techniques based on the back-emf sensing. usually, the bl dc motors with windings wound on separate poles show minor presence of the mutual capacitance. thus, the disturbance is al so insignificant. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 38 bldc motor control motorola 3.3 control technique 3.3.1 control technique - general overview the general overview of used control technique is shown in figure 2-1 . it will be described in following subsections: pwm voltage generation for bldc back-emf zero crossing sensing sensorless comm utation control speed control the implementation of the control te chnique with all the software processes is shown in flow char t, state diagrams and data flow (see figure 5-1 through figure 5-13 ). f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 39 3.3.2 pwm voltage generation for bldc. figure 3-12. pwm with bldc power stage as was already explained, the th ree phase voltage system shown in figure 3-2 needs to be created to run the bl dc motor. it is provided by 3-phase power stage with 6 igbts (m osfet) controlled by the on-chip pwm module (see figure 3-12 ). the pwm signals wi th state currents are shown in figure 3-13 and figure 3-14 . 3-phase bldc motor pwm3 s bt pwm4 s bt pwm5 s ct pwm6 s ct pwm1 s at pwm2 s ab power source dc voltage pwm1 pwm2 pwm3 pwm4 pwm5 pwm6 dsp56f805 3-phase power stage a b c pulse width modulator (pwm) module mosfet/igbt drivers f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 40 bldc motor control motorola figure 3-13. 3-phase bldc motor comm utation pwm signal figure 3-13 shows that both bottom and top power switches of the ?free? phase must be switched off. this is needed fo r any effective control of brushless dc mo tor with trapezoidal bemf pwm1 s at pwm2 s ab pwm3 s bt pwm4 s bb pwm5 s ct pwm6 s cb electrical angle 0 60 120 180 240 300 360 i a i b i c commutation commutation commutation commutation commutation commutation commutation a-off a-off b-off a-off a-off b-off b-off b-off c-off c-off c-off c-off c-off a-off a-off b-off c-off b-off a-off a-off c-off c-off c-off a-off f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 41 figure 3-14. bldc co mmutation with bipo lar (hard) switching figure 3-14 shows that the diagonal power switches are driven by the same pwm signal as shown with ar row lines. this technique is called bipolar (hard) switching. the volt age across the two connected coils is always dc-bus voltage whenever ther e is a current flowing through these coils. thus the condition for successful bemf zero crossing sensing is fulfill ed as described in 3.2 brushless dc motor control theory . pwm1 s at pwm2 s ab pwm3 s bt pwm4 s bb pwm5 s ct pwm6 s cb electrical angle i a i b i c 60 120 commutation commutation f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 42 bldc motor control motorola 3.3.3 bemf zero crossing sensing 3.3.3.1 a/d convertor used for back-emf zero crossing the back-emf zero crossing is detec ted by sensing the motor non-fed phase ?branch? voltage (u vi in 3.2.5 back-emf sensing ) and dc-bus voltage u d utilizing the adc. (refer to 3.2 brushless dc motor control theory ). the motorola dsp56f80x family offers an excellent on-chip analog-to-digital converter. its uni que feature set provides an automatic detection of the signal cr ossing the value contai ned in the adc offset register. then the back-emf zero crossing can be split into two main tasks: adc zero crossing checking adc zero crossing offset setti ng to follow the variation of the dc-bus voltage 3.3.3.2 adc zero crossing checking the zero crossing for position estima tion is sensed using the a/d convertor. as stated, the a/d convertor has individual adc offse t registers for each adc channels. the valu e in the offset regi ster can be subtracted from the a/d conversion out put. the final result of the a/d conversion is then two?s compliment dat a. the other feature asso ciated to the offset registers is the zero crossing inte rrupt. the zero crossing interrupt is asserted whenever the adc conver sion result changes the sign compared to the previ ous conversion result. re fer to the manual for detailed information. this application utilizes adc zero crossing in terrupt to get the back-emf zero crossing event. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 43 3.3.3.3 adc zero cro ssing offset setting as explained in the previ ous section, the adc offset register is set to one half of the dc-bus value. this is valid at the following conditions: motor phases are symmetrical (all 3-phases have same parameters) hardware dividers for the ad c of the dc-bus and all 3-phase voltages, have equal ratio the adc offset register needs to be continuously updated, to reflect the dc-bus voltage variat ion caused by the ripple of dc-bus voltage. the above mentioned conditi ons are not 100% fulfilled in real drive due to the unbalance in real sensi ng circuitry and the motor phases. therefore, the real application mu st compensate such unbalance. the presented application firs t sets the adc offset registers[0..3] of all 3-phases to: adc offset register[0..3] = ca libration phase vo ltage coefficient * dc-bus where the calibration p hase voltage coefficient is set to 0.5. later during the alignmen t state the calibration phas e voltage coefficient is further corrected. the dc-bus and non-fed phase branch voltage are measured and the correction is calculated according to the following formula: calibration phase volta ge coefficient = (adc offset register + free phase branch voltage)/dc-bus voltage 3.3.3.4 bemf zero crossi ng synchronization with pwm the power stage pwm switching causes the high voltage transient of the phase voltages. this transient is passed to ?free? phase due to mutual capacitor between the mo tor windings coupling. figure 3-15 shows that free phase ?branch? voltage u va is disturbed by pwm voltage shown on phase ?branch? voltage u vb . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 44 bldc motor control motorola figure 3-15. bemf zero crossing synchronization with pwm the non-fed phase ?br anch? voltage u va is disturbed at the pwm switching edges. therefore the presented bldc motor control application synchronizes the back-em f zero crossing detection with pwm. the a/d conversion of phase br anch voltages is triggered in the middle of pwm pulse. then the volt age for back-emf is sensed at the time moments because the non-fed phase branch voltage is already stabilized. 3.3.4 sensorless co mmutation control this section presents sensorless bl dc motor commutation with the back-emf zero crossing technique. in order to start and run the bldc motor, the cont rol algorithm has to go through the following states:: alignment starting (back-emf acquisition) running figure 3-16 shows the transitions between the states. first the rotor is aligned to a known positi on; then the rotation is started without the u va u vb zero crossing sample s/w flag f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 45 position feedback. wh en the rotor moves, the back-emf is acquired so the position is known and can be used to calculate the speed and processing of the commutat ion in the running state. figure 3-16. commut ation control stages 3.3.4.1 alignment before the motor starts, there is a short time (whi ch depends on the motor?s electrical time constant) when the rotor position is stabilized by applying pwm signals to only two mo tor phases (no commutation). the current controller keeps the current within pr edefined limits. this state alignment starting (bemf acquisition) running alignment time expired? start motor minimal correct commutations done? no yes yes no f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 46 bldc motor control motorola is necessary in order to create a high start-up torque. when the preset time-out expires then th is state is finished. the current controller subroutine with pi regulator is called to control dc-bus current. it sets the correct pwm ratio for the required current. the current pi controller works with constant execution (sampling) period determined by pwm frequency: current contro ller period = 1/pwm frequency. the bldc motor rotor position with flux vectors during alignment is shown in figure 3-17 . figure 3-17. alignment 3.3.4.2 running the commutation process is the series of states which assure that the back-emf zero crossing is successful ly captured, the new commutation f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 47 time is calculated and, finally, t he commutation is performed. the following processes needs to be provided: bldc motor commutation service back-emf zero crossing moment capture service computation of commutation times handler for interaction betw een these commutation processes 3.3.4.3 algorithms bldc motor comm utation with zero crossing sensing all these processes are provided by new algorithms which were designed for these type of applic ations. they are described in section 6. software algorithms . diagrams aid in explaining how the commutation works. after commuting the motor phases, a time in terval (per_toff[n] ) is set that allows the shape of the back-emf to be stabilized. stabilization is required because the electro-magnetic interfere nce and fly-back current in antibody diode can gener ate glitches that ma y add to the back-emf signal. this can cause a misinterpr etation of back-emf zero crossing. then the new commutation time (t2[n] ) is preset and performed at this time if the back-emf zero crossing is not captured. if the back-emf zero crossing is captured before the preset commut ation time expires, then the exact calculation of the co mmutation time (t2*[n]) is made based on the captured zero crossi ng time (t_zcros[n]). the new commutation is perform ed at this new time. if (for any reason) the back- emf feedback is lost within one commutation period, correct ive action is taken to return regular states. the flow chart explaining the princi ple of bldc commutationcontrol with bemf zero crossing sensing is shown in figure 3-18 . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 48 bldc motor control motorola figure 3-18. flow char t - bldc commutation with bemf zero crossing sensing service of commutation: bemf zero crossing wait for per_toff until phase missed? bemf zero crossing detected? bemf zero crossing missed service of received bemf has commutation time expired? make motor commutation zero crossing: corrected setting of bemf zero crossing detected between previous commutations? corrective calculation 1. preset commutation corrective calculation 2. corrected setting of commutation time commutation time has commutation time expired? current decays to zero commutation done no yes yes no no no yes yes no yes f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 49 3.3.4.4 running - commut ation times calculation commutation time calculatio n is provided by algorithm bldczccomput described in section 6. software algorithms . figure 3-19. bldc commutation times with zero crossing sensing the following calculations are made to calculate the commutation times (t_next[n]) during the running stage : service of commutation - the commutation time (t_next[n]) is predicted: t_next[n] = t_cmt0[n] + per_cmtpreset[n] = = t_cmt0[n] + coef_cmtprecomp*per_zcrosflt[n-1] coefficient coef_cmtprecomp = 2 at running stage! coef_cmt_preset * t_zcros[n] n-2 n-1 n t_cmt0[n-2] t_cmt0[n-1] t_cmt0[n] zero crossing t_cmt0*[n+1] commutation is preset zero crossing t_cmt0**[n+1] commuted when back-emf per_hlfcmt[n] per_hlfcmt[n] detection signal detection signal zero crossing detection signal commuted at preset time. no back-emf feedback was received back-emf feedback received and evaluated zero crossing is missed per_zcros[n] per_zcros[n-1] per_zcros[n-2] per_toff[n] per_zcros[n] - corrective calculation 1. - corrective calculation 2. t_next[n] t_zcros[n-1] per_zcros0[n] = per_zcros[n] * per_zcrosflt[n-1] f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 50 bldc motor control motorola if coef_cmtprecomp*per_zcrosflt>max_percmt then result is limited at max_percmt service of received b ack-emf zero crossing - the commutation time (t_next*[n]) is evaluated from the captured back-emf zero crossing time (t_zcros[n]): per_zcros[n] = t_zcros[n] - t_zcros[n-1] = t_zcros[n] - t_zcros0 per_zcrosflt[n] = (1/2*per_zcros[n]+1/2*per_zcros0) hlfcmt[n] = 1/2*per_zcrosflt[n]- advance_angle = = 1/2*per_zcrosflt[n]- c_cmt_advance*per_zcrosflt[n]= coef_hlfcmt*per_zcrosflt[n] the best commutation was get with advance_angle: 60deg*1/8 = 7.5deg which means coef_hlfcmt = 0.375 at running stage! per_toff[n+1] = per_zcrosflt*coef_toff and max_percmtproc minimum coef_toff = 0.35 at running stage, max_percmtproc = 100! per_zcros0 <-- per_zcros[n] t_zcros0 <-- t_zcros[n] t_next*[n] = t_zcros[n] + hlfcmt[n] if no back-emf zero crossing was captured during preset commutation period ( per_cmtpreset [n]) then c orrective calculation 1. is made: t_zcros[n] <-- cmtt[n+1] per_zcros[n] = t_zcros[n] - t_zcros[n-1] = t_zcros[n] - t_zcros0 per_zcrosflt[n] = (1/2*per_zcros[n]+1/2*per_zcros0) hlfcmt[n] = 1/2*per_zcrosflt[n]-advance_angle = coef_hlfcmt*per_zcrosflt[n] the best commutation was get with advance_angle: 60deg*1/8 = 7.5deg which means coef_hlfcmt = 0.375 at running stage! per_toff[n+1] = per_zcrosflt*coef_toff and max_percmtproc minimum per_zcros0 <-- per_zcros[n] t_zcros0 <-- t_zcros[n] if back-emf zero crossing is missed then corrective calculation 2. is made: t_zcros[n] <-- cmtt[n]+toff[n] per_zcros[n] = t_zcros[n] - t_zcros[n-1] = t_zcros[n] - t_zcros0 per_zcrosflt[n] = (1/2*t_zcros[n]+1/2*t_zcros0) hlfcmt[n] = 1/2*per_zcrosflt[n]-advance_angle = coef_hlfcmt*per_zcrosflt[n] the best commutation was get with advance_angle: 60deg*1/8 = 7.5deg which means coef_hlfcmt = 0.375 at running stage! f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 51 per_zcros0 <-- per_zcros[n] t_zcros0 <-- t_zcros[n] where: t_cnt0 = time of the last commutation t_next = time of the next time event (for timer setting) t_zcros = time of the last zero crossing t_zcros0 = time of the previous zero crossing per_toff = period of the zero crossing off per_cmtpreset = preset commutation periof from commutation to next commutation if no zero crossing was captured per_zcros = period between zero crossings (estimates required commutation period) per_zcros0 = pervious period between zero crossings per_zcrosflt = estimated period of commutation filtered per_hlfcmt = period from zero crossing to commutation (half commutation) the required commutation ti ming is provided by setting of commutation constants coef_cmtprecompfrac, coef_cmtprecomplshft, coef_hlfcmt, coef_toff, in structure runcomputinit. 3.3.4.5 starting (b ack-emf acquisition) the back-emf sensing technique enables a sensorless detection of the rotor position, however the drive mu st be first started without this feedback. it is caused by the fact that the amplitude of the induced voltage is proportional to the moto r speed. hence, th e back-emf cannot be sensed at a very low speed and a special start-up algorithm must be performed. in order to start the bldc motor the adequate to rque must be generated. the motor torque is proportional to the multiplication of the stator magnetic flux, the roto r magnetic flux and th e sine of angle between these magnetic fluxes. it implies (for bldc motors) the following: 1. the level of phase curr ent must be high enough. 2. the angle between the stator and ro tor magnetic fields must be 90deg30deg. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 52 bldc motor control motorola the first condition is satisfied during the alignment state by keeping the dc-bus current on the level which is su fficient to start the motor. in the starting (back-emf acquisition) st ate the same value of pwm duty cycle is used as the one which has st abilized the dc-bus current during the align state. the second condition is mo re difficult to fulf ill without any position feedback information. afte r the alignment state t he stator and the rotor magnetic fields are ali gned (0deg angle). therefore the two fast (faster then the rotor can foll ow) commutations must be applied to create an angular difference of th e magnetic fields (see figure 3-20 ). the commutation time is defined by start commutation period ( per_cmtstart ) . this allows starting the mo tor such that minimal speed (defined by state when back-emf can be sensed) is achieved during several commutations while producing the re quired torque. until the back-emf feedback is locked the commutat ion process (explained in 3.3.4.2 running ) assures that commutations ar e done in advance, so that successive back-emf zero cro ssing events are not missed. after several successive back- emf zero crossings the exact commutation times can be calculat ed. the commutation process is adjusted and the control fl ow continues to the r unning state. the bldc motor is then running wit h regular feedback and the speed controller can be used to control the motor spe ed by changing the pwm duty cycle value. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 53 figure 3-20. vectors of magnetic fields border of stator pole stator magnetic field rotor magnetic phase winding rotor movement field direction of phase current during one commutation (created by pm) zero crossing edge indicator motor is running at steady-state condition motor is starting alignment stage starting (bemf acquisition) running the rotor position is stabilized by applying pwm signals to only two motor phases the two fast (faster then the rotor can move) commutations are applied to create an angular difference of the stator magnetic field and rotor magnetic field. the back-emf feedback is tested. when the back-emf zero crossing is recognized the time of new commutation is evaluated. until at least two successive back-emf zero crossings are received the exact commutation time can not be calculated. therefore the commutation is done in advance in order to assure that successive back-emf zero crossing events would not be missed. after several back-emf zero crossing events the exact commutation time is calculated. the commutation process is adjusted. motor is running with regular back-emf feedback. with regular back-emf feedback f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 54 bldc motor control motorola figure 3-21. back-emf at start-up figure 3-21 demonstrates the back-em f during the start-up. the amplitude of the back-emf varies according to t he rotor speed. during the starting (back-emf acquisition) state the commutation is done in advance. in the running state the commutation is done at the right moments. running align back-emf zero crossings ideal commutation pattern when position is known real commutation pattern wh en position is estimated phase back-emfs phase a phase c phase b 1? st 2? nd 3? rd 4? rd ................. c top c bot a top b top c top b top a bot b bot c bot a bot c top c bot a top b top b top a bot b bot c bot a bot c top starting (back-emf acquisition) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control control technique DRM026 ? rev 0 designer reference manual motorola bldc motor control 55 figure 3-22 illustrates the sequence of the commutations during the starting (back-emf acquisition) st age. the commutation times t2[1] and t2[2] are calculated without any influence of back-emf feedback. . figure 3-22. calculation of the commutation ti mes during the starting (back-emf acquisition) stage 3.3.4.6 starting - commut ation times calculation the calculations made during starting ( back-emf acquisition) stage can be seen in section 6. software algorithms . even the sub-states of the commutation process of starting (back-emf acquisition) state remain the sa me as during r unning state. the required commutation ti ming depends on mcs state (starting stage, per_cmtstart 2* per_cmtstart per_toff[n] t_zcros[0] t_zcros[n] n=1 n=2 n=3 t_cmt0 [1] t_cmt0 [2] t_cmt0 [3] t2[1] t2[2] t2[n] zero crossing t2*[n] commutation is preset commuted when correct zero crossing t2**[n] commuted when back-emf per_hlfcmt[n] per_hlfcmt[n] detection signal detection signal zero crossing detection signal commuted at preset time. no back-emf feedback was received - corrective calculation 1. back-emf feedback received and evaluated. zero crossing is missed - corrective calculation 2. coef_cmt_preset * * per_zcrosflt[n-1] f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . bldc motor control designer reference manual DRM026 ? rev 0 56 bldc motor control motorola running stage). it is provided by different setting of commutation constants coef_cmtprecompfrac, coef_cmtprecomplshft, coef_hlfcmt, coef_toff, in structure startcomputinit (differs from runcomputinit). so the commutati on times calculation is same as described in 3.3.4.4 running - commut ation times calculation , but the following computation coefficients are different: coefficient coef_cmtprecomp = 2 at starting stage! coefficient coef_hlfcmt = 0.125 with advanced angle advance_angle: 60deg*3/8 = 22.5deg at starting stage! coef_toff = 0.5 at running stage, max_percmtproc = 100! 3.3.5 speed control the speed close loop control is provi ded by a well know n pi regulator. the actual speed (omega_actual) is computed from average of two bemf zero crossing peri ods (time intervals) received from the sensorless commutation control block. the speed controller works with cons tant execution (s ampling) period per_speed_sample_s (request from timer interrupt). f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola hardware design 57 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 4. hardware design 4.1 contents 4.2 system configuration an d documentation . . . . . . . . . . . . . . . . 57 4.3 all hw sets components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 4.4 low-voltage evaluation motor hardware set components . . . 68 4.5 low-voltage hardware se t components . . . . . . . . . . . . . . . . . 70 4.6 high-voltage hardware set components. . . . . . . . . . . . . . . . . 73 4.2 system configuration and documentation the application is designed to drive the 3-phase bldc motor. the hw is a modular system composed fro m board and motor. there are three possible hardware options: high-voltage hardware set configuration low-voltage evaluation motor ha rdware set configuration all hw sets components automatic board identification allo ws one software program runs on each of three hardware and motor platforms without any change of parameters the following subsection shows the system configurations. they systems consists of the fo llowing modules (see also figure 4-3 , figure 4-1 , figure 4-2 ): for all hardware options: dsp56f805evm cont roller board f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 58 hardware design motorola for high-voltage hardwa re set cofiguration: 3-phase ac/bldc hi gh voltage power stage optoisolation board 3-phase bldc high voltage motor with motor brake for low-voltage evaluation motor hardware set configuration: evm motor board 3-phase low voltage evm bldc motor low-voltage hardware set configuration: 3-ph ac/bldc low voltage power stage 3-phase bldc low voltage motor with motor brake figure 4-3 , figure 4-1 and figure 4-2 show the conf iguration with mmds evaluation board. the sections 4.3 all hw sets components , 4.6 high-voltage hardware set components , 4.4 low-voltage evaluation motor hardware set components and 4.5 low-voltage hardware set components will describe the individual boards. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design system configuration and documentation DRM026 ? rev 0 designer reference manual motorola hardware design 59 this page intentionally left blank f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 60 hardware design motorola 4.2.1 low-voltage eval uation motor hardware set configuration the system configuration for a low-voltage eval uation motor hardware set is shown in figure 4-1 . figure 4-1. low-voltage evaluation motor hardware system configuration all the system parts are suppli ed and documented according to the following references: m1 - ib23810 motor ? supplied in kit with ib23 810 motor as: ecmtreval - evaluation motor board kit u2 3 ph ac/bldc low voltage power stage: ? supplied in kit with ib23 810 motor as: ecmtreval - evaluation motor board kit ? described in: motorola embedded motion control evaluation motor board user?s manual (motorola document order number memcevmbum/d) see references 5 j2 gnd j1 40w flat ribbon cable motor j3 controller board evaluation motor board dsp56805evm (dsp56803evm) +12 12vdc ib23810 u2 m1 u1 j30 (p1) ecmtreval f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design system configuration and documentation DRM026 ? rev 0 designer reference manual motorola hardware design 61 u1 controller board for dsp56f805: ? supplied as: dsp56805evm ? described in: dsp evaluation module hard ware user?s manual (motorola document order number dsp56f805evmum/d), see references 2 the individual modules are described in some sections below. more detailed descriptions of the boards can be f ound in comprehensive user?s manuals belongi ng to each board ( references 2 , 5 ). these manuals are available on on the world wide web at: http://www.motorola.com the user?s manual incorporates the schematic of the board, description of individual functi on blocks and a bill of materi als. an individual board can be ordered from motoro la as a standard product. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 62 hardware design motorola 4.2.2 low-voltage hardwa re set configuration the system configuration for low-voltage hardware set is shown in figure 4-2 . figure 4-2. low-voltage hard ware system configuration all the system parts are suppli ed and documented according to the following references: u1 controller board for dsp56f805: ? supplied as: dsp56805evm ? described in: dsp evaluation module hard ware user?s manual (motorola document order number dsp56f805evmum/d), see references 2 . u2 ? 3-phase ac/bldc low voltage power stage red black black j13 j20 gnd eclovacbldc not connected white 40w flat ribbon cable ecmtrlovbldc j5 j30 (p1) sm40n j19 motor-brake u1 white red j16 j17 j18 3ph ac/bldc low voltage power stage u2 mb1 dsp56805evm (dsp56803evm) 12vdc controller board sg40n +12 not connected f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design system configuration and documentation DRM026 ? rev 0 designer reference manual motorola hardware design 63 ? supplied as: eclovacbldc ? described in: motorola embedded motion control 3-phase bldc low-voltage powe r stage user?s manual (motorola document order number me mc3pbldclvum/d3), see references 6 . mb1 - motor-brake sm40n + sg40n ? supplied as: ecmtrlovbldc the individual modules are described in some sections below. more detailed descriptions of the boards can be f ound in comprehensive user?s manuals belongi ng to each board ( references 2 , 6 ). these manuals are available on on the world wide web at: http://www.motorola.com the user?s manual incorporates the schematic of the board, description of individual functi on blocks and a bill of materi als. an individual board can be ordered from motoro la as a standard product. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 64 hardware design motorola 4.2.3 high-voltage hard ware set configuration the system configuration fo r a high-voltage hardwa re set is shown in figure 4-3 . figure 4-3. high-voltage hardwa re system c onfiguration all the system parts are suppli ed and documented according to the following references: u1 controller board for dsp56f805: ? supplied as: dsp56805evm ? described in: dsp evaluation module hard ware user?s manual (motorola document order number dsp56f805evmum/d), see references 2 . u2 ? 3-phase ac/bldc hi gh voltage power stage: ? supplied in kit with optoisolation board as: ecopthivacbldc ? described in: 3-phase ac brushless dc high voltage power stage user?s manual (motorola docume nt order number memc3pbldcpsum /d), see references 3 . black +12vdc ecmtrhivbldc l 40w flat ribbon cable u2 gnd j14 40w flat ribbon cable sg40n optoisolation board not connected motor-brake 49 - 61 hz j1 u3 red mb1 black n 3ph ac/bldc high voltage power stage j30 (p1) white ecopt u1 dsp56805evm (dsp56803evm) jp1.1 jp1.2 controller board 100 - 240vac j5 not connected sm40v white red j11.1 j11.2 pe j13.1 j13.2 j13.3 ecopthivacbldc j2 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design system configuration and documentation DRM026 ? rev 0 designer reference manual motorola hardware design 65 u3 ? optoisolation board ? supplied with 3-ph ase ac/bldc high voltage power stage as: ecopthivacbldc ? or, supplied alone as: ecop t?ecopt optoisolation board ? described in: optoisolation board user?s manual (motorola document order number memcobum/d), see references 4 . note: it is strongly recommended to us e opto-isolation (optocouplers and optoisolation amplifiers) during develop ment time to avoid any damage to the development equipment. mb1 ? motor-brake sm40v + sg40n ? supplied as: ecmtrhivbldc the individual modules are described in some sections below. more detailed descriptions of the boards can be f ound in comprehensive user?s manuals belongi ng to each board ( references 2 , 3 , 4 ). these manuals are available on on the world wide web at: http://www.motorola.com the user?s manual incorporates the schematic of the board, description of individual functi on blocks and a bill of materi als. an individual board can be ordered from motoro la as a standard product. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 66 hardware design motorola 4.3 all hw sets components 4.3.1 dsp56f805evm controller board the dsp56f805evm is used to demon strate the abilities of the dsp56f805 and to provid e a hardware tool allo wing the development of applications that use the dsp56f805. the dsp56f805evm is an evaluation module boar d that includes a dsp56f805 part, per ipheral expansion connecto rs, external memory and a can interface. the expansio n connectors are for signal monitoring and user feature expandability. the dsp56f805evm is designed for the following purposes: allowing new users to become fa miliar with the f eatures of the 56800 architecture. the tools and examples provided with the dsp56f805evm facilitate evaluati on of the feature set and the benefits of the family. serving as a platform for real-t ime software devel opment. the tool suite enables the user to develop and simulate r outines, download the software to on-chip or on-b oard ram, run it, and debug it using a debugger via the jtag/once tm port. the break point features of the once port enable the user to easily sp ecify complex break conditions and to execut e user-developed softwa re at full-speed, until the break conditi ons are satisfied. t he ability to examine and modify all user accessible re gisters, memory and peripherals through the once port greatly faci litates the task of the developer. serving as a platform for hardw are development. the hardware platform enables the user to connect exter nal hardware peripherals. the on-boar d peripherals can be disabled, providing the user with the ability to re assign any and all of the dsp's peripherals. the once port's un obtrusive design means that all of the memory on the board and on the dsp chip are available to the user. the dsp56f805evm provides t he features necessary for a user to write and debug software, demonstr ate the functionality of that software and f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design all hw sets components DRM026 ? rev 0 designer reference manual motorola hardware design 67 interface with the customer's app lication-specific device(s). the dsp56f805evm is flexible enough to allow a user to fully exploit the dsp56f805's features to optimize the performance of their product, as shown in figure 4-4 . figure 4-4. block diag ram of the dsp56f805evm dsp56f805 reset mode/irq address, data & control jtag/once xtal/extal spi sci #0 sci #1 can timer gpio pwm #1 a/d pwm #2 3.3 v & gnd peripheral expansion connector(s) reset logic mode/irq logic program memory 64kx16-bit memory expansion connector(s) jtag connector parallel jtag interface low freq crystal dsub 25-pin data memory 64kx16-bit dsub 9-pin can interface debug leds pwm leds over v sense over i sense zero crossing detect secondary uni-3 primary uni-3 rs-232 interface 4-channel 10-bit d/a power supply 3.3v, 5.0v & 3.3va f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 68 hardware design motorola 4.4 low-voltage evaluation motor hardware set components 4.4.1 evm motor board motorola?s embedded motion control series evm motor board is a 12-volt, 4-amp, surface- mount power stage that is shipped with an mcg ib23810-h1 brushless dc motor. in combination with one of the embedded motion control series control boards, it provides a software development platform that allows algorithms to be written and tested without the need to des ign and build a power stage. it supports algorithms that use hall sensor s, encoder feedba ck, and back emf (electromotive force) sig nals for sensorless control. the evm motor board does not have overcurrent protection that is independent of the control board, so some care in its setup and use is required if a lower impeda nce motor is used. with the motor that is supplied in the kit, t he power output stage will withstand a full-stall condition without the need for overcurrent protec tion. current measuring circuitry is set up for 4 amps full scale. in a 25 c ambient operation at up to 6 amps continuous rm s output current is wi thin the board?s thermal limits. input connections are m ade via 40-pin ribbon cable connector j1. power connections to the motor are made on output connecto r j2. phase a, phase b, and phase c are labeled on the board. po wer requirements are met with a single exter nal 12-vdc, 4-amp power supply. two connectors, labeled j3 and j4, are provided for th e 12-volt power supply. j3 and j4 are located on the front edge of the board. powe r is supplied to one or the other, but not both. 4.4.1.1 electrical characteri stics of the evm motor board the electrical characteristics in table 4-1 apply to operation at 25 c and a 12-vdc power supply voltage. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design low-voltage evaluation motor hardware set components DRM026 ? rev 0 designer reference manual motorola hardware design 69 4.4.2 3-phase low vo ltage evm bldc motor the evm motor board is shipped wit h an mcg ib23810-h1 brushless dc motor. motor-brake specifications are listed in table 2-1 , section 2. other detailed motor ch aracteristics are in table 4-2 this section. they apply to operation at 25 c. table 4-1. electrical characteristics of the evm motor board characteristic symbol min typ max units power supply voltage vdc 10 12 16 v quiescent current i cc ?50? ma min logic 1 input voltage v ih 2.4 ? ? v max logic 0 input voltage v il ??0.8 v input resistance r in ?10? k ? analog output range v out 0?3.3 v bus current sense voltage i sense ?412?mv/a bus voltage sense voltage v bus ?206?mv/v power mosfet on resistance r ds(on) ?3240m ? rms output current i m ?? 6 a total power dissipation p diss ?? 5 w table 4-2. characterist ics of the bldc motor characteristic symbol min typ max units terminal voltage v t ?? 60 v speed @ v t ? 5000 ? rpm torque constant k t ? 0.08 ? nm/a voltage constant k e ? 8.4 ? v/krpm winding resistance r t ?2.8 ? ? winding inductance l ? 8.6 ? mh f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 70 hardware design motorola 4.5 low-voltage hardware set components 4.5.1 3-ph ac/bldc low voltage power stage motorola?s embedded motion control se ries low-voltage (lv) brushless dc (bldc) power stage is de signed to run 3-ph. bldc and pm synchronous motors. it operates from a nominal 12-volt motor supply, and delivers up to 30 amps of rms moto r current from a dc bus that can deliver peak currents up to 46 amps. in comb ination with one of motorola?s embedded motion control seri es control boards, it provides a software development platform that allows algorithms to be written and tested, without the need to design and build a po wer stage. it supports a wide variety of algorithms for co ntrolling bldc motors and pm synchronous motors. input connections are made via 40-pin ri bbon cable connector j13. power connections to the motor are made with fast-on co nnectors j16, j17, and j18. they ar e located along the ba ck edge of the board, and are labeled phase a, ph ase b, and phase c. po wer requirements are met with a 12-volt power supply that has a 10- to 16-volt tolerance. fast-on connectors j19 and j20 are used for the power supply. j19 is labeled +12v and is located on th e back edge of the board. j20 is labeled 0v and is located along t he front edge. cu rrent measuring circuitry is set up for 50 amps full scale. both bus and phase leg currents are measured. a cycle by cycle overcurrent trip po int is set at 46 amps. the lv bldc power stage has both a pr inted circuit board and a power substrate. the printed circuit b oard contains mo sfet gate drive circuits, analog signal conditioning, low-voltage power supplies, and some of the large pa ssive power components. this board also has a continuous current i cs ?? 2 a peak current i ps ?? 5.9 a inertia j m ?0.075 ? kgcm 2 thermal resistance ? ? 3.6 c/w table 4-2. characterist ics of the bldc motor f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design low-voltage hardware set components DRM026 ? rev 0 designer reference manual motorola hardware design 71 68hc705jj7 microcontroller us ed for board conf iguration and identification. all of t he power electronics that need to dissipate heat are mounted on the power substrate. this substr ate includes the power mosfets, brake resistors, current-s ensing resistors, bus capacitors, and temperature sensing diodes. figure 4-6 shows a block diagram. figure 4-5. block diagram 4.5.1.1 electrical char acteristics of the 3-ph bldc low voltage power stage the electrical characteristics in table 4-3 apply to operation at 25 c with a 12-vdc supply voltage. power input bias power brake mosfet gate phase current phase voltage bus current bus voltage monitor zero cross back-emf sense board id block signals to/from control board power module drivers motor to f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 72 hardware design motorola 4.5.2 3-phase bldc low volt age motor with motor brake the low voltage bldc mo tor-brake set incorpor ates a 3-phase low voltage bldc motor em brno sm40n and attached bldc motor brake sg40n. the bldcmotor has six poles. the incremental position encoder is coupled to t he motor shaft, and posit ion hall sensors are mounted between motor and brake. they allow sensing of the position if required by the control algorithm, whic h is not required in this sensorless application. detailed motor-brake specifications are listed in table 2-2 , section 2. table 4-3. electrical chat acteristics of the 3-ph bldc low voltage power stage characteristic symbol min typ max units motor supply voltage vac 10 12 16 v quiescent current i cc ?175 ? ma min logic 1 input voltage v ih 2.0 ? ? v max logic 0 input voltage v il ??0.8 v analog output range v out 0?3.3v bus current sense voltage i sense ?33 ?mv/a bus voltage sense voltage v bus ?60 ?mv/v peak output current (300 ms) i pk ??46 a continuous output current i rms ??30 a brake resistor dissipation (continuous) p bk ??50 w brake resistor dissipation (15 sec pk) p bk(pk) ??100w total power dissipation p diss ??85 w f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design high-voltage hardware set components DRM026 ? rev 0 designer reference manual motorola hardware design 73 4.6 high-voltage ha rdware set components 4.6.1 3-phase ac/bldc hi gh voltage power stage motorola?s embedded motion control seri es high-voltage (hv) ac power stage is a 180-watt (one-fourth hors epower), 3-phase power stage that will operate off of dc i nput voltages from 140 to 230 volts and ac line voltages from 100 to 240 volts. in co mbination with on e of the embedded motion control series control boar ds and an optoisolat ion board, it provides a software development plat form that allows algorithms to be written and tested withou t the need to design and build a power stage. it supports a wide variety of algorithm s for both ac induction and brushless dc (bldc) motors. input connections are made via 40-pin ri bbon cable connector j14. power connections to the motor are made on output connector j13. phase a, phase b, and phase c are labeled ph_a, ph_b, and ph_c on the board. power requir ements are met with a single external 140- to 230-volt dc power supply or an ac li ne voltage. either input is supplied through connector j11. current measuring circuitry is set up for 2.93 amps full scale. both bus and phas e leg currents are measured. a cycle-by-cycle over-current trip point is set at 2.69 amps. the high-voltage ac power stage has bot h a printed circuit board and a power substrate. the printed circui t board contains igbt gate drive circuits, analog signal conditioning, low-voltage power supplies, power factor control circuitry, and so me of the large, passive, power components. all of the power electronics whic h need to dissipate heat are mounted on the power substrate. this substra te includes the power igbts, brake resistors, current s ensing resistors, a power factor correction mosfet, and temp erature sensing diodes. figure 4-6 shows a block diagram. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 74 hardware design motorola figure 4-6. 3-phase ac hi gh voltage power stage 4.6.1.1 electrical charac teristics of the 3- phase ac/bldc high voltage power stage the electrical characteristics in table 4-4 apply to operation at 25 c with a 160-vdc power supply voltage. hv power input switch mode power supply pfc control dc bus brake 3-phase igbt gate phase current phase voltage bus current bus voltage monitor zero cross back-emf sense board id block 3-phase ac signals to/from control board power module drivers motor to f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design high-voltage hardware set components DRM026 ? rev 0 designer reference manual motorola hardware design 75 4.6.2 optoisolation board motorola?s embedded motion control series optoisolation board links signals from a controller to a high-voltage power stage. the board isolates the controller , and peripherals that ma y be attached to the controller, from dangerou s voltages that are pres ent on the power stage. the optoisolation board?s ga lvanic isolation barrier also isolates control signals from high noise in the power stage and pr ovides a noise-robust systems architecture. signal translation is virtually one- for-one. gate drive signals are passed from controller to pow er stage via high-speed, high dv/dt, digital optocouplers. analog feedback signals are passed back through hcnr201 high-linearity analog optocouplers. dela y times are typically table 4-4. electrical char acteristics of power stage characteristic symbol min typ max units dc input voltage vdc 140 160 230 v ac input voltage vac 100 208 240 v quiescent current i cc ?70 ?ma min logic 1 input voltage v ih 2.0 ? ? v max logic 0 input voltage v il ??0.8 v input resistance r in ?10 k ? ? analog output range v out 0?3.3v bus current sense voltage i sense ?563 ?mv/a bus voltage sense voltage v bus ?8.09 ?mv/v peak output current i pk ??2.8 a brake resistor dissipation (continuous) p bk ??50 w brake resistor dissipation (15 sec pk) p bk(pk) ??100w total power dissipation p diss ??85 w f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 76 hardware design motorola 250 ns for digital signals, and 2 s for analog signals. grounds are separated by the optocouplers? galvanic isolation barrier. both input and output connections are made via 40-pin ribbon cable connectors. the pin assignments for bo th connectors are the same. for example, signal pwm_at appears on pin 1 of th e input connector and also on pin 1 of the output connecto r. in addition to the usual motor control signals, an mc68 hc705jj7cdw serves as a serial link, which allows controller software to identify the power board. power requirements for controller side circuitry are met with a single external 12-vdc power supply. powe r for power stage side circuitry is supplied from the power stage through the 40- pin output connector. 4.6.2.1 electrical characteristics of t he optoisolation board the electrical characteristics in table 4-5 apply to operation at 25 c, and a 12-vdc power supply voltage. table 4-5. electri cal characteristics characteristic symbol min typ max units notes power supply voltage vdc 10 12 30 v quiescent current i cc 70 (1) 200 (2) 500 (3) ma dc/dc converter min logic 1 input voltage v ih 2.0 ? ? v hct logic max logic 0 input voltage v il ? ? 0.8 v hct logic analog input range v in 0?3.3v input resistance r in ?10?k ? analog output range v out 0?3.3v digital delay time t ddly ?0.25? s analog delay time t adly ?2? s 1. power supply powers optoisolation board only. 2. current consumption of optoisolation board plus dsp emv board (powered from this power supply) 3. maximum current handled by dc/dc converters f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design high-voltage hardware set components DRM026 ? rev 0 designer reference manual motorola hardware design 77 4.6.3 3-phase bldc high volt age motor with motor brake the high voltage bldc motor-brake set incorporates a 3-phase high voltage bldc motor and attached bldc motor brake. the bldcmotor has six poles. the incremental positi on encoder is coupled to the motor shaft, and position hall sensors are mounted bet ween motor and brake. they allow sensing of the position if required by the control algorithm. detailed motor-brake specif ications are listed in table 2-3 , section 2. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . hardware design designer reference manual DRM026 ? rev 0 78 hardware design motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola software design 79 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 5. software design 5.1 contents 5.2 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.3 main sw flow chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.4 data flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 5.5 state diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 5.2 introduction this section describe s the design of the software blocks of the drive. the software will be descr ibed in terms of: main sw flow chart data flow state diagram for more information on t he control technique used see 3.3 control technique . 5.3 main sw flow chart the main software flow chart incorpor ates the main routine entered from reset, and interrupt states. the main routine includes the initialization of the dsp and the main lo op. it is shown in figure 5-1 and figure 5-2 . the main loop incorporates application state ma chine - the highest sw level which precedes settings for other software le vels, bldc motor commutation control, speed control, alignment current control, etc. the inputs of application state ma chine are run/stop switch state, f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 80 software design motorola required speed omega and drive fault status. required mechanical speed can be set from pc master or manually with up/down buttons. commutation control proceeds bl dc motor commutation with the states described in 3.3 control technique and 5.5.4 state diagram - process commutation control . the speed control is detailed description is in sections 5.4.5 process speed pi controller and 5.5.7 state diagram - process speed pi controller . alignment current cont rol is described in 5.4.6 process current pi controller and 5.5.8 state diagram - process current pi controller . the run/stop switch is checked to pr ovide an input for application state machine (applicationm ode start or stop). the interrupt subroutines provide commutation time r services, adc starting in the pwm reload interrupt, adc service, adc zero crossing checking, limit analog values handling, and over current and overvoltage pwm fault handling. the commutation timer isr is used for comm utation timing and commutation control and zero crossing checking. the speed/alignment time r isr is used for spe ed regulator time base and for alignment stat e duration timing. the pwm reload isr is used to sta rt a/d conversion for adc zero crossing and other channels and me morize the sampling time t_zcsample. the adc zero crossing isr is used to evaluate back-emf zero crossing. the adc completion isr is used to read vo ltages, current and temperature samples from the adc convertor. it also sets current control and zero crossing offset request flags when the current control or zero crossing of fset setting are enabled. the other interrupts in figure 5-2 are used for s ystem fault handling and setting of required mechanical s peed input for ap plication state machine (applicationm ode start or stop). f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design main sw flow chart DRM026 ? rev 0 designer reference manual motorola software design 81 figure 5-1. main software flow chart - part 1 reset initialize commutation control running starting alignment stopped application state machine: drive fault status application mode omega required mechanical control speed control alignment current zero crossing offset check run/stop switch proceed status_commutation: proceeds/sets requirements of: commutation timer oc isr: motor commutation timing commutation. control proceed zero crossing setting interrupt oc cmt timer reture interrupt oc cmt2timer speed/alignment timer oc isr: set speed control request reture interrupt pwm a reload pwm reload isr: start adc (sync. zero crossing) memorize sampling time reture adc zero crossing isr: read phase voltages evaluate zero crossing interrupt adc zero crossing reture adc complete isr: read phase voltages read temperature dc-bus voltage/current set current control rq set zero crossing offset rq interrupt adc complete reture alignment state timing f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 82 software design motorola figure 5-2. main software flow chart - part 2 5.4 data flow the control algorithm process values obtained from the user interface and sensors, generates 3-phase pwm signals for motor control (as can be seen on the data flow analysis). interrupt pwm a fault pwm fault isr: set over-current fault set over-voltage fault emergency stop adc low limit isr: set under-voltage fault set over-heating fault interrupt adc low limit adc high limit isr: set over-voltage fault set over-current fault interrupt adc high limit emergency stop emergency stop rti rti rti up button isr: omega required mechanical interrupt up button rti increment down button isr: omega required mechanical interrupt down button rti decrement f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design data flow DRM026 ? rev 0 designer reference manual motorola software design 83 . figure 5-3. data flow - part 1 omega_required_mech pval0,pval1 pval4,pval5 pval2,pval3 omega_desired_mech omega_actual_mech process process pwm generation u_desired manual speed pc setting master process speed pi controller process current pi controller status_commutation cmd_application dc-bus current (a/d) i_dc_bus applicationmode start/stop switch step_cmt, cmt_drv_rqflag process application state machine f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 84 software design motorola the control algorithm of the bldc motor dr ive with back-emf zero crossing using a/d convertor, is described in shown in figure 5-3 and figure 5-4 . figure 5-4. data flow - part 2 phase u_zc3phase voltages omega_required_mech pval0,pval1 pval4,pval5 pval2,pval3 process process pwm generation manual speed pc setting master process commutation control applicationmode start/stop switch step_cmt, cmt_drv_rqflag status_commutation cmd_application u_dc_bus dc-bus voltage (a/d) process zero crossing offset u_dc_half process adc zero crossing zcross interrupt flag cmd_application setting checking application state machine f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design data flow DRM026 ? rev 0 designer reference manual motorola software design 85 protection processes are shown in figure 5-5 and described in the following sub-sections. figure 5-5. data flow - part3 5.4.1 process appli cation state machine this process controls the application subpro cesses by status and command words as can be seen in figure 5-3 . based on the status of the status_commutation (set by the commutation control process) the cmd_application rq flags are set to request calculation of the current pi controller (alignment state) or speed pi controller (r unning state) and to c ontrol the angular speed u_dc_bus process fault control drivefaultstatus temperature pwm faults (over-voltage/over-current) dc-bus voltage (a/d) temperature (a/d) dc-bus current (a/d) i_dc_bus process application pval0,pval1 pval4,pval5 pval2,pval3 process pwm generation state machine f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 86 software design motorola setting (reflects the st atus of the start/stop switch and the run/stop commands). 5.4.2 process commutation control this process controls sensorless bldc motor commutations as explained in section 3.3 contro l technique . its outputs, step_cmt and cmt_drv_rqflag, are used to set the pwm generation process. the output omega_actual_mech is used for the spe ed controller process. 5.4.3 process adc zero crossing checking this process is based on t he adc zero crossing feat ure. when the free (not energized) phase branch vo ltage changes the sign comparing previous conversion results, the zer o crossing interrupt is initiated. then the bldc motor commutati on control is performed in the zero crossing isr. 5.4.4 process zero crossing offset setting in order to assure proper behavior of the adc zero crossing checking, the adc (zero crossi ng) offset register s are initialized the way that the zero back-emf voltage is converted to zero adc value. the initialization is provided in two steps: calibration of phase voltage coefficients setting of the adc offset registers ( u_dc_bus_half ) according to measured dc-bus voltage the adc offset registers for all free phase voltages are set to u_dc_bus_half . the phase zero crossing calibration c oefficient is obtained during the alignment state (to reflec t the unbalance of the sensing circuitry) from non-fed phase branch vo ltage measurements (average value) and dc-bus voltage measurem ents (average value). coef_calibr_u_phx = ( u_dc_bus_half + u_phx )/ u_dc_bus f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design data flow DRM026 ? rev 0 designer reference manual motorola software design 87 during motor running (and starting) the u_dc_bus_half is continuously updated based on the fo llowing formula: u_dc_bus_half = coef_calibr_u_phx * u_dc_bus 5.4.5 process speed pi controller the general principle of the speed pi control l oop is illustrated in figure 5-6 . . figure 5-6. closed loop control system the speed closed loop control is char acterized by the feedback of the actual motor speed. this informati on is compared with the reference set point and the error signal is generated. the magnitude and polarity of the error signal corresponds to the difference bet ween the actual and desired speed. based on the speed error, the pi controller generates the corrected motor voltage in order to compensate for the error. the speed controller works with a cons tant execution (s ampling) period. the request is driven from the timer interrupt with the constant per_speed_sample_s . the pi controller is pr oportional and integral constants were set experimentally. pi controller controlled system speed error reference speed corrected speed (u_desired) (omega_desired) actual motor speed (omega_actual) - f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 88 software design motorola 5.4.6 process current pi controller the process is similar to the speed controller. the i_dc_bus current is controlled based on the u_dc_bus_desired reference current. the current controller is proce ssed only during alignment stage. the current controller works with a constant execution (sampling) period. determined by pwm frequency: current controller period = 1/pwm frequency. the pi controller is proportional and integral constants were set experimentally. 5.4.7 process pwm generation the process pwm generation creates: the bldc motor commutation pa ttern as described in section 3.2 brushless dc motor control theory required duty cycle 5.4.8 process fault control the process fault control is used for drive protection. it can be understood from figure 5-5 . the drivefaultstatus is passed to the pwm generation process and to the application state machine process in order to disable t he pwms and to control t he application accordingly. 5.5 state diagram the state diagrams of the wh ole sw are described below. 5.5.1 main sw stat es - general overview the sw can be split in to following processes: process application state machine f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design state diagram DRM026 ? rev 0 designer reference manual motorola software design 89 process commutation control process speed pi controller process current pi controller process pwm generation process pwm generation as shown in 5.4 data flow . the general overview of the software states is in the state diagram - process ap plication state machine , which is the highest level (onl y the process fault contro l is on the same level because of the motor emergency stop). the status of all the processe s after reset is defined in 5.5.2 initialize . 5.5.2 initialize the main software initialization provides the following actions: cmdapplication = 0 drivefaultstatus = no_fault pcb motor set identification ? boardid function is used to dete ct one of three possible hardware sets. according to t he used hardware, one of three control constant sets are loaded (functions evm_motor_settings, lv_motor_settings, hv_motor_settings ) adc initialization with zero crossing initialization led diodes initialization switch (start/stop) initialization push buttons (speed up/down) initialization commutation control initialization pwm initialization pwm fault interrupts initialization output compare timers initialization f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 90 software design motorola note: the evm board can be conne cted to the power st age boards. in order to assure the right hardware is connected the board identification is performed. when inappropriate hardware is detected the drivefaultstatus |= wrong_hardware is set, motor remains stopped! 5.5.3 state diagram - pro cess application state machine process application state machine state diagram is displayed in figure 5-7 . application state machine c ontrols the main application functionality. the application can be controlled: manually from pc master in manual control, the application is controlled with start/st op switch and up down push buttons to set required speed. in pc master control mode the start/stop is c ontrolled manually and the required speed is set via the pc master. the motor is stopped whenev er the absolute value of required speed is lower then minimal speed or switch set to stop or if there is a system failure - drive fault (e mergency stop) state is entered. all the sw processes are controlled according this application state machine status. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design state diagram DRM026 ? rev 0 designer reference manual motorola software design 91 figure 5-7. state diagram - pr ocess applicati on state machine 5.5.4 state diagram - process commutation control state diagram of the process co mmutation control is shown in figure 5-8 . the commutation control pr ocess takes care of the sensorless bldc motor commutation. the requirement to run the bldc motor is determined by upper software level application state machine. when the application state mach ine is in bldc stop state, commutation control status is stopped. if it is in bldc stop state, the commutation control goes through the states described in section 3.3 control technique . so there are the foll owing possible states: alignment state drive fault bldc run drive fault bldc stop with required speed (switch = stop) || (abs (req uired speed) <= minimal speed) (switch = run) & (abs (re quired speed) > minimal speed) up button increment required speed down button decrement required speed drive fault reset pc master set required speed required speed setting emergency stop f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 92 software design motorola ? motor is powered with cu rrent through 2 phases - no commutations provided. starting (back-emf acquisition) state ? motor is started wi th making first 2 comm utations, then it is running as at runni ng state using st art parameters for commutation calculation startcomputinit (so the commutation advanc e angle and the per_toff time are different) running state ? motor is running with run parameters for commutation calculation runcomputinit . stopped state ? motor is stopped with no power going to motor phases. the drive starts by setting the ali gnment state where the alignment commutation step is set and alignment state is tim ed. after the time-out the starting state is entered with initializa tion of back-emf zero crossing algorithms for the starting state. after the required number of successive commutations with correct zero crossing, th e running state is entered. the running and starting states are exited to the stopped state, if the number of commutations with wrong zero crossing exceeds the maximal number. the co mmutation control is determined by the variable statuscommutation . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design state diagram DRM026 ? rev 0 designer reference manual motorola software design 93 figure 5-8. state diagram - process commutation control 5.5.4.1 commutation control - running state the state diagram of the commutation control running state is shown in figure 5-9 and is explained in 3.3 control technique . the selection of the state after the motor commut ation depends on t he detection of the back-emf zero crossing during the prev ious commutation period. if no back-emf zero crossing was detected, the co mmutation period is corrected (corrective calculation 1). next, the commutation time and commutation registers are preset. if zero crossing happens during the per_toff time period, the commutat ion period is corrected using the corrective calculation 2. when the commutation time expires, a new commutation is performed. set stop running alignment starting bldc run alignment timeout minimal commutations bldc stop exceeded maximal zero crossing with zero crossing ok set alignment set running set starting done done reset passed error commutations stopped done f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 94 software design motorola figure 5-9. substates - running this state is almost wholly se rviced by the bldc zero crossing algorithms which are documented in section 6. software algorithms . first the bldczchndlr is called with actual ti me from cmt timer counter to control requests and commutation control registers. other bldc zero crossing algorithms are called, accord ing to the request flags. the state services are located in main loop and in cmt (commutation) timer interrupt. 5.5.4.2 commutation c ontrol - starting state the starting state is as the t he running state as described in figure 5-9 . motor commutation calculate next commutation after zero crossing get calculate next commutation after zero crossing missed no zero crossing zero crossing get calculate next commutation after no zero crossing zero crossing missed commutation time preset next commutation settings and timing detected during last commutation period zero crossing detected/missed during last commutation period running - begin (t_next) expired corrective calculation 2. corrective calculation 1. during per_toff f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design state diagram DRM026 ? rev 0 designer reference manual motorola software design 95 5.5.4.3 commutation control - set running this state services the transition fr om starting (back- emf acquisition) state to running st ate by the bldc zero crossing algorithms (see 6.3 bldc motor commutati on with zero cr ossing sensing ) according to the following actions: t_actual = cmt timer counter setting new commutation paramet ers and initialized commutation with bldczchndlrinit algorithm initialization of computation with bldczccomputinit algorithm 5.5.4.4 commutation control - set starting this state is used to set the start of t he motor commutation. the following actions are pe rformed in this state: commutation initialized to st art commutation step and required direction 2 additional motor commutations are prepared (in order to create starting torque) setting commutation paramet ers and commutation handler initialization by bldczchndlrinit algorithm first action from bldczchndlrinit algorithm (for commutations algorithms) is timed by output compare timer for commutation timing control (oc cmt) pwm is set according the above prepared motor commutation steps zero crossing is initialized by bldczcrosinit zero crossing computati on is initialized by bldczccomputinit zero crossing is enabled 5.5.4.5 commutati on control - set stop in this state: f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 96 software design motorola bldczchndlrstop algorithm is called pwm output pad is disabled in or der to stop motor rotation and switch off the mo tor power supply 5.5.4.6 commutation control - set alignment in this state bldc motor is set to alignment state, w here voltage is put across 2 motor phases and current is controlled to be at required value. the following actions are pr ovided in set alignment state: pwm set according to align_step_cmt variable status current controller is initialized pwm output is enabled alignment time is timed by ou tput compare timer for speed and alignment f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design state diagram DRM026 ? rev 0 designer reference manual motorola software design 97 5.5.5 state diagram - pro cess adc zero cr ossing checking figure 5-10. state di agram - process adc zero crossing checking the status of the adc zero crossing checking depends on commutation control st ates. it is enabled onl y during the running and starting commutation control st ates. when the bldc motor is commuted, the new zero crossing phase is preset. when, after motor commutation, the time interval (p er_toff) is passed, the back-emf zero crossing is checked. when the back- emf zero crossing is detected or missed, the commutation control process is informed that a new commutation time needs to be computed. this process is almost entirely prov ided by the bldc zero crossing algorithms. the bldczchndlr is called with actual time from the cmt timer counter. this algorithm is a ssigned to control requests and set some commutation contro l registers. according to the request flags set by this algorithm, other bldc zer o crossing algorithms are called. this process, together wi th the commutation cont rol running state, are the most important so ftware processes for sensorless bldc motor zero crossing back-emf zero crossing commutation zero crossing commutation per_toff after motor motor commutation preset new phase detected/missed zero crossing back-emf zero crossing checking control states: disabled commutated get/missed running/starting reset control states: stop/alignment f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 98 software design motorola commutation. these process services are located in the main loop and in the adc interrupt subroutine. 5.5.6 state diagram - process adc zero crossing offset setting figure 5-11. state diagram - proce ss adc zero crossing offset setting the figure 5-11 state diagram describes t he tuning process of the adc (zero crossing) offset registers described in 3.3 control technique and 5.4.4 process zero cros sing offset setting . measure u_dc_bus and free phase average u_phx commutation status: alignment calibration coefficient coef_calibr_u_phx = setting of adc offset registers to = (u_dc_bus_half + u_phx)/u_dc_bus u_dc_bus_half = coef_calibr_u_phx * u_dc_bus commutation status: alignment end commutation status: running/starting commutation status: stopped zero crossing offset setting disabled reset f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design state diagram DRM026 ? rev 0 designer reference manual motorola software design 99 5.5.7 state diagram - pr ocess speed pi controller figure 5-12. state diagram - process speed pi controller the speed pi contro ller algorithm controllerpitype1 is described in the source code. the controller ex ecution (sampling) period is per_speed_sample , period of speed control timer interrupt. commutation u_desired = pi (reference speed - actual motor speed) set speed control request commutation speed control disabled stopped/alignment/starting running speed control timer interrupt (per_speed_sample) speed control request reset f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 100 software design motorola 5.5.8 state diagram - pr ocess current pi controller figure 5-13. state diagram - process speed pi controller the current pi cont roller algorithm controllerpitype1 is described in the source code. the controller executi on (sampling) perio d is determined by the pwm module period, because the a/d conver sion is started each pwm reload (once per pwm period). th e current control request is set in a/d conversion complete interrupt. 5.5.9 state diagram - process fault control the process fault state is described by interrupt subroutines which provide its functionality. commutation status u_desired = pi (reference current - actual current) start a/d conversions commutation current control disabled set current control request alignment stopped/starting/running a/d conversion complete interrupt (pwm period) pwm reload interrupt (pwm period) current control request reset f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design state diagram DRM026 ? rev 0 designer reference manual motorola software design 101 5.5.9.1 pwm fault a interrupt subroutine this subroutine is called at pwm a fault interrupt. in this interrupt subroutine followi ng faults from pw m fault pins are processed: when over-voltage occurs (the over-voltage fault pin set) ? drivefaultstatus |= overvoltage when over-current occurs (the over-current fault pin set) ? drivefaultstatus |= overcurrent 5.5.9.2 adc low limit interrupt subroutine this subroutine is call ed when at least one adc low limit is detected. in this interrupt subroutine follow ing low limit exc eeds are processed: the undervoltage of the dc-bus voltage ? drivefaultstatus |= undervoltage_adc_dcb the over temperature (detect ed here because of the sensor reverse temperatur e characteristic) ? drivefaultstatus |= overheating 5.5.9.3 adc hig h limit interrupt subroutine this subroutine is called when at least one adc high limit is exceeded. in this interrupt subroutine follow ing high limit exc eeds are processed: the overvoltage of the dc-bus voltage ? drivefaultstatus |= overvoltage_adc_dcb the overcurrent of t he dc-bus current input ? drivefaultstatus |= overcurrent_adc_dcb f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software design designer reference manual DRM026 ? rev 0 102 software design motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola software algorithms 103 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 6. software algorithms 6.1 contents 6.2 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 6.3 bldc motor commutat ion with zero crossi ng sensing. . . . . 103 6.2 introduction this section describes algor ithms that apply specific ally to brushless dc motor types. to give some more in formation, it shows not only the algorithms used in this reference design, but al so some other simmilar algorithms, which are included in sdk softare pack (see appendix a. references , 10 ). 6.3 bldc motor commutation with zero crossing sensing all algorithms for sens orless bldc motor comm utation control based on bemf zero crossing have a name starting with bldczc . this set of algorithm-based functions can process bldc motor sensorless commutation based on bemf zero cro ssing detection. some functions are to be called from t he main software, while others care called from interrupt sub-routines. 6.3.1 introduction the algorithms for bldc motor co mmutation with zero crossing sensing is a gr oup of functions: bldczchndlrinit bldczchndlr f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 104 software algorithms motorola bldczctimeoutintalg bldczchndlrstop bldczccomputinit bldczccomput bldczccmtinit bldczccmtserv bldczczcrosinit bldczczcrosintalg bldczczcrosedgeintalg bldczczcrosserv bldczczcrosedgeserv these algorithms cover essential processes for sensorless bldc commutation: bemf zero crossing detecti on - bldczczcrosintalg, bldczczcrosedgeintalg, bldczczcrosserv,bldczczcros edgeserv, bldczczcrosinit algorithms commutation time calculation - bldczccomput, bldczccomputinit algorithms commutation - bldczccmtserv , bldczccmtinit algorithms interface between processes - bl dczchndlr, bldczctimeoutintalg, bldczchndlrinit, bldczchndlrstop algorithms although the bldczc algorithms are not targeted for any concrete operating system, they were designed for multitasking. from the function call perspective, the bldczc algorithms can be split into two groups: ?interrupt algorithms? - bldczctim eoutintalg, bldczczcrosintalg or bldczczcrosedgeintalg, which should be called inside of interrupts with highest priority to serve asynchronous and time synchronous actions with quick response. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 105 ?service functions? - bldczcz crosserv, bldczczcrosedgeserv, bldczccmtserv, bld czczcomput, etc. shou ld be called from the main software to serve the commut ation status acco rding to their respective comm and variables. cmd_zcros, cmd_cmt, cmd_comput with slower res ponse. these func tions should be called after bldczchndlr, when it sets the fl ags requesting their function calls. bldc commutation can be run very simply and can be multiplexed with other tasks (motor speed control, co mmunication, pfc control etc.). it can also be re alized with bldczc ?service functions ? which are called periodically from a simple main routine loop that also serves the other tasks mentioned above (mot or speed control, communication, pfc control etc.). the bldczc ?service functions? ma y also be called from an appropriate task arbiter, which can guarantee their function calls. 6.3.2 api definition this section defines the api for s ensorless bldc motor control with bemf zero crossing. the header file bldc.h includes all required pr ototypes and structure/type definitions. file bldc.h is used for all bldc mo tor control algorithms and includes bldczc.h . the tables are defined in bldcdrv.h, which is also included in bldc.h . public interface functions: result bldczchndlrinit ( bldczc_sstates *pstates, bldczc_stimes *ptimes, uword16 t_actual, uword16 start_perproccmt, bldczc_estartingmode starting_mode ); result bldczchndlr ( bldczc_sstates *pstates, bldczc_stimes *ptimes, uword16 t_actual ); result bldczctimeoutintalg ( bldczc_sstates *pstates, bldczc_stimes *ptimes, uword16 t_actual); result bldczchndlrstop ( bldczc_sstates *pstates ); f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 106 software algorithms motorola result bldczccomputinit ( bldczc_sstate_comput *pstate_comput, bldczc_stimes *ptimes, uword16 actual_time, bldczc_scomputinit *pcomputinit ); result bldczccomput (bldczc_sstatecomput *pstate_comput, bldczc_stimes *ptimes); result bldczccmtinit ( bldczc_sstate_cmt *pstate_cmt, uword16 start_step_cmt, bldczc_edirection direction ); result bldczccmtserv ( bldczc_sstatecmt *pstate_cmt ); result bldczczcrosinit ( bldczc_sstatezcros *pstate_zcros, bldczc_sstatecmt *pstate_cmt, word16 min_zcrosokstart_ini, word16 max_zcroserr_ini ); result bldczczcrosintalg (bldczc_sstate_zcros *pstate_zcros, uword16 *t_zcros, uword16 t_zcsample, uword16 sample_zcinput); result bldczczcrosedgeintalg (bldczc_sstatezcros *pstate_zcros, uword16 *t_zcros, uword16 t_zcsample, uword16 sample_zcinput); result bldczczcrosserv ( bldczc_sstatezcros *pstate_zcros, bldczc_sstatecmt *pstate_cmt ); result bldczczcrosedgeserv ( bldczc_sstatezcros *pstate_zcros, bldczc_sstatecmt *pstatecmt ); public data structures: typedef struct { uword16 t_cmt0; uword16 t_next; uword16 t_zcros; uword16 t_zcros0; uword16 per_toff; uword16 per_cmtpreset; uword16 per_zcros; uword16 per_zcros0; uword16 per_zcrosflt; uword16 per_hlfcmt; } bldczc_stimes; /* bldc control time dedicated variables */ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 107 typedef union { struct { unsigned int cmtdone_comput_rqflag : 1; /* commutation done comput request flag */ unsigned int zcokget_comput_rqflag : 1;/* zero cross ok get comput request flag*/ unsigned int zcmiss_comput_rqflag : 1; /*zero cross missed comput request flag */ unsigned int cmtprecomp_cmdflag : 1; /* commutation precomputed command flag */ unsigned int toffcomp_cmdflag : 1; /* period toff computed command flag */ unsigned int cmtcomp_cmdflag : 1; /* commutation computed command flag */ unsigned int zc_computflag : 1; /* zero crossing computed flag */ unsigned int bit7 : 1; /* reserved */ unsigned int bit8 : 1; /* reserved */ unsigned int bit9 : 1; /* reserved */ unsigned int bit10 : 1; /* reserved */ unsigned int bit11 : 1; /* reserved */ unsigned int bit12 : 1; /* reserved */ unsigned int bit13 : 1; /* reserved */ unsigned int bit14 : 1; /* reserved */ unsigned int bit15 : 1; /* reserved */ } b; uword16 w16; } bldczc_ucmdcomput; /* bldczc comput functions commands, requests, status flags variable */ typedef struct { bldczc_ucmdcomput cmd_comput; /* comput command variable */ word16 coef_cmtprecomplshft; /* commutation time precomputation coeficient range */ frac16 coef_cmtprecompfrac; /* commutation time precomputationcoeficient */ frac16 coef_hlfcmt; /* half commutation coeficient */ frac16 coef_toff; /* toff zero crossing coeficient */ uword16 const_perproccmt; /* maximal period of commutation proceeding */ /* time of motor coil reverse current */ uword16 max_percmt; /* maximal commutation period */ } bldczc_sstatecomput; /* bldc timeout state variables */ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 108 software algorithms motorola typedef union { struct { unsigned int cmtdone_cmtserv_rqflag; /* commutation done cmtserv request*/ unsigned int cmt_drvrqflag : 1; /* commutation driver request flag */ unsigned int cmtpreset_drvrqflag : 1; /* preset new commutation driver request flag (not necessary for some commutation technique) */ unsigned int dirflag : 1; /* motor direction flag */ unsigned int cmtserv_cmdflag : 1;/* commutation served command flag */ unsigned int cmtdone_cmdflag : 1;/* commutation done command flag */ unsigned int bit6 : 1; /* reserved */ unsigned int bit7 : 1; /* reserved */ unsigned int bit8 : 1; /* reserved */ unsigned int bit9 : 1; /* reserved */ unsigned int bit10 : 1; /* reserved */ unsigned int bit11 : 1; /* reserved */ unsigned int bit12 : 1; /* reserved */ unsigned int bit13 : 1; /* reserved */ unsigned int bit14 : 1; /* reserved */ unsigned int bit15 : 1; /* reserved */ } b; uword16 w16; } bldczc_ucmdcmt; /* bldczc cmt functions commands, requests, status flags variable */ typedef struct { bldczc_ucmdcmt cmd_cmt; /* commutation command variable */ uword16 step_cmt; /* motor commutation step */ uword16 step_cmt_next; /* mext motor commutation step */ } bldczc_sstatecmt; /* bldc commutation state variables */ typedef union { struct { unsigned int zcrosint_enblflag : 1; /* zero crossing enable flag */ unsigned int zcinpmaskpreset_drvrqflag : 1; /* preset input mask driver request flag */ unsigned int cmtdone_zcrosserv_rqflag : 1; /* commutation done zero cros service request flag */ unsigned int cmtprocend_zcrosserv_rqflag : 1; /* commutation proceeding end zero cros service request flag */ unsigned int cmtserv_zcrosserv_rqflag : 1; /* commutation served f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 109 zero cros service request flag */ unsigned int zc_getflag : 1; /* zero crossing get flag */ unsigned int zc_soonflag : 1; /* zero crossing soon (before toff time) */ unsigned int cmt_procflag : 1; /* commutation proceeding flag */ /* motor coil reverse current when switching */ unsigned int zc_toffflag : 1; /* zero crossing off time flag */ unsigned int zcokget_cmdflag : 1;/* zero crossing ok get command flag */ unsigned int zcmiss_cmdflag : 1; /* zero crossing missed command flag */ /* (flag set when zero crossing before toff) */ unsigned int nozcerr_cmdflag : 1;/* no zero crossing get between commutations */ unsigned int zcmisserr_cmdflag : 1;/* zero crossing missed error command flag */ unsigned int cmtdone_zcrosserv_cmdflag : 1; /* commutation done zero cros serv command flag */ unsigned int cmtserv_zcrosserv_cmdflag : 1; /* after commutation served zero cros serviced command flag */ unsigned int endstart_zcrosserv_cmdflag : 1; /* end start up zcros serv command flag */ unsigned int maxzcroserr_zcrosserv_cmdflag : 1; /* zero crossing errors >= max_zcroserr zcros serv command flag */ unsigned int zcinpset_drvrqflag : 1; /* set zc input driver request flag */ unsigned int zctoffend_zcrosserv_rqflag : 1; /* zero crossing time off end zero cros service request flag */ unsigned int expect_zcinp_positivflag : 1; /* expected zero crossing input positive flag */ unsigned int expect_zcinp_positivnextflag : 1; /* next expected zero crossing input positive flag */ unsigned int bit21 : 1; /* reserved */ unsigned int bit22 : 1; /* reserved */ unsigned int bit23 : 1; /* reserved */ unsigned int bit24 : 1; /* reserved */ unsigned int bit25 : 1; /* reserved */ unsigned int bit26 : 1; /* reserved */ unsigned int bit27 : 1; /* reserved */ unsigned int bit28 : 1; /* reserved */ unsigned int bit29 : 1; /* reserved */ unsigned int bit30 : 1; /* reserved */ unsigned int bit31 : 1; /* reserved */ } b; uword32 w32; } bldczc_ucmdzcros; /* bldczc zero crossing functions commands, requests, status flags variable */ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 110 software algorithms motorola typedef struct { bldczc_ucmdzcros cmd_zcros; /* zero crossing command variable */ uword16 mask_zcinp; /* zero crossing input mask */ uword16 mask_zcinpnext; /* next step zero crossing input mask */ uword16 expect_zcinpnext; /* zero crossing next expected value */ uword16 expect_zcinp; /* zero crossing expecte value */ word16 cntr_zcrosok; /* counter ok zero crossing commutations */ word16 min_zcrosokstart;/* minimal ok zero crossings for start mode */ word16 cntr_zcroserr; /* counter succesive error zero crossing commutations */ word16 max_zcroserr; /* maximal error zero crossing commutations*/ uword16 index_zc_phase; /* zero crossing phase index */ uword16 index_zc_phasenext;/* mext zero crossing phase index */ } bldczc_sstatezcros; /* zero state variables */ typedef union { struct { unsigned int comput_algorqflag : 1; /* bldczccomput algorithm call request flag */ unsigned int cmtserv_algorqflag : 1; /* bldczccmtserv algorithm call request flag */ unsigned int zcrosserv_algorqflag : 1; /* bldczczcrosserv function call request flag */ unsigned int timer_drvrqflag : 1; /* setting timer driver request flag */ unsigned int endstartmode_hndlrcmdflag : 1; /* end start mode hndlr command flag*/ unsigned int toffcomp_timeout_infoflag : 1; /* toff period computed information flag */ unsigned int startmode_hndlrflag : 1;/* start mode flag */ unsigned int cmt_timedflag : 1; /* commutation timed flag */ unsigned int cmtpreset_timedflag : 1; /* commutation preset (before zero crosing) timed flag */ unsigned int cmtproc_timedflag : 1; /* commutation proceeding timed flag */ unsigned int zctoff_timedflag : 1; /* zero crossing time off timed flag */ unsigned int zcprepared_timeout_infoflag : 1; /* zero crossing for next commutation prepared information flag */ unsigned int stepprepared_timeout_infoflag : 1; /* cmt_step register for next commutation prepared information flag */ unsigned int cmtprocend_cmdflag : 1; /* commutation proceeding end command flag */ unsigned int zctoffend_cmdflag : 1; /* zero crossing time off end command flag */ unsigned int zctofftest_hndlr_rqflag : 1; /* zero crossing toff passed test (toff passed before timer was set) request flag */ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 111 unsigned int zctoffstart_cmdflag : 1; /* started command flag */ unsigned int cmttest_hndlr_rqflag : 1;/* commutation time test handler required flag */ unsigned int cmttimedstart_cmdflag : 1;/* commutation timing started command flag*/ unsigned int maxzcroserr_hndlrcmdflag : 1; /* maximal successive zero crossing errors >= max_zcroserr command flag */ unsigned int bit20 : 1; /* reserved */ unsigned int bit21 : 1; /* reserved */ unsigned int bit22 : 1; /* reserved */ ............................................................... ....................etc...................................... unsigned int bit28 : 1; /* reserved */ unsigned int bit29 : 1; /* reserved */ unsigned int bit30 : 1; /* reserved */ unsigned int bit31 : 1; /* reserved */ } b; uword16 w16; } bldczc_ucmdgeneral; /* bldczc general functions commands, requests, status flags variable */ typedef struct { bldczc_ucmdgeneral cmd_general; /* general command variable */ } bldczc_sstategeneral; /* bldc timeout and handler state variables */ typedef struct { bldczc_sstatecomput state_comput; bldczc_sstatecmt state_cmt; bldczc_sstatezcros state_zcros; bldczc_sstategeneral state_general; } bldczc_sstates; typedef enum { bldczc_set_default, bldczc_do_not_effect } bldczc_emodeinit; typedef enum { bldczc_starting_m, bldczc_running_m } bldczc_estartingmode; typedef enum { bldczc_acb, bldczc_abc f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 112 software algorithms motorola } bldczc_edirection; typedef struct { uword16 *pstatecmt; } bldczc_szcrosinit; /* bldc comput init variables */ typedef struct { uword16 const_perproccmt; /* maximal period of commutation proceeding */ /* time of motor coil reverse current */ uword16 max_percmt; /* maximal commutation period */ bldczc_emodeinit mode_coefinit; /* bldczc_set_default/bldczc_do_not_effect coef variables */ frac16 coef_cmtprecomplshft; /* commutation time precomputation coeficient range */ frac16 coef_cmtprecompfrac; /* commutation time precomputation coeficient */ frac16 coef_hlfcmt; /* half commutation coeficient */ frac16 coef_toff; /* init zero crossing off time coeficient */ bldczc_emodeinit mode_statecomputinit; /* bldczc_set_default/bldczc_do_not_effect state_comput variables at initialization */ bldczc_emodeinit mode_timesinit; /* bldczc_set_default variables times from per_cmtstart /bldczc_do_not_effect */ uword16 per_cmtstart; /* start commutation periode */ uword16 per_toffstart; /* period zero crossing toff at start */ } bldczc_scomputinit; /* bldc comput init variables */ members : the data structure of bldczc functions is based on two main types: bldczc_stimes and bldczc_sstates . table 6-1. bldczc_stimes structure members t_cmt0 uword16 time of the last commutation t_next uword16 time of the next timer event (for timer setting) t_zcros uword16 time of last zero crossing t_zcros0 uword16 time of previous zero crossing f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 113 the component variables of bldczc_stimes are used to compute the correct commutation time with respect to the zero crossing. they are listed in table 6-1 and graphically represented in figure 6-1 . the figure also shows the principle of bldc motor control with bemf zero crossing described in 6.3.3.6 bldczccomput - bldc zc computation . per_toff uword16 period of zero crossing off per_cmtpreset uword16 preset commutation period from commutation to next commutation if no zero crossing captured per_zcros uword16 period between zero crossings (estimates required commutation period) per_zcros0 uword16 previous period between zero crossings per_zcrosflt uword16 estimated period of commutation filtered per_hlfcmt uword16 period from zero crossing to commutation (?half commutation?) table 6-1. bldczc_stimes structure members f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 114 software algorithms motorola figure 6-1. bldczc_stimes structure members and bldc commutation with zero crossing sensing the bldczc_sstates consists of substructures state_x containing the registers for f our groups of bldczc algorithms; its four members are listed in table 6-2 . all components contain cm d registers with command ( _cmdflag ) and request ( _rqflag ) flags. command fl ags are set in dedicated bldczc functions as informati on about a new stage. request flags are tested as a request to serve a new stage by dedicated bldczc functions. the function bldczchndlr is the interface between command and request flags. coef_cmt_preset * t_z cro s[n] n-2 n -1 n t_cmt0[n-2] t_cmt0[n-1] t_cmt0[n] zero cros sing t_cmt0*[n +1] commutation is preset zero cros sing t_cmt0**[n+1] commuted when back-emf per_hlfcm t[n] per_hlfcmt[n] detection signal detection signal zero crossing detection signal commuted at preset time. no back-emf feedback w as receiv ed back-emf feedback received and evaluated zero crossing is missed per_zcros[n] per_zcros[n-1] per_zcros[n-2] per_tof f[n ] per_zcros[n] - corrective calculation 1. - corrective calculation 2. t_next[ n] t_zcros[n-1] per_zcros0[n] = per_zcros[ n] * per_zcrosflt [n- 1] per_zcros0[n -1]= f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 115 the structure bldczc_sstate_comput is detailed in table 6-3 . the meaning of cmd_comput flags is shown by comments in bldczc_ucmdcomput definitions. table 6-2. bldczc_sstates structure members state_comput bldczc_sstatecomput state for computation functions (bldczccomput, bl dczccomputinit ) state_cmt bldczc_sstatecmt state for commutation functions (bldczccmtserv , bldczctimeoutintalg and bldczccmtinit ) state_zcros bldczc_sstatezcros state variables for zero crossing functions ( bldczczcrosserv, bldczczcrosedgeserv bldczczcrosintalg respectively bldczczcrosedgeintalg and bldczczcrosinit ) state_general bldczc_sstategeneral general state variables ( bldczchndlr , bldczctimeou t, bldczchndlinit,bldczchndlstop and all functions) table 6-3. bldczc_sstatecomput structure members cmd_comput bldczc_ucmdcomput command, request flags variable for computation functions coef_cmtprecomplshft word16 coeficient for commutation precomputation; for scaling by leftshift coef_cmtprecompfrac frac16 coefficient for commutation precomputation; fractional part coef_hlfcmt frac16 coefficient for period from zero crossing to commutation (?half commutation?) coef_toff frac16 coefficient for period that commutation is turned ?off? const_perproccmt uword16 constant of period of commutation proceeding (maximal flyback current decay time) max_percmt uword16 maximal commutation period f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 116 software algorithms motorola the structure bldczc_sstatecmt is detailed in table 6-4 . the meaning of cmd_cmt flags is shown by comments in bldczc_ucmdcmt definitions. the structure bldczc_sstatezcros is detailed in table 6-5 . the meaning of cmd_zcros flags is shown by comments in bldczc_ucmdzcros definitions. table 6-4. bldczc_sstatecmt structure members cmd_cmt bldczc_ucmdcmt command, request flags variable for commutation functions step_cmt uword16 current step of bldc motor commutation (0 - 5) step_cmt_next uword16 next step of bldc motor commutation (0 - 5) table 6-5. bldczc_sstatezcros structure members cmd_zcros bldczc_ucmdzcros command, request flags variable for zero crossing test functions mask_zcinp uword16 zero crossing input mask mask_zcinpnext uword16 zero crossing input mask for next commutation step expect_zcinpnext uword16 zero crossing expected value for next commutation step expect_zcinp uword16 zero crossing expected value cntr_zcrosok word16 counter ok zero crossing commutations min_zcrosokstart word16 minimal ok zero crossings for start mode cntr_zcroserr word16 counter succesive error zero crossing commutations max_zcroserr word16 maximal error zero crossing commutations f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 117 the structure bldczc_sstategeneral consists of only one variable, cmd_general , with generally used co mmand and request flags (for bldczchndlr and bldczctimeoutintalg algorithms).the structure is listed in table 6-6 . 6.3.3 api specification this section specifie s the exact use of each api function. function arguments for each routine are described as in , out , or inout . an in argument means that t he parameter value is an input only to the function. an out argument means that the parameter value is an output only from the function. an inout argument means that a parameter value is an input to the functi on, but the same parameter is also an output from the function. typically, inout parameters are input pointer variables in wh ich the caller passes the address of a preallocated data structure to a function. the function stores its results within that data structure. the actual value of the inout pointer parameter is not changed. index_zc_phase uword16 zero crossing phase index (for bldczcedgeintalg , bldczcedgeserv ) index_zc_phasenext uword16 next zero crossing phase index (for bldczcedgeintalg , bldczcedgeserv ) table 6-5. bldczc_sstatezcros structure members table 6-6. bldczc_sstategeneral structure members cmd_general bldczc_ucmdgeneral command, request flags variable generally used command and request flags f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 118 software algorithms motorola 6.3.3.1 bldczchndlrinit - in itialize bldc zc handler call(s): result bldczchndlrinit ( bldczc_sstates *pstates, bldczc_stimes *ptimes, uword16 t_actual, uword16 start_perproccmt, bldczc_estartingmode starting_mode ); arguments: description: the function bldczchndlrinit initializes the bldc motor zero crossing commutation stru cture to prepare bldc motor commutation begin (mot or start). when the starting_mode variable is set to bldczc_starting_m , function bldczchndlrinit initializes a states and command variables data structure pointed by pointer pstate s, which is used by bldczc functions. it also sets a times stru cture pointed by ptimes. the variables are set when bldczchndlr sets, just after motor commutation (durin g motor running). when the starting_mode variable is set to bldczc_running_m , the status variables are not initia lized; only the running mode of commutation is set (pstates->state_gener al.cmd_general.b.start mode_hndlrflag = 0). returns: the function bldczchndlrinit returns: ?fail (-1)? => if an unexpected status of * pstates structure ?pass (0)? => otherwise table 6-7. bldczchndlrinit arguments pstates out pointer to stru cture with all bldczc state and command variables ptimes inout pointer to structure with all bldczc time variables t_actual in variable containing actual time start_perproccmt in starting period of commutation proceeding (maximal flyback current decay time) starting_mode in bldczc_starting_m mode, bldczc_running_m mode f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 119 range issues: all time variables and components t_x in ptimes structure are to be computed as 16-bi t rollover registers. if results overflow 16 bits, they are not satura ted, but the overfl ow bit is ignored and a low 16 bits word is taken as a result. the t_x variables can then be used as outputs and inputs from a 16-bit past compare timer used as a system clock base. special issues: the function bldczchndlrinit should be called before any call to the function bldczchndlr . usually, bldczchndlrinit is called to start motor commutations. multiple calls may be made to bldczchndlrinit , however, to initialize different bldczchndlr functions which could be used concurrently. call function bldczchndlrstop to set the data structure pstate s initialized by the function bldczchndlrinit when bldc motor commutation ends; this is gener ally an emergency stop. starting and running modes of commutation are al most identical. in the starting mode, the bldczc algorithms set pstates->state_general.cmd_gene ral.b.endstartmode_hndlrcmdfla g flag. after the motor proceeds, pstates->state_zcros.min_zcrosokstart runs in row successive commutations, counted by the pstates->state_zcro s.cntr_zcrosok variable . this functionality is implemented to enable use of different computation constants when the motor starts and then enters running phase. code example 1 : bldczchndlrinit #include "dspfunc.h" #include "bldc.h" /* include bldc motor with zero crossing sensing algorithms */ #define alignment_step_cmt 0x05 /* bldc alignment (start) commutation step index */ #define min_zcrosok_start 0x02 /* minimal zero crossing ok commutation to finish bldc starting phase */ #define max_zcroserr 0x04 /* maximal successive zero crossing errors (to stop commutations) */ ..... static void commutationsetstarting (bldczc_sstates *pstates, bldczc_stimes *ptimes, bldczc_edirection direction, uword16 start_step_cmt, word16 min_zcrosokstart, word16 max_zcroserr); f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 120 software algorithms motorola static void commutationsetrunning (bldczc_sstates *pstates, bldczc_stimes *ptimes ) ..... static bldczc_sstates bldcalgostates; static bldczc_stimes bldcalgotimes; ..... static const bldczc_scomputinit startcomputinit = { /* const_perproccmt = */ const_perproccmt, /* max_percmt */ 0x8000, /* mode_coefinit = */ bldczc_set_default, /* coef_cmtprecomplshft = */ 2, /* coef_cmtprecompfrac = */ frac16(0.5), /* final coef_cmtprecomp = 2 = coef_cmtprecompfrac << coef_cmtprecomplshft */ /* coef_hlfcmt = */ frac16(0.125), /* 1/8 */ /* coef_toff = */ frac16(0.5), /* 1/2 */ /* mode_state_computinit = */ bldczc_set_default, /* mode_timesinit = */ bldczc_set_default, /* per_cmtstart = */ 0x0c00, /* start commutation period */ /* per_toffstart = */ 0x0c00 }; static const bldczc_scomputinit runcomputinit = { /* const_perproccmt = */ const_perproccmt, /* max_percmt */ 0x8000, /* mode_coefinit = */ bldczc_set_default, /* coef_cmtprecomplshft = */ 2, /* coef_cmtprecompfrac = */ frac16(0.5), /* final coef_cmtprecomp = 2 = coef_cmtprecompfrac << coef_cmtprecomplshft */ /* coef_hlfcmt = */ frac16(0.375), /* from 1/4 to 0.375 */ /* coef_toff = */ frac16(0.25), /* 1/4 */ /* mode_state_computinit = */ bldczc_do_not_effect, /* mode_timesinit = */ bldczc_do_not_effect, /* per_cmtstart = */ 0x0400, /* start commutation period */ /* per_toffstart = */ 0x0100 }; ..... commutationsetstarting ( &bldcalgostates, &bldcalgotimes,\ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 121 dir_cmt_actual, alignment_step_cmt,\ min_zcrosok_start, max_zcroserr ); ..... static void commutationsetstarting (bldczc_sstates *pstates, bldczc_stimes *ptimes, bldczc_edirection direction, uword16 start_step_cmt, word16 min_zcrosokstart, word16 max_zcroserr) { uword16 t_actual; bldczccmtinit ( &pstates->state_cmt, start_step_cmt, direction ); pstates->state_cmt.cmd_cmt.b.cmtdone_cmtserv_rqflag = 1; bldczccmtserv ( &pstates->state_cmt ); /* first step shift */ pstates->state_cmt.step_cmt = pstates->state_cmt.step_cmt_next; pstates->state_cmt.cmd_cmt.b.cmtdone_cmtserv_rqflag = 1; bldczccmtserv ( &pstates->state_cmt); /* second step shift */ pstates->state_cmt.step_cmt = pstates->state_cmt.step_cmt_next; /* enable commutation timer */ ioctl (timeroc_cmtfd, qt_enable, (void*)&quadparamcmt ); t_actual = ioctl(timeroc_cmtfd, qt_read_counter_reg, 0 ); bldczchndlrinit ( pstates, ptimes, t_actual, const_perproccmt, bldczc_starting_m ); if ( pstates->state_general.cmd_general.b.timer_drvrqflag == 1) { /* set timer to time cmt procceeding */ ioctl (timeroc_cmtfd, qt_write_compare_value1, ptimes->t_next ); pstates->state_general.cmd_general.b.timer_drvrqflag = 0; }; bldc_cmt_pwm ( pstates->state_cmt.step_cmt ); /* clear commutation driver request flag */ pstates->state_cmt.cmd_cmt.b.cmt_drvrqflag = 0; result bldczczcrosinit ( bldczc_sstatezcros *pstate_zcros, bldczc_sstatecmt *pstate_cmt, word16 min_zcrosokstart_ini, word16 max_zcroserr_ini ); bldczccomputinit ( &pstates->state_comput, &bldcalgotimes, t_actual, &startcomputinit ); pwmioctl(pwmfd, pwm_reload_interrupt, pwm_enable, bsp_device_name_pwm_a); /* enable pwm reload interrupt where bldczcintalg is placed */ } .... static void commutationsetrunning (bldczc_sstates *pstates, bldczc_stimes *ptimes ) { uword16 t_actual; f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 122 software algorithms motorola t_actual = ioctl(timeroc_cmtfd, qt_read_counter_reg, 0 ); bldczchndlrinit ( pstates, ptimes, t_actual, const_perproccmt, bldczc_running_m ); bldczccomputinit(&pstates->state_comput, &bldcalgotimes, t_actual, &runcomputinit ); } .... 6.3.3.2 bldczchndlr - bldc zc handler call(s): result bldczchndlr ( bldczc_sstates *pstates, bldczc_stimes *ptimes, uword16 t_actual ); arguments: description: the function bldczchndlr is a command interface between software modules and the state_comput, state_c mt, state_zcros, state_general data structures. it prepares required acti ons and their timing a ccording to command flags in cmd_zcros, cmd_cmt, cmd_comput, cmd_general . it sets the correct request flags xx_rqflag when dedicated command flags xx_cmdflag are set. when bldczchndlr serves the command flags xx_cmdflag, it clears them. the bldczchndlr function contro ls calls of the bldczc functions. when bldczchndlr sets xx_algorq ( bldczc algorithms requests) , then the required bldczcxx function should be ca lled by the application. table 6-8. bldczchndlr arguments pstates out pointer to stru cture with all bldczc state and command variables ptimes inout pointer to structure with all bldczc time variables t_actual in variable containing actual time f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 123 also , bldczchndlr handles timing, preparing the value for the next required time-out in ptimes->t_next variable, and setting timer_drvrqflag (timer request) in cmd_general register. the timer control driver with times->t_next should be called in the main software whenever the timer request, timer_drvrqflag , is set. the function bldczchndlr also sets other flags accordi ng to the commut ation status. returns: the function bldczchndlr returns: ?fail (-1)? => if unex pected status of * pstates structure ?pass (0)? => otherwise range issues: all time variables and components t_x in ptimes structure are to be computed as 16-bi t rollover registers. if results overflow 16 bits, they are not satura ted, but the overfl ow bit is ignored and a low 16 bits word is taken as a result. the t_x variables can be used as outputs and inputs from a 16 bit past compare timer used as a system clock base. special issues: the bldczchndlr function is in tended to be called periodically from a main routine and can be call ed from a main routine loop with the sequence of main servic e functions (motor speed control, pfc control service, co mmunication service). the bldczc functions were also designed to be used for multitasking if bldczchndlr is called from an appropriate task arbiter. the timer control driver with next t_next should be called in the main software whenever timer request, timer_rq, is set. code example 2 : bldczchndlr #include "dspfunc.h" #include "bldc.h" /* include bldc motor with zero crossing sensing algorithms */ ..... static void bldcrunning ( bldczc_sstates *pstates, bldczc_stimes *ptimes ); static bldczc_sstates bldcalgostates; static bldczc_stimes bldcalgotimes; ..... f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 124 software algorithms motorola bldcrunning ( &bldcalgostates, &bldcalgotimes ); /* function call */ ..... static void bldcrunning ( bldczc_sstates *pstates, bldczc_stimes *ptimes ) { uword16 t_actual; /* read commutation timer actual counter value */ t_actual = ioctl(timeroc_cmtfd, qt_read_counter_reg, 0 ); bldczchndlr ( pstates, ptimes, t_actual ); if ( pstates->state_general.cmd_general.b.timer_drvrqflag == 1) { ioctl (timeroc_cmtfd, qt_write_compare_value1, ptimes->t_next ); pstates->state_general.cmd_general.b.timer_drvrqflag = 0; }; if ( pstates->state_general.cmd_general.b.cmtserv_algorqflag == 1 ) { bldczccmtserv ( &pstates->state_cmt ); pstates->state_general.cmd_general.b.cmtserv_algorqflag = 0; }; if ( pstates->state_general.cmd_general.b.zcrosserv_algorqflag == 1) { bldczczcrosserv ( &pstates->state_zcros, &pstates->state_cmt ); pstates->state_general.cmd_general.b.zcrosserv_algorqflag = 0; }; if ( pstates->state_general.cmd_general.b.comput_algorqflag == 1) { bldczccomput (&pstates->state_comput, ptimes ); pstates->state_general.cmd_general.b.comput_algorqflag = 0; }; } ..... 6.3.3.3 bldczctimeoutintalg - bldc zc time-out in terrupt algorithm call(s): result bldczctimeoutintalg ( bldczc_sstates *pstates, bldczc_stimes *ptimes, uword16 t_actual); arguments: f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 125 description: the bldczctimeoutintalg interrupt algorithm is intended to be called from the timer interrupt. bldczctimeoutintalg has (with bldczchndlr ) the functionality of a command interface between software modules and the state_comput, state_c mt, state_zcros, state_general data structures.it sets pstates status variables for bldczchndlr and other bldczc functions according to the status of each time-out. when motor commutation is needed (timed out), the bldczctimeoutintalg sets cmt_drvrqflag flag in the cmd_cmt command variable .this fl ag is intended to be used by the application as a request for the bldc motor commutation. handles timing, preparing the value for the next required time-out in ptimes->t_next variable, and setting timer_drvrqflag (timer request) in cmd_general register. the timer control driver with t_next should be called in t he main software whenev er the timer request, timer_drvrqflag , is set. the bldczctimeoutintalg handles three essential events: motor commutation timeout, commutation pr oceeding timeout (flyback current decay) and zero crossing time off (the time when bemf zero crossing is not sensed) timeout. these events are differ entiated by the flags cmt_timedflag, cmtproc_timedflag, or zctoff_timedflag, respectively, and are shown in table 6-10 . timing of these events is set inside of this functi on, or inside of bldczchndlr , by preparing the value for the next requir ed timeout in ptimes->t_next variable. the timer control driver with times->t_next should be called by the application software whenever the timer request, timer_drvrqflag , is set. table 6-9. bldczctimeoutintalg arguments pstates out pointer to stru cture with all bldczc state and command variables ptimes inout pointer to structure with all bldczc time variables t_actual in variable containing actual time f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 126 software algorithms motorola returns: the function bldczctimeoutintalg returns: ?fail (-1)? => if unex pected status of * pstates structure ?pass (0)? => otherwise range issues: all the time variabl es and components t_x in ptimes structure are to be computed as 16-bi t rollover registers. if results overflow 16 bits, they are not satura ted, but the overfl ow bit is ignored and a low 16 bits word is taken as a result. the t_x variables can be used as outputs and inputs from a 16-bit past compare timer used as a system clock base. special issues: the bldczctimeoutintalg function is intended to cooperate with the bldczchndlr function. the bldczctimeoutintalg should be call ed as an interrupt algorithm from timer interrupt service r outines with highest priori ty. calling bldczchndlr from the main software is lower pr iority and how bldczchndlr is called depends on the system. it may be called from the main software loop as part of the sequence of ta sks or it may be call ed by an arbiter with multitasking. the bldczctimeoutintalg algorithm is initia lized by the function bldczchndlrinit. table 6-10. bldczctimeoutintalg events cmt_timedflag = 1 commutation timed sets ptimes->t_cmt0 = t_actual sets cmt_procflag = 1, zc_toffflag = 1 sets commutation required cmt_drvrqflag = 1 and prepares timing of commutation proceeding ptimes->t_next = t_actual + const_perproccmt cmtproc_timedflag = 1 commutation proceeding timed (flyback current decay) clears cmt_procflag = 0 sets cmtprocend_cmdflag = 1 prepares timing of ptimes->t_next=ptimes->t_next zctoff_timedflag = 1 zero crossing time off timed clears zc_toffflag = 0 sets zctoffend_cmdflag = 1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 127 code example 3 : bldczctimeoutintalg #include "dspfunc.h" #include "bldc.h" /* include bldc motor with zero crossing sensing algorithms */ ..... static void bldc_cmt_pwm (uword16 step_cmt); static void callbacktimeroc_cmt (void); ..... static bldczc_sstates bldcalgostates; static bldczc_stimes bldcalgotimes; ..... /*****************************************************************/ /*** quadrature timer parameters setting as an output compare ****/ /*** with callbacktimeroc_cmt called at compare ******************/ /*****************************************************************/ static const qt_sstate quadparamcmt = { /* mode = */ qtcount, /* inputsource = */ qtprescalerdiv64, /* 1.825us */ /* inputpolarity = */ qtnormal, /* secondaryinputsource = */ 0, /* countfrequency = */ qtrepeatedly, /* countlength = */ qtpastcompare, /* countdirection = */ qtup, /* outputmode = */ qtassertwhileactive, /* outputpolarity = */ qtnormal, /* outputdisabled = */ 0, /* master = */ 0, /* outputonmaster = */ 0, /* cochannelinitialize = */ 0, /* assertwhenforced = */ 0, /* capturemode = */ qtdisabled, /* comparevalue1 = */ per_start_timeroc_cmt, /* ! */ /* comparevalue2 = */ 0, /* initialloadvalue = */ 0, /* callbackoncompare = */ { callbacktimeroc_cmt, 0 }, /* callbackonoverflow = */ { 0, 0 }, /* callbackoninputedge = */ { 0, 0 } }; f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 128 software algorithms motorola ..... timeroc_cmtfd = open(bsp_device_name_quad_timer_a_2, 0, &quadparamcmt ); /* open commutation timer */ ..... ioctl (timeroc_cmtfd, qt_enable, (void*)&quadparamcmt ); /* enable commutation timer */ ..... /******************************************************/ /*** commutation timer interrupt callback function ****/ /******************************************************/ static void callbacktimeroc_cmt (void) { uword16 t_actual; t_actual = ioctl(timeroc_cmtfd, qt_read_counter_reg, 0 ); bldczctimeoutintalg ( &bldcalgostates, &bldcalgotimes , t_actual ); /* if timer commutation required from bldczctimeoutintalg() */ if (bldcalgostates.state_cmt.cmd_cmt.b.cmt_drvrqflag == 1) { bldc_cmt_pwm ( bldcalgostates.state_cmt.step_cmt ); /* commutate bldc motor */ bldcalgostates.state_cmt.cmd_cmt.b.cmt_drvrqflag = 0; } /* if timer setting required from bldczctimeoutintalg() */ if ( bldcalgostates.state_general.cmd_general.b.timer_drvrqflag == 1 ) { ioctl (timeroc_cmtfd, qt_write_compare_value1, bldcalgotimes.t_next ); /* set new timer event */ bldcalgostates.state_general.cmd_general.b.timer_drvrqflag = 0; } }; ..... /****************************************/ /*** bldc motor commutation function ****/ /****************************************/ static void bldc_cmt_pwm (uword16 step_cmt) { pwmstate = bldczc_cmt_steptable [ step_cmt ]; pwmioctl (pwmfd, pwm_set_channel_mask, pwmstate, bsp_device_name_pwm_a); } ..... f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 129 6.3.3.4 bldczchndlrstop - stop bldc zc handler call(s): result bldczchndlrstop ( bldczc_sstates *pstates ); arguments: description: the function bldczchndlrstop sets the data structure bldczc_sstates , pointed by pstates to stop state of bldczchndlr .it is intended to be used to stop bldc commutation (e.g. for an application emergency stop). returns: the function bldczchndlrstop returns: ?fail (-1)? => if unex pected status of *pstates structure ?pass (0)? => otherwise range issues: none special issues: call bldczchndlrstop when the motor needs to halt the commutation started by bldczchndlrinit; this process is most commonly used for an emergency stop condition. code example4: bldczchndlrstop #include "dspfunc.h" #include "bldc.h" /* include bldc motor with zero crossing sensing algorithms */ ..... static bldczc_sstates bldcalgostates; static bldczc_stimes bldcalgotimes; ..... bldcsetstop ( &bldcalgostates ); table 6-11. bldczchndlrstop arguments pstates out pointer to stru cture with all bldczc state and command variables f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 130 software algorithms motorola ..... static void bldcsetstop ( bldczc_sstates *pstates ) { bldczchndlrstop ( pstates ); pwmioctl(pwmfd, pwm_output_pad, pwm_disable, bsp_device_name_pwm_a); pwmioctl(pwmfd, pwm_reload_interrupt, pwm_disable, bsp_device_name_pwm_a); ioctl (timeroc_cmtfd, qt_disable, (void*)&quadparamcmt ); /* disable commutation timer */ } ..... 6.3.3.5 bldczccomputinit - init ialize bldc zc computation call(s): result bldczccomputinit ( bldczc_sstatecomput *pstate_comput, bldczc_stimes *ptimes, uword16 t_actual, bldczc_scomputinit *pcomputinit ); arguments: description: the bldczccomputinit function is used to initialize the bldczc_sdata data structure, pointed by pdata pointer for bldczccomput. it should be called when initia lization for bldc motor commutation begins. this function sets pstate_comput command variables and the time and period vari ables in the data structure pointed by ptimes. returns: the function bldczccomputinit returns: ?fail (-1)? => if unex pected status of *pstate_comput structure ?pass (0)? => otherwise table 6-12. bldczccomputinit arguments pstate_comput out pointer to structure with computation state and command variables ptimes out pointer to structure with all bldczc time variables t_actual in variable containing actual time pcomputinit in pointer to compute initialization structure f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 131 range issues: all the time variables and components t_x in ptimes structure are to be computed as 16-bi t rollover registers. if results overflow 16 bits, they are not satura ted, but the overfl ow bit is ignored and a low 16 bits word is taken as a result. the t_x variables can be used as outputs and inputs from a 16-bit past compare timer used as a system clock base. special issues: the bldczccomputinit function should be used for initializing the function bldczczcomput after bldchndlrinit is called. code example: see code example 1: bldczchndlrinit . 6.3.3.6 bldczccomput - bldc zc computation call(s) : result bldczccomput (bldczc_sstatecomput *pstate_comput, bldczc_stimes *ptimes); arguments: description: the bldczccomput function computes the commutation periods according to the command variables cmd_comput and updates the period and time variables in the * p_zc_bldc data structure. call bldczccomput after bldczchndlr , when the flag comput_rq (computation required) is set . the commutation is computed according to figure 6-1 ; states? actions are explained below. service of commutation - general ? after bldc motor commutation, when pstate_zcros->cmd_compu t.b.cmtdone_comput_rqflag = 1, table 6-13. bldczccomput arguments pstate_comput inout pointer to structure with computation state and command variables ptimes inout pointer to structure with all bldczc time variables f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 132 software algorithms motorola ? the action of bldczccomput : ? preset commutation period per_cm tpreset (time) is predicted: per_cmtpreset[n] = coef_cmtprecomp*per_zcrosflt[n-1] usually coefficient coef_cmtprecomp = 2 if coef_cmtprecomp*per_zcrosflt>max_percmt then result is limited at max_percmt ? then the time of the next commutation: commutation time [n] = t_cmt0[n] + per_cmtpreset[n] = = t_cmt0[n] + coef_cmtprecomp*per_zcrosflt[n-1] will be set by bldczchndlr if no zero crossing received. service of received b ack-emf zero crossing ? after back-emf zero cr ossing received, when pstate_zcros->cmd_comput. b.zcokget_comput_rqflag = 1 ? half commutation period per_hlfcmt (t2*[n] is computed from the captured back-emf zero crossing time ( t_zcros[n] ), and variables updated: per_zcros[n] = t_zcros[n] -t_zcros[n-1] = = t_zcros[n] - t_zcros0 per_zcrosflt[n] = (1/2*per_zcros[n]+1/2*per_zcros0) per_hlfcmt[n] = 1/2*per_zcrosflt[n]- advance_angle = = 1/2*per_zcrosflt[n]- c_cmt_advance*per_zcrosflt[n]= coef_hlfcmt*per_zcrosflt[n] usually coefficient c_cmt_advance = 1/4 per_toff[n+1] = per_zcrosflt*coef_toff and max_percmtproc minimum per_zcros0 <-- per_zcros[n] t_zcros0 <-- t_zcros[n] ? then the next commutation time: commutation time [n] = t_zcros[n] + per_hlfcmt[n] will be set by bldczchndlr . service of commutation after non-zero crossing - corrective calculation 1 ? if no back-emf zero crossing wa s captured during preset commutation period, per_cmtpreset , when: pstate_zcros->cmd_compu t.b.cmtdone_comput_rqflag = 1 and pstate_zcros->cmd_comput .b.zc_computflag = 1 : f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 133 ? the action of bldczccomput is: t_zcros[n] <-- t_cmt0[n+1] ? then bldczccomput performs the same calculations as service of received back-emf zero crossing and ? service of commutation - general with the preset commutation period per_cmtpreset prediction will proceed as usual - service of back-emf zero crossing (soon) is missed - corrective calculation 2 ? if back-emf zero crossing wa s captured before the end of per_toff , when pstate_zcros->cmd_comput. b.zcokget_comput_rqflag = 1: ? the action of bldczccomput is: t_zcros[n] <-- t_c mt0[n]+per_toff[n] ? then bldczccomput performs the same calculations as service of received back-emf zero crossing and the next commutation time: commutation time [n] = t_zcros[n] + per_hlfcmt[n] will be set by bldczchndlr . returns: the function bldczccomput returns: ?fail (-1)? => if unex pected status of *pstate_comput structure ?pass (0)? => otherwise range issues: all the time vari ables and components t_x in ptimes structure are to be computed as 16-bi t rollover registers. if results overflow 16 bits, they are not satura ted, but the overfl ow bit is ignored and a low 16 bits word is taken as a result. the t_x variables can be used as outputs and inputs from a 16-bit past compare timer used as a system clock base. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 134 software algorithms motorola special issues: the bldccomput function is intended to be called after the bldczchndlr function if the cmd_general.b.comput_algorqflag is set; but the function could also be used alone after in itialization by function bldccomputinit. code example: see code example 1: bldczchndlrinit . 6.3.3.7 bldczccmtinit - initia lize bldc zc commutation service call(s): result bldczccmtinit ( bldczc_sstatecmt *pstate_cmt, uword16 start_step_cmt, bldczc_edirection direction ); arguments: description: the bldczccmtinit function initializes data structure for the bldczccmtserv function . it should be called when initialization for bldc motor commutation begins and when st arting the motor. it sets the commutation step variable pstate_cmt->step_cmt = pstate_cmt->step_cmt = start_step_cmt and cmd_cmt command bytes. returns: the function bldczccmtinit returns: ?fail (-1)? => if unex pected status of *pstate_comput structure ?pass (0)? => otherwise range issues: none special issues: the bldczccomputinit function should be used for initialization of the function bldczczcomput after bldchndlrinit is called. table 6-14. bldczccmtinit arguments pstate_cmt out pointer to structure with commutation state and command variables start_step_cmt in start commutation step direction in required motor running dire ction enum bldczc_abc, bldczc_acb f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 135 code example: see code example 1: bldczchndlrinit . 6.3.3.8 bldczccmtserv - bl dc zc commutation service call(s): result bldczccmtserv ( bldczc_sstatecmt *pstate_cmt ); arguments: description: the bldczccmtserv function should be called from the main software before the motor is commuted, with a device-specific driver called from in terrupt. it changes the cmd_cmt command and the next commutation step variable step_cmt_next, according tothe pstate_cmt->cmd_cmt.b.dirflag : commutation direction s equention of pwm phases acb: when: pstate_cmt->cmd_cmt.b.dirflag = 0: if: pstate_cmt->step_cmt_next>= max_step_cmt then: set min_step_cmt, else: pstate_cmt->step_cmt_next = ps tate_cmt->step_ cmt_next + 1 commutation direction s equention of pwm phases abc: when pstate_cmt->cmd_cmt.b.dirflag = 1: if pstate_cmt->step_cmt_next =< min_step_cmt table 6-15. bldczccmtserv arguments pstate_cmt inout pointer to structure with commutation state and command variables f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 136 software algorithms motorola then: set max_step_cmt, else: pstate_cmt->step_cmt_next = ps tate_cmt->step_ cmt_next - 1 returns: the function bldczccmtserv returns: ?fail (-1)? => if unex pected status of *pstate_comput structure ?pass (0)? => otherwise range issues: none special issues: the function bldczccmtserv should be called after bldczchndlr , when the flag cmtserv_algorq in the cmd_general variable is set by bldczchndlr . the bldczchndlr sets this request after motor commutation is done. the bldczccmtserv function should be used after initialization by the function bldczcmtinit. code example: see code example 2: bldczchndlr 6.3.3.9 bldczczcrosin it - initialize bl dc zc zero crossing call(s): result bldczczcrosinit ( bldczc_sstatezcros *pstate_zcros, bldczc_sstatecmt *pstate_cmt, word16 min_zcrosokstart_ini, word16 max_zcroserr_ini ); arguments: table 6-16. bldczczcinit arguments pstate_zcros out pointer to structure with zero crossing state and command variables pstate_cmt in pointer to structure with commutation state and command variables min_zcrosokstart_i ni in minimal commutation with ok zero crossing to set endstart_zcrosserv_cmdflag f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 137 description: the bldczczcrosinit function is used to initialize commutation for bldczczcrosserv (alternatively, bldczczcrosedgeserv ) and bldczczcrosintalg (alternatively, bldczczcrosedgeintalg). it should be called when initializing bldc, before motor commutation is started. it sets current and next zero crossing masks, expected ze ro crossing input, and cmd_zcros command variables for bemf zero crossing sensing. pstate_zcros->mask_zcinp = = mask_zcinptab [pstat e_cmt->step_cmt ] pstate_zcros->index_zc_phase = = zc_phase_tab [ pstatecmt->step_cmt ]; pstate_zcros->expect_zcinp = = expect_zcinp_tab [ ps tate_cmt->step_cmt ] [pstate_cmt->cmd_cmt.b.dirflag ] ; pstate_zcros->cmd_zcros.b.exp ect_zcinp_positivflag = \ expect_zcinpflag_tab [ ps tatecmt->step_cmt ] [pstatecmt->cmd_cmt.b.dirflag ]; pstate_zcros->mask_zcinpnext = pstate_zcros->mask_zcinp; pstate_zcros->index_zc_phasenext = pstate_zcros->index_zc_phase; pstate_zcros->expect_zcinpnext = pstate_zcros->expect_zcinp; pstate_zcros->cmd_zcros.b.exp ect_zcinp_positivnextflag = = pstate_zcros-> cmd_zcros.b. expect_zcinp_positivflag; returns: the function bldczccmtinit returns: ?fail (-1)? => if unex pected status of *pstate_zcros structure max_zcroserr_ini in maximum number of commutations with zero crossing error initial value to set maxzcroserr_zcrosserv_cmdflag table 6-16. bldczczcinit arguments f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 138 software algorithms motorola ?pass (0)? => otherwise range issues: none special issues: the bldczczcrosinit function is intended to be called after the bldczchndlrinit function, but it can al so be used alone for initialization of functions bldczcmtserv and bldczcmtintalg. code example: see code example 1: bldczchndlrinit . 6.3.3.10 bldczczcrosintalg - bldc zc zero crossing interrupt algorithm call(s): result bldczczcrosintalg (bldczc_sstatezcros *pstate_zcros, uword16 *t_zcros, uword16 t_zcsample, uword16 sample_zcinput); arguments : description: the bldczczcrosintalg interrupt algorithm serves bemf zero crossing sensing. this function has simi lar functionality to bldczczcrosedgeintalg. the application?s requirements will determine which of these functions is used: table 6-17. bldczczcrosintalg arguments pstate_zcros inout pointer to structure with zero crossing state and command variables t_zcros out pointer to zero crossing time variable t_zcsample in time of zero crossing sampling sample_zcinput in zero crossing input sample (low 3 bits masked by mask_zcinp , bit2 - phase a, bit1 - phase b, bit0 - phase c) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 139 bldczczcrosintalg should be us ed for applications when the zero crossing level is sensed continuous ly (more interrupts checking the zero crossing level ) and the edge is evaluated by bldczczcrosintalg. bldczczcrosedgeintalgedge shoul d be used for applications when the zero crossing level is called only when the zero crossing edge appears (zero crossing edge interrupt) the algorithm bldczczcrosintalg should be called fr om an interrupt. it checks bemf input to capture bemf zero cro ssing edge. the bldczczcrosintalg cooperates with the bldczczcrosserv, which should be called from the main software after bldczchndlr . the bldczczcrosintalg checks the bemf signal very quickly according to its inputs: sample ( zc_samplflag ) and sample time ( t_zcsampl ), which are the results of input sampling. the bldczczcrosintalg sets zero crossing time ( t_zcros ). the remaining serv ices for bemf zero crossing are left to bldczczcrosserv. although not required, it is possible for the applicatio n software to call the bldczczcrosintalg algorithm from the pwm reload interrupt of the central-aligned pwm. the zero crossing detection is then synchronized with the middle of the pwm pulse, where the zero crossing signal is most stable. the functionality is according to zero crossing timing: bemf zero crossing received: when: pstate_zcros->cmd_zcr os.b.zc_toffflag=0 (a fter toff time period after last commutation) and pstate_zcros->cmd_zcros.b.zc_ge tflag = 0 (zero crossing not get yet) and pstate_zcros->expect_zc inp = sample_zcinput (expected and sampled inputs are same) then: *t_zcros = t_zcsample (zero crossing time is set) pstate_zcros->cmd_zcr os.b.zcokget_cmdflag = 1; (zero crossing ok get command) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 140 software algorithms motorola pstate_zcros->cmd_z cros.b.zc_getflag = 1 (zero crossing get flag is set) pstate_zcros->cntr_zcrosok ++ (ok succesive zero crossing counter incremented) pstate_zcros->cntr_zcroserr = pstate_zcros->max_zcroserr (zero crossing error down counter set to max) bemf zero crossing (soon) missed: when: the zero crossing was assume d, it appeared before pstate_zcros->cmd_z cros.b.zc_toffflag =0 (before toff time period after last commutation) then: pstate_zcros->cmd_zcr os.b.zcmiss_cmdflag = 1; (zerocrossing missed command) pstate_zcros->c ntr_zcroserr (zero crossing down counter decremented) pstate_zcros->cnt r_zcrosok = 0 (ok succesive zero crossing counter cleared) returns: the function bldczccmtinit returns: ?fail (-1)? => if unex pected status of *pstate_zcros structure ?pass (0)? => otherwise range issues: all the time variabl es and components t_x in ptimes structure are to be computed as 16-bi t rollover registers. if results overflow 16 bits, they are not satura ted, but the overfl ow bit is ignored and a low 16 bits word is taken as a result. the t_x variables can be used as outputs and inputs from a 16-bit past compare timer used as a system clock base. special issues: the bldczczcrosintalg function is intended to cooperate with the bldczczcrosserv function. the bldczczcrosintalg should be called as an interrupt algorithm from pwm interrupt for cent ral-aligned pwm with highest priority. calling bldczczcrosserv from the main software is lower priority and how f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 141 bldczczcrosserv is called depends on the syst em. it may be called from the main software loop as part of the sequence of tasks, or it may be called by an arbiter with multitasking. the bldczczcrosintalg sets the zcros_tst flag. when spstate_zcros->cmd_zcro s.b.zcrosint_enblflag is set, bldczczcrosintalg should be called in the interrupt. this will ensure zero crossing sensing at th e appropriate time. the function bldczczcrosintalg is initialized by the function bldczczcrosinit. code example 5: bldczczcrosintalg #include "dspfunc.h" #include "bldc.h" /* include bldc motor with zero crossing sensing algorithms */ ..... static void pwm_reload_a_callback(void); ..... static bldczc_sstates bldcalgostates; static bldczc_stimes bldcalgotimes; ..... /*****************************************************************/ /*** quadrature timer parameters setting as an output compare ****/ /*** with callbacktimeroc_cmt called at compare ******************/ /*****************************************************************/ static const qt_sstate quadparamcmt = { /* mode = */ qtcount, /* inputsource = */ qtprescalerdiv64, /* 1.825us */ /* inputpolarity = */ qtnormal, /* secondaryinputsource = */ 0, /* countfrequency = */ qtrepeatedly, /* countlength = */ qtpastcompare, /* countdirection = */ qtup, /* outputmode = */ qtassertwhileactive, /* outputpolarity = */ qtnormal, f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 142 software algorithms motorola /* outputdisabled = */ 0, /* master = */ 0, /* outputonmaster = */ 0, /* cochannelinitialize = */ 0, /* assertwhenforced = */ 0, /* capturemode = */ qtdisabled, /* comparevalue1 = */ per_start_timeroc_cmt, /* ! */ /* comparevalue2 = */ 0, /* initialloadvalue = */ 0, /* callbackoncompare = */ { callbacktimeroc_cmt, 0 }, /* callbackonoverflow = */ { 0, 0 }, /* callbackoninputedge = */ { 0, 0 } }; ..... /****************************/ /*** timerinitialization ****/ /****************************/ /* open commutation timer */ timeroc_cmtfd = open(bsp_device_name_quad_timer_a_2, 0, &quadparamcmt ); ..... /* enable commutation timer */ ioctl (timeroc_cmtfd, qt_enable, (void*)&quadparamcmt ); ..... /***************************/ /*** pwm initialization ****/ /***************************/ pwm_scallback pwm_cb; pwmfd = open(bsp_device_name_pwm_a, 0); pwmioctl ( pwmfd, pwm_set_disable_mapping_reg1,pwm_zero_mask, bsp_device_name_pwm_a); pwmioctl ( pwmfd, pwm_set_disable_mapping_reg2,pwm_zero_mask, bsp_device_name_pwm_a); pwmioctl ( pwmfd, pwm_set_load_mode, pwm_load_from_0_to_5, bsp_device_name_pwm_a); /* set pwm_reload_a_callback to be call in the middle of center aligned pwm */ pwm_cb.pcallback = pwm_reload_a_callback; pwm_cb.pcallbackarg = null; pwmioctl(pwmfd, pwm_set_reload_callback, &pwm_cb, bsp_device_name_pwm_a); f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 143 ..... ..... /******************************************/ /*** inside of the main loop ****/ /******************************************/ t_actual = ioctl(timeroc_cmtfd, qt_read_counter_reg, 0 ); bldczchndlr ( pstates, ptimes, t_actual ); . . if ( pstates->state_general.cmd_general.b.zcrosserv_algorqflag ) { bldczczcrosserv( &pstates->state_zcros, &pstates->state_cmt); pstates->state_general.cmd_general.b.zcrosserv_algorqflag = 0; } ..... ..... /****************************************/ /*** pwm interrupt callback function ****/ /****************************************/ static void pwm_reload_a_callback(void) { uword16 t_zcsample; uword16 sample_zcinput; if (bldcalgostates.state_zcros.cmd_zcros.b.zcrosint_enblflag == 1) { /* get zero crossing sample time */ t_zcsample = ioctl(timeroc_cmtfd, qt_read_counter_reg, 0 ); sample_zcinput = decioctl (decfd, dec_get_filtered_encsignals,\ null, bsp_device_name_decoder_0); sample_zcinput = bldcalgostates.state_zcros.mask_zcinp & sample_zcinput; /* mask zero cros input with required zc input sample mask */ bldczczcrosintalg (&bldcalgostates.state_zcros, &bldcalgotimes.t_zcros,\ t_zcsample, sample_zcinput); } /* clear interrupt flag */ pwmioctl (pwmfd, pwm_clear_reload_flag, null, bsp_device_name_pwm_a); } ..... 6.3.3.11 bldczczcrosedgeintalg - bldc zc zero crossing ed ge interrupt algorithm call(s): result bldczczcrosedgeintalg (bldczc_sstatezcros *pstate_zcros, f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 144 software algorithms motorola uword16 *t_zcros, uword16 t_zcsample, frac16 u_zcphasex); arguments: description: the bldczczcrosedgeintalg interrupt algorithm serves bemf zero crossing sensing. this function has simi lar functionality to bldczczcrosintalg. the application?s requirements will determine which of these functions is used: bldczczcrosedgeintalgedge shoul d be used for applications when the zero crossing level is called only when the zero crossing edge appears (zero crossing edge interrupt) bldczczcrosintalg should be us ed for applications when the zero crossing level is sensed continuous ly (more interrupts checking the zero crossing level ) and the edge is evaluated by bldczczcrosintalg. the bldczczcrosedgeintalg function should be call ed from an interrupt. it checks bemf input in order to determine bemfzero crossing edge. the function bldczczcrosedgeintalg cooperates with the bldczczcrosedgeserv, which should be called fr om the main software after bldczchndlr . the bldczczcrosedgeintalg checks the bemf signal very quickly according to its inputs: sample ( zc_samplflag ) and sample time ( t_zcsampl ), which are the results of input sampling. the bldczczcrosedgeintalg sets zero crossing time ( t_zcros ). the table 6-18. bldczczcrosedgeintalg arguments pstate_zcros inout pointer to structure with zero crossing state and command variables t_zcros out pointer to zero crossing time variable t_zcsample in time of zero crossing sampling u_zcphasex in voltage of zero crossing phase sample (phase indexed by index_zc_phase) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 145 remaining services for bemf zero crossing are left to bldczczcrosedgeserv. although not necessary, it is possible fo r the application software to call the bldczczcrosedgeintalg algorithm from t he adc zero crossing interrupt. it is also us eful if the application star ts the a/d conversion in synchronization with t he middle of the centra l-aligned pwm, where the signal for the zero crossing edge is most stable. it is also possible to call bldczczcrosedgeintalg from the input capture interrupt of bemf comparator. the functionality is according to zero crossing timing: bemf zero crossing received: when: pstate_zcros->cmd_z cros.b.zc_toffflag =0 (after toff time period after last commutation) and pstate_zcros->cmd_z cros.b.zc_getflag = 0 (zero crossing not get yet) and (((pstate_zcros->cmd_zcros.b.ex pect_zcinp_positivflag) and (0 <= u_zcphasex)) or ((pstate_zcros->cmd_z cros.b.expect_zcinp_positivflag) and (0 <= u_zcphasex)) ) then: *t_zcros = t_zcsample (zero crossing time is set) pstate_zcros->cmd_zcr os.b.zcokget_cmdflag = 1; (zero crossing ok get command) pstate_zcros->cmd_z cros.b.zc_getflag = 1 (zero cros get flag is set) pstate_zcros->cntr_zcrosok ++ (ok successive zero crossing counter incremented) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 146 software algorithms motorola pstate_zcros->cntr_zcroserr = pstate_zcros->max_zcroserr (zero crossing down! counter set to max) pstate_zcros->cmd_zcros.b .zcrosint_enblflag = 0; returns: the function bldczccmtinit returns: ?fail (-1)? => if unex pected status of *pstate_zcros structure ?pass (0)? => otherwise range issues: all the time vari ables and components t_x in ptimes structure are to be computed as 16-bi t rollover registers. if results overflow 16 bits, they are not satura ted, but the overfl ow bit is ignored and a low 16 bits word is taken as a result. the t_x variables can be used as outputs and inputs from a 16-bit past compare timer used as a system clock base. special issues: the bldczczcrosedgeintalg function is intended to cooperate with bldczczcrosedgeserv function. the function bldczczcrosedgeintalg s hould be called as an interrupt algorithm from pwm interrupt for central-aligned pwm with highest priority. calling bldczczcrosedgeserv is from the main software is lower priority and how bldczczcrosedgeser v is called depends on the system. it may be called from the main softwar e loop as part of the sequence of tasks or it may be called by an arbiter with mu ltitasking. the function bldczczcrosedgeintalg sets the flag zcokget_cmdflag. when the spstate_zcros->cmd_zcros.b .zcrosint_enblflag is set, bldczczcrosintalg should be called in the interrupt. thi s will ensure zero crossing sensing at th e appropriate time. the bldczczcrosintalg function is initialized by the function bldczczcrosinit. code example 6: bldczczcrosedgeintalg in configuration file appconfig.h: ..... f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 147 /* adc samples */ #define include_adca_sample_0 #define include_adca_sample_1 #define include_adca_sample_2 /* defined adc for 3 phases of bemf voltages */ #define adc_raw_zero_crossing_callback adc_zero_crossing_callback_isr /* defined adc zero crossing callback function */ ..... in application.c file: #include "dspfunc.h" #include "bldc.h" /* include bldc motor with zero crossing sensing algorithms */ ..... void adc_zero_crossing_callback_isr (adc_ecallbacktype type, adc_tsamplemask causedsamplemask); ..... static bldczc_sstates bldcalgostates; static bldczc_stimes bldcalgotimes; static frac16 u_dc_bus_half; static bldczc_fu_zc3phase u_zc3phase; ..... /*****************************************************************/ /*** quadrature timer parameters setting as an output compare ****/ /*** with callbacktimeroc_cmt called at compare ******************/ /*****************************************************************/ static const qt_sstate quadparamcmt = { /* mode = */ qtcount, /* inputsource = */ qtprescalerdiv64, /* 1.825us */ /* inputpolarity = */ qtnormal, /* secondaryinputsource = */ 0, /* countfrequency = */ qtrepeatedly, /* countlength = */ qtpastcompare, /* countdirection = */ qtup, /* outputmode = */ qtassertwhileactive, /* outputpolarity = */ qtnormal, /* outputdisabled = */ 0, /* master = */ 0, f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 148 software algorithms motorola /* outputonmaster = */ 0, /* cochannelinitialize = */ 0, /* assertwhenforced = */ 0, /* capturemode = */ qtdisabled, /* comparevalue1 = */ per_start_timeroc_cmt, /* ! */ /* comparevalue2 = */ 0, /* initialloadvalue = */ 0, /* callbackoncompare = */ { callbacktimeroc_cmt, 0 }, /* callbackonoverflow = */ { 0, 0 }, /* callbackoninputedge = */ { 0, 0 } }; ..... /*****************************/ /*** timer initialization ****/ /*****************************/ /* open commutation timer */ timeroc_cmtfd = open(bsp_device_name_quad_timer_a_2, 0, &quadparamcmt ); ..... /* enable commutation timer */ ioctl (timeroc_cmtfd, qt_enable, (void*)&quadparamcmt ); ..... ..... /******************************************************************/ /*** adc parameters setting with zero crossing and zero offset ****/ /*****************************************************************/ static const adc_sstate sadc2 = { /* phase a adc channel */ /* analogchannel = */ adc_channel_2, /* phase a voltage */ /* samplemask = */ 0x04, /* sample 2 */ /* offsetregister = */ u_dcbus_half, /* one half of dc bus voltage for zero crossing! */ /* lowlimitregister = */ 0, /* low limit checking not activated */ /* highlimitregister = */ 0xffff, /* high limit checking not activated */ /* zerocrossing = */ adc_zc_any, /* any zero crossing edge interrupt */ }; ..... static const adc_sstate sadc1 = {..... /* same as evm_sadc2 */ /* phase b adc channel */ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 149 ..... static const adc_sstate sadc0 = {..... /* same as evm_sadc2 */ /* phase c adc channel */ ..... /***************************/ /*** adcinitialization ****/ /***************************/ sadc2.offsetregister = u_dc_bus_half; sadc1.offsetregister = u_dc_bus_half; sadc0.offsetregister = u_dc_bus_half; adcfd2 = open(bsp_device_name_adc_0, 0, &sadc2 ); adcfd1 = open(bsp_device_name_adc_0, 0, &sadc1 ); adcfd0 = open(bsp_device_name_adc_0, 0, &sadc0 ); ..... ..... /******************************************/ /*** inside of the main loop ****/ /******************************************/ t_actual = ioctl(timeroc_cmtfd, qt_read_counter_reg, 0 ); bldczchndlr ( pstates, ptimes, t_actual ); . . if ( pstates->state_general.cmd_general.b.zcrosserv_algorqflag ) { u_zcphasex = u_zc3phase [bldcalgostates.state_zcros.index_zc_phase]; bldczczcrosedgeserv( &pstates->state_zcros, &pstates->state_cmt, u_zcphasex ); pstates->state_general.cmd_general.b.zcrosserv_algorqflag = 0; } ..... ..... /******************************************/ /*** after motor commutation proceeded ****/ /******************************************/ if (bldcalgostates.state_zcros.cmd_zcros.b.zcinpset_drvrqflag) { f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 150 software algorithms motorola /*****************************************************/ /*** setting of required phase zero crossing edge ****/ /*****************************************************/ archio.adca.zerocrosscontrolreg=setadc_zcinp_tab[ pstates->state_cmt.step_cmt ] bldcalgostates.state_zcros.cmd_zcros.b.zcinpset_drvrqflag = 0; }; ..... ..... /**************************/ /*** pwm in the middle ****/ /**************************/ ioctl( adcfd0, adc_start, 0 ); .... /********************************************************************/ /*** zero crossing recognition ****/ /********************************************************************/ void adc_zero_crossing_callback_isr (adc_ecallbacktype type, adc_tsamplemask causedsamplemask) { /* if zero crossing caused by phase voltages */ if (causedsamplemask & 0x0007) { ioctl (adcfd0, adc_state_read, &(u_zc3phase[0])); ioctl (adcfd1, adc_state_read, &(u_zc3phase[1])); ioctl (adcfd2, adc_state_read, &(u_zc3phase[2])); /* possibly u_zc3phase[0] = archio.adca.resultreg[0]; u_zc3phase[1] = archio.adca.resultreg[1]; u_zc3phase[2] = archio.adca.resultreg[2]; */ if (cmd_application.b.zerocros_enblflag) { if (bldcalgostates.state_zcros.cmd_zcros.b.zcrosint_enblflag) { u_zcphasex = u_zc3phase [bldcalgostates.state_zcros.index_zc_phase]; bldczczcrosedgeintalg(&bldcalgostates.state_zcros,&bldcalgotimes.t_zcros,\ t_zcsample, u_zcphasex); } } } } ..... f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 151 6.3.3.12 bldczczcrosserv - bldc zc zero crossing service call(s): result bldczczcrosserv ( bldczc_sstatezcros *pstate_zcros, bldczc_sstatecmt *pstate_cmt ); arguments: description: the bldczczcrosserv serves bemf zero crossing sensing. this function has simi lar functionality to bldczczcrosedgeserv. the application requirements w ill determine which of these functions is used: bldczczcrosserv should be used with bldczczcrosintalg for applications when zero crossi ng level is sens ed continuously (more interrupts checking the zer o crossing level) and the edge is evaluated by bldczczcrosintalg. bldczczcrosedgeserve should be used with bldczczcrosedgeintalg for applications when bldczczcrosedgeintalg is call ed only when zero crossing edge appears (zero crossing edge interrupt) the function bldczczcrosserv sets the next (b emf) zero crossing masks, the next expec ted zero crossing i nput for zero crossing sensing in the data structure pointed by pstate_zcros, and performs the final decisions for bemf zero crossi ng according to inputs from bldczczcrosintalg. the bldczczcrosserv function should be called after bldczchndlr when the zcrosserv_algorqflag is set . the functionality is dependent upon the comm utation status. after commutation: when: table 6-19. bldczczcrosserv arguments pstate_zcros inout pointer to structure with zero crossing state and command variables pstate_cmt out pointer to structure with commutation state and command variables f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 152 software algorithms motorola pstate_zcros->cmd_zcros .b.cmtdone_zcrosserv_rqflag = 1: if: pstate_zcros->cntr_zcrosok >= pstate_zcros->min_zcrosokstart then: pstate_zcros->cmd_zcros.b.e ndstart_zcrosserv_cmdflag = 1 (starting phase should be finished - command for bldczchndlr indicating that the starting phase is complete) if: pstate_zcros->c ntr_zcroserr = 0 then: pstate_zcros->cmd_z cros.b.maxzcroserr_zcrosserv_cmdflag = 1 ( is set) after commutation proceeding finished (after flyback current decay): when: pstate_zcros->cmd_zcros.b .cmtprocend_zcrosserv_rqflag = 1 then: bldczczcrosserv sets pstate_zcros->cmd_zcros .b.zcrosint_enblflag = 1 (zero crossing sensing enabled =>then bldczczerocrosintalg should be called in its dedicated interrupt) after commutation and bldczccmtserv: when: pstate_zcros->cmd_zcros.b .cmtserv_zcrosserv_rqflag = 1 (request was set by bldczchndlr): then: pstate_zcros->mask_zcinpnext = pstate_zcros->mask_zcinp p state_zcros->expect_zcinpnext = pstate_zcros->expect_zcinp; f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 153 returns: the function bldczccmtinit returns: ?fail (-1)? => if unex pected status of *pstate_zcros structure ?pass (0)? => otherwise range issues: none special issues: the bldczczcrosintalg function is intended to cooperate with bldczczcrosserv function. the bldczczcrosintalg shou ld be called as an inte rrupt algorithm from pwm interrupt for cent ral-aligned pwm with highest priority. calling bldczczcrosserv from t he main software is lower priority and how bldczczcrosserv is called depends on the system . it may be called from the main software loop as part of the sequence of tasks or it may be called by an arbiter wi th multitasking. the func tion bldczczcrosintalg sets the zcokget_cmdflag and zcmiss_cmdflag flags. the function bldczczcrosintalg is initialized by the function bldczczcrosinit. code example: see code example 2: bldczchndlr and code example 5: bldczczcrosintalg . 6.3.3.13 bldczczcrosedgeserv - bl dc zc zero crossing edge service call(s): result bldczczcrosedgeserv ( bldczc_sstatezcros *pstate_zcros, bldczc_sstatecmt *pstate_cmt, frac16 u_zcphasex); arguments: table 6-20. bldczczcrosedgeserv arguments pstate_zcros inout pointer to structure with zero crossing state and command variables pstate_cmt out pointer to structure with commutation state and command variables u_zcphasex in voltage of zero crossing phase sample (phase indexed by index_zc_phase) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 154 software algorithms motorola description: the function bldczczcrosedgeserv serves bemf zero crossing sensing. this function has simi lar functionality to bldczczcrosserv. the application?s requirement will determine which of these functions is used: bldczczcrosedgeserve should be used with bldczczcrosedgeintalg for applications when bldczczcrosedgeintalg is call ed only when zero crossing edge appears (zero crossing edge interrupt) bldczczcrosserv should be used with bldczczcrosintalg for applications when zero crossi ng level is sens ed continuously (more interrupts checking the zer o crossing level ) and the edge is evaluated by bldczczcrosintalg. the bldczczcrosedgeserve function sets the next (bemf) zero crossing masks, next expected zero crossing input for zero crossing sensing in the data structure pointed by pstate_zcros, and performs the final decisions for bemf zero crossing according to inputs from bldczczcrosintalg. the bldczczcrosedgeserv function should be called after bldczchndlr when the zcrosserv_algorqflag is set . the functionality is depen dent upon the comm utation status. after commutation : when: pstate_zcros->cmd_zcros .b.cmtdone_zcrosserv_rqflag = 1: if: pstate_zcros->cntr_zcrosok >= pstate_zcros->min_zcrosokstart then: pstate_zcros->cmd_zcros.b.e ndstart_zcrosserv_cmdflag = 1 is set as a command for bldczchndlr (starting should be finis hed after min_zcrosokstart good commutations) if: pstate_zcros->cntr_zcroserr = 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms bldc motor commutation with zero crossing sensing DRM026 ? rev 0 designer reference manual motorola software algorithms 155 then: pstate_zcros->cmd_z cros.b.maxzcroserr_zcrosserv_cmdflag = 1 is set after commutation proceeding finished (after flyback current decay): when: pstate_zcros->cmd_zcros.b .cmtprocend_zcrosserv_rqflag = 1 then: bldczczcrosedgeserv sets pstate_zcros->cmd_zcros.b.z crosint_enblflag=1 => zero crossing sensing enable (then bldczczerocrosintalg should be called in its interrupt) after toff time when bemf zero crossing (soon) missed: when: (the zero crossing was assumed it appeared before toff time period after last commutation) zctoffend_zcrosserv_rqflag (end of toff time period after last commutation) and ( (( pstate_zcros->cmd_zcros.b .expect_zcinp_positivflag ) and ( 0 <= u_zcphasex )) or (( pstate_zcros->cmd_zcros.b .expect_zcinp_positivflag ) and ( 0 <= u_zcphasex )) ) then: pstate_zcros->cmd_zcr os.b.zc_getflag = 1; pstate_zcros->cmd_zcros.b.zcmi ss_cmdflag = 1; (is set as a command for bldczchndlr -where it is processed for commutation calculation) pstate_zcros->cmd_zcros. b.zcmisserr_cmdflag = 1; psta te_zcros->cntr_zcrosok = 0; ps tate_zcros->cntr_zcroserr--; ps tate_zcros->cmd_zcro s.b.zcrosint_enblfl ag = 0; (father zero crossing checking disabled unt il a new commutation step) f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . software algorithms designer reference manual DRM026 ? rev 0 156 software algorithms motorola after commutation and bldczccmtserv: when: pstate_zcros->cmd_zcros.b. cmtserv_zcrosserv_rqflag = 1 (was set by bldczchndlr ): then: pstate_zcros->index_zc_ph asenext = zc_phase_tab [ pstatecmt->step_cmt_next ]; pstate_zcros->cmd_zcros.b.exp ect_zcinp_posit ivnextflag = \ expect_zcinpflag_tab [ psta tecmt->step_cmt_next ] [ pstatecmt->cmd_cmt.b.dirflag ]; returns: the function bldczccmtinit returns: ?fail (-1)? => if unex pected status of *pstate_zcros structure ?pass (0)? => otherwise range issues: none special issues: the bldczczcrosedgeintalg function is intended to cooperate with bldczczcrosedgeserv function. the function bldczczcrosedgeintalg s hould be called as an interrupt algorithm from pwm interrupt for central-aligned pwm with highest priority. calling bldczczcrosedgeserv from the main so ftware is lower priority and how bldczczcrosedgeser v is called depends on the system. it may be called from the main softwar e loop as part of the sequence of tasks or it may be called by an arbiter with mu ltitasking. the function bldczczcrosedgeintalg sets flags zcokget_cmdflag and zcmiss_cmdflag. the bldczczcrosintalg function is initialized by the function bldczczcrosinit. code example: see code example 6: bldczczcrosedgeintalg . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola customization guide 157 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 7. customization guide 7.1 contents 7.2 application suitability guide . . . . . . . . . . . . . . . . . . . . . . . . . . 157 7.3 setting of sw parameters for cust omer motor . . . . . . . . . . . 159 7.2 application suitability guide this application suitabili ty guide deals with i ssues which may be encountered when tailori ng application using customer motor. 7.2.1 minimal application speed as it is known, the back-emf vo ltage is proportion ally dependent on motor speed. since the sensorless back-emf zero crossing sensing technique is based on back-emf voltage, it has some minimal speed limitations! the motor start-up is solved by starting (back-emf acquisition) state, but minimal operation speed is limited. the minimal speed depends on many fact ors of the motor and hardware design, and differs for any applicat ion. this is because the back-emf zero crossing is disturbed and effected by the zero crossing comparator threshold as explained be low and in the sections 7.2.3.2 effect of mutual inductance and 7.2.3.1 effect of mu tual phase capacitance . note: usually, the minimal speed for reliable operation is from 7% to 20% of the motor?s nominal speed. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide designer reference manual DRM026 ? rev 0 158 customization guide motorola 7.2.2 voltage closed loop as shown in section 8. application setup , the speed control is based on voltage closed loop cont rol. this should be su fficient for most applications. 7.2.3 motor suitability back-emf zero crossing sensing is ac hievable for most of bldc motors with a trapezoidal back-emf. howeve r, for some bldc motors the back-emf zero crossing sensing can be problematic since it is affected by unbalanced mutual phase capaci tance and induct ance. it can disqualify some motors from usin g sensorless techniques based on the back-emf sensing. 7.2.3.1 effect of mu tual phase capacitance the effect of the mutual phase capacit ances can play an important role in the back-emf sensing. usually the mutual capacitance is very small. its influence is only significant during the pwm switching when the system experiences very high du/dt .the effect of mu tual capacitance is described in section 3.2.5.2 effect of mu tual phase capacitance . note: note that the configur ation of the end-turns of the phase windings has a significant impact. therefore, it mu st be properly managed to preserve the balance of the mut ual capacity. this is especially important for prototype motors that are usually hand-wound. caution: failing to maintain balance of t he mutual capacita nce can easily disqualify such motors from us ing sensorless techniques based on the back-emf sensing. usually the bldc motors with win dings wound on separate poles show minor presence of the mutual capacitance. thus, the disturbance is insignificant. 7.2.3.2 effect of mutual inductance the negative effect on back- emf sensing of mutual inductance, is not to such a degree as unbalanc ed mutual capacitance. however, it can be noticed on the sensed phase. the differ ence of the mutual inductances f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide setting of sw parameters for customer motor DRM026 ? rev 0 designer reference manual motorola customization guide 159 between the coils which carry the phas e current and the coil used for back-emf sensing, causes the pwm pulses to be superimposed onto the detected back-emf voltage. the effect of mutual inductanc e is described in section 3.2.5.1 effect of mutual inductance . note: the bldc motor with stator windi ngs distributed in the slots has technically higher mutual inductances than other types. therefore, this effect is more significant. on the other hand, the bldc motor with windings wound on separate poles, show s minor presence of the effect of mutual inductance. caution: however noticeable this effect, it does not degrade t he back-emf zero crossing detection, because it is cancelled at th e zero crossing point. additional simple filtering helps to reduce ripples further. 7.3 setting of sw parame ters for customer motor the sw was tuned for three hardware and motor kits (evm, lv, hv) as described in section 8. application setup and 2.2 system specification . it can, of course, be us ed for other motors, but the software parameters need to be set accordingly. the parameters are located in the file (external ram version): ...bldc_adc_zerocross_sa\bldcadczcdefines.h and config files: ...bldc_adc_zero_cross_sa\a pplicationconfig\appconfig.h. the motor control drive usual ly needs setting/tuning of: dynamic parameters current/voltage parameters the sw selects valid param eters (one of the 3 para meter sets) based in the identifi ed hardware. table 7-1 shows the starting string of the sw constants used for each hardware. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide designer reference manual DRM026 ? rev 0 160 customization guide motorola in the following text the evm, lv, hv will be replaced by x. the sections is sorted in order recommended to fo llow, when one is tuning/changing parameters. note: most important constant s for reliable motor st art-up are described in 7.3.2.2 start-up periods and in 7.3.1.2 alignm ent current and current regulator setting . 7.3.1 current and voltage settings 7.3.1.1 dc-bus voltage, maximal and minima l voltage and current limits setting for the right regulator se ttings, it is required to set the expected dc-bus voltage in bldcadczcdefines.h: #define x_volt_dc_bus 12.0 /* dc-bus expected voltage */ the current voltage limits fo r sw protection are: #define x_dcb_undervoltage 3.0 /* under-voltage limit [v] */ #define x_dcb_overvoltage 15.8 /over-voltage limit [v] */ #define x_dcb_overcurrent 48.0 /* over-current limit [a] */ note: note the hardware protection with setting of pot s r116, r71 for dsp56805evm (see evm m anuals for details) 7.3.1.2 alignment current and current regulator setting all this section?s settings are in bldcadczcdefines.h. the current during alignment sta ge (before motor starts) is recommended to be set to nom inal motor current value. table 7-1. sw parameters marking hardware set software parameters marking low-voltage evaluation motor hardware set configuration evm_yyy low-voltage hardware set configuration lv_yyy high-voltage hardware set configuration hv_yyy f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide setting of sw parameters for customer motor DRM026 ? rev 0 designer reference manual motorola customization guide 161 #define x_curr_align_desir ed_a 17.0 /* alignment current desired [a] */ usually it is necessary to set the pi regulator constants. (the pi regulator is described in algorithm controllerpitype1 source code) the current controller wo rks with constant execut ion (sampling) period determined by pwm frequency: current controller period = 1/pwm frequency . both proportional and integral gai n have two coefficients: gain portion and scale current proportional gain: #define x_curr_pi_proportional_gain 30000 /* proportional gain portion */ #define x_curr_pi_proportional_gain_scale 24 /* proportional gain scale*/ current integral gain: #define x_curr_pi_integral_gain 19000 /* integral gain portion */ #define x_curr_pi_integral_gain_scale 23 /* integral gain gain scale */ the pi controller proportional and integral constants can be set experimentally. note: if the overcurrent fault is experienced dur ing alignment stage , then it is recommended to slow dow n the regulator. if the yy_gain_scale is increased, the gai n is decreased. note: the coefficients x_curr _pi_proportional_gain_real (resp. x_curr_pi_integral_ti_real) are not directly used for regulator setting, but can be us ed to calculate the x_curr_pi_proportional_gain, x_curr_pi_proportional_gain_scale (resp. x_curr_pi_integral_gain, x_curr_pi_integral_gain_scale ) using the formulae in the comments f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide designer reference manual DRM026 ? rev 0 162 customization guide motorola 7.3.2 commutatio n control settings in order to get the mo tor reliably started t he commutation control constants must be properly set. 7.3.2.1 alignment period the time duration of al ignment stage must be long enough to stabilize the rotor before it starts. this is set in seconds in bldcadczcdefines.h. #define x_per_alignment_s 0.5 /* alignment period [s] */ note: for first tuning it is recommended to set this period high enough (e.g. 5s). then, if the motor works well it can be significantly lowered (e.g. 0.1s). 7.3.2.2 start-up periods the constants defining the start up need to be changed according to drive dynamic. all this section settings are in bldcadczcdefines.h: #define x_per_cmtstart_us 7200.0 /* start commutation period [micros] */ #define x_per_toffstart_us 14400.0 /* start zero crossing toff period [micros] */ the unit of these constants is 1 s. x_per_cmtstart_us is the commutation period used to compute the first (start) commutation period. x_per_toffstart_us is the first (start) toff in terval after commutation where bemf zero cro ssing is not sensed. note: it is recommended to set x_per_toffstart_us = 2*x_per_cmtstart_us. then the first motor co mmutation period = x_per_cmtstart_us * 2 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide setting of sw parameters for customer motor DRM026 ? rev 0 designer reference manual motorola customization guide 163 the back-emf zero crossi ng is not sensed duri ng whole first period, because it is very small and hence t he zero crossing in formation is not reliable during this period. note: setting of this constant is an empirica l process. it is difficult to use a precise formula, because there are many factors involved which are difficult to obtain in the case of a real drive (motor and load mechanical inertia, motor electromechanical constants, and sometimes also the motor load). so they need to be set with a specific motor. table 7-2 helps with setting of this constant note: slowing down the s peed regulator (see 7.3.3.1 maximal and minimal speed and speed r egulator setting ) helps if a problem with start up is encountered using the above stated setting . 7.3.2.3 minimal zero co mmutation of starting (ba ck-emf acquisition) stage #define x_min_zcrosok_start 0x02 /* minimal zero crossing ok commutation to finish bldc starting phase */ this constant x_min_zcrosok_start determines the minimal number of the zero cro ssing ok commutation to finish the bldc starting phase. note: it is recommended to use the value 0x02 or 0x03 only. if this constant is set too high, the motor control will not enter t he running stage fast enough. table 7-2. start-up periods motor size x_per_cmtstart_us x_per_toffstart_us first commutation period [ s] [ s] [s] slow motor/ high load motor mechanical inertia >5000 >10000 >10ms fast motor / high load motor mechanical inertia <5000 <10000 <10ms f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide designer reference manual DRM026 ? rev 0 164 customization guide motorola 7.3.2.4 wrong zero crossing #define x_max_zcroserr 0x04 /*maximal zero crossing errors (to stop commutations) */ the constant x_max_zcroserr is used for control of commuting problems. the application software stops and starts the motor again, whenever x_max_zcroserr successive commutations with problematical zero crossing appears. note: during tuning of the software for other motors, this constant can be temporarily increased. 7.3.2.5 commutati on proceeding period commutation preceeding period is t he constant time after motor commutation, when bemf zero crossing is not measured (until the phase current decays to zero). #define x_const_perproccmt_us 170.0 /* period of commutation proceeding [micros]*/ the unit of this constant is 1 s. note: this constant needs to be lower than 1/3 of (minimal) commutation period at motor maximal speed. 7.3.2.6 commutation timing setting note: normally this structure should not necessarily be changed. if the constants described in this secti on need to be changed a detailed study of the control principle needs to be studied in section 3. bldc motor control and section 6. software algorithms . if it is required to c hange the motor commutation advancing (retardation) the coefficients in starting and ru nning structures need to be changed: x_startcomputinit x_runcomputinit both structur es are in bldcadczcdefines.h . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide setting of sw parameters for customer motor DRM026 ? rev 0 designer reference manual motorola customization guide 165 the x_startcomputinit structure is used by the application software during starting stage (see 3.3.4.5 starting (b ack-emf acquisition) ). the x_runcomputinit structure is used by the application software during running stage (see 3.3.4.2 running ). coef_cmtprecomplshft coef_cmtprecompfrac fractional and scaling pa rt of coef_cmtprecomp final coef_cmtprecomp = coef_cmtprecompfrac << coef_cmtprecomplshft this final coef_cmtprecomp deter mines the interv al between motor commutations when no bemf zero crossing is captured. the application sw multiplies frac tional coef_cmtprecomp with commutation period. coef_hlfcmt determines commutation advancing (retardati on) - the interval between bemf zero crossi ng and motor commutation the application sw multiplies fractional coef_hlfcmt with commutation period. coef_toff determines the interval between bemf zero crossing and motor commutation the application sw multiplies fractional coef_toff with commutation period 7.3.3 speed setting 7.3.3.1 maximal and minimal s peed and speed r egulator setting all this section settings are in bldcadczcdefines.h. in order to compute the speed setting, it is impor tant to set the number of bldc motor commutations per motor mechanical revolution: #define x_motor_commutation_prev 18 /* motor commutations per revolution */ f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide designer reference manual DRM026 ? rev 0 166 customization guide motorola maximal require d speed in rpm is set by: #define x_speed_rotor_max_rpm 3000 /* maximal rotor speed [rpm] */ if you also request to change the mini mal motor speed, then you need to set minimal angular speed: #define x_omega_min_sysu 4096 /* angular frequency minimal [system unit] */ note: remember that minimal angular speed is not in radians, but in system units where 32768 is th e maximal speed done by x_speed_rotor_max_rpm the speed pi regulator constants ca n be tuned as de scribed below. all settings can be found in bldcadczcdefines.h. the execution period of the s peed controller is set by: #define per_speed_sample_s 0.001 /* sampling period of the speed controller [s] */ both proportional and integral gain have two coefficients: portion and scale. speed proportional gain: #define x_speed_pi_proportional_gain 22000 /* speed proportional gain portion*/ #define x_speed_pi_proportional_gain_scale 19 /* speed proportional gain scale*/ speed integral gain: #define x_speed_pi_integral_gain 27500 /* speed integral gain portion */ #define x_speed_pi_integral_gain_scale 23 /* speed integralgain gain scale */ the pi controller proportional and integral constants can be set experimentally. note: if the motor has problems when r equested speed is changed, then it is recommended to slow dow n the regulator. if the yy_gain_scale is increased, the gai n is decreased. the coefficients x_speed_pi_p roportional_gain_real (resp. x_speed_pi_integral_ti_r eal) are not directly used for regulator f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide setting of sw parameters for customer motor DRM026 ? rev 0 designer reference manual motorola customization guide 167 setting, but can be used to calculate x_speed_pi_proportional_gain, x_speed_pi_proportional_gain_scale (resp. x_speed_pi_integral_gain, x_speed_pi_integral_gain_scale ) using the formulae in the comments. 7.3.4 conclusion software parameters setting if all the points in 7.3 setting of sw parame ters for customer motor are done, the software should be customized to customer motor. if the software customizing of your motor was not successful, it is recommended that you read 7.2 application suitability guide , since the software may not be suitabl e for some applications. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . customization guide designer reference manual DRM026 ? rev 0 168 customization guide motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola application setup 169 designer reference manual ? 3-ph bl dc with sensorless adc zc detection section 8. application setup 8.1 contents 8.2 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 8.3 warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 8.4 application outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 8.5 application description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 8.6 application set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 8.7 projects files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .180 8.8 application build & execute . . . . . . . . . . . . . . . . . . . . . . . . . . 182 8.2 introduction this application exercise s simple control of the bldc sensorless motor control with back-emf zero crossi ng using a/d converter on the dsp56f805. 8.3 warning this application operates in an en vironment that includes dangerous voltages and rotating machinery. be aware that the ap plication power stage and optoisolation board are not electrically isol ated from the main s voltage - they ar e live with risk of electric shock when touched. an isolation transformer should be used when operating off an ac power line. if an isolation transformer is not used, power stage grounds and oscilloscope grounds are at differen t potentials, unless the oscilloscope f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 170 application setup motorola is floating. note that probe grounds and, therefore, the case of a floated oscilloscope are subjec ted to dangerous voltages. the user should be aware that: before moving scope probes, maki ng connections, etc., it is generally advisable to power down the high- voltage supply. to avoid inadvertently touching li ve parts, use plastic covers. when high voltage is applied, us ing only one hand for operating the test setup minimizes the po ssibility of el ectrical shock. operation in lab setups that have grounded tables and/or chairs should be avoided. wearing safety glasses, avoiding ties and jewelry, using shields, and operation by personnel trained in high-voltage lab techniques are also advisable. power transistors, the pfc coil, and the motor can reach temperatures hot e nough to cause burns. when powering down; due to storage in the bus capacitors, dangerous voltages are present until the power-on led is off. 8.4 application outline the system is designed to drive a 3-phase brus hless dc motor. the application has the foll owing specifications: bldc sensorless motor 115 or 230v ac or 12v dc supply targeted for dsp56f805evm board running on 3-phase bldc motor evm at 12v, 3-phase ac/bldc high-voltage power stage, or 3- phase ac/bldc low-voltage power stage speed control loop motor mode in both direction of rotation minimum speed of 250, 400, or 300 rpm f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup application description DRM026 ? rev 0 designer reference manual motorola application setup 171 maximum speed of 2000, 2500, or 3000 rpm manual interface (run/stop sw itch, up/down push buttons control, led indication) over-voltage, under-vol tage, over-current and over-heating fault protection hardware autodetection pc remote control interface (speed set-up) pc master software remote monitor ? pc master software monitor interface (appl ied voltage, required voltage, spee d, run/stop switch status, application mode) ? pc master software speed scope (observes actual and desired speed) 8.5 application description this application performs sensorless c ontrol of the bldc motor on the dsp56f805 processor with close loop speed control. in the application, the pwm module is set to independent mode with a 10.0khz switching frequency. the state of the zero cro ssing signals are read from the input monitor register of the quadr ature encoder. the masking of pwm channels is controlled by the pw m channel contro l register. the content of this regist er is derived from the back-emf zero crossing signals. this bldc motor control applicat ion can operate in two modes: 1. manual operating mode the drive is controlled by the ru n/stop switch (s6). the motor speed is set by the up (s2 -irqb) and down (s1-irqa) push buttons; see figure 8-1 . if the application runs and motor spinning is disabled (i.e., the system is ready) the user led (led3, shown in figure 8-2 ) will blink. when motor spinning is enabled, the user led is on . refer to table 8-1 for application states. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 172 application setup motorola figure 8-1. run/stop switch and up/down buttons at dsp56f805evm figure 8-2. user and pw m leds at dsp56f805evm f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup application description DRM026 ? rev 0 designer reference manual motorola application setup 173 2. pc master software (remote) operating mode the drive is controlled remotely from a pc through the sci communication channel of the dsp device vi a an rs-232 physical interface. the drive is enabled by the run/stop switch, which can be used to safely stop the appl ication at any time. pc master software enables to set the required speed of the motor. the following control ac tions are supported: start the motor (by setting the required speed on the bar graph) stop the motor (by setting t he zero speed on the bar graph) set the required speed of the motor pc master software displa ys the following information: required speed of the motor actual speed of the motor dc-bus voltage dc-bus current temperature of the power stage fault status (no fault, ov er-voltage, under-voltage, over-currents in phases, over-c urrent in dc-bus, over-heating) motor status - running/stand-by start the pc master software window?s application, bldc_zc_adc_sa.pmp . figure 8-3 illustrates the pc master software control window after this project has been launched. table 8-1. motor application states application state motor state green led state stopped stopped blinking at a frequency of 2hz and the red led state is off running spinning on and the red led state is off fault stopped blinking at a frequency of 8hz and the red led state is on f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 174 application setup motorola note: if the pc master softwa re project (.pmp file) is unable to control the application, it is possible that th e wrong load map (. elf file) has been selected. pc master software uses the load m ap to determine addresses for global variables being monitored. once the pc master software project has been launched, this option may be selected in the pc master software window under proj ect/select other map filereload. figure 8-3. pc master software control window f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup application set-up DRM026 ? rev 0 designer reference manual motorola application setup 175 8.6 application set-up figure 8-4 illustrates the hardware se t-up for the bldc sensorless motor control applicat ion with zero crossing using a/d converter. figure 8-4. set-up of the bldc motor control application using dsp56f805evm thanks to automatic board identification, the soft ware can also be run on: 3-phase ac/bldc low-vol tage power stage; see figure 8-5 3-phase ac/bldc high-vo ltage power stage; see figure 8-6 not needed f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 176 application setup motorola figure 8-5. set-up of the low-volt age bldc motor control application the correct order of phase s (phase a, phase b, ph ase c) for the bldc motor is: phase a = white wire phase b = red wire phase c = black wire when facing a motor shaft, if the phase order is: phas e a, phase b, phase c, the motor shaft should rotate clockwise (i.e., positive direction, positive speed). f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup application set-up DRM026 ? rev 0 designer reference manual motorola application setup 177 figure 8-6. set-up of t he high-voltage bldc moto r control application the system consists of the following components: bldc motor ib23810 ? supplied in kit ecmtreval - evaluation motor board kit evm motor board: ? supplied in kit with ib23810 motor: ecmtreval - evaluation motor board kit bldc motor type sm 40n, em brno s.r.o., czech republic ? supplied with loding gen. type sg 40n, em brno s.r.o., czech republic ? as: ecmtrlovbldc kit f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 178 application setup motorola 3-ph. ac bldc lv power stage 200 w ? supplied as: eclovacbldc kit bldc motor type sm 40v, em brno s.r.o., czech republic ? supplied with: loding gen. type sg 40n, em brno s.r.o., czech republic ? as: ecmtrhivbldc 3-ph. ac bldc hv power stage 180 w ? supplied with: optoisolation board ? as: ecopthi vacbldc kit dsp56f805 board: ? dsp56f805 evaluation module the serial cable - needed for th e pc master software debugging tool only. the parallel cable - needed for the metrowerks code warrior debugging and s/w loading. for detailed information, refer to section 4. hardware design . 8.6.1 application se t-up using dsp56f805evm to execute the blcd sensorless mo tor control, th e dsp56f805evm board requires the str ap settings shown in figure 8-7 and table 8-2 . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup application set-up DRM026 ? rev 0 designer reference manual motorola application setup 179 figure 8-7. dsp56f805e vm jumper reference jg8 jg9 dsp56f805evm jg3 1 j29 jtag jg14 1 p3 user s/n led3 p1 y1 u1 u15 s2 s3 3 1 2 jg13 s1 s4 s5 s6 p1 pwm 4 7 3 6 9 jg12 1 3 2 jg13 1 3 2 j23 j24 jg6 jg1 jg2 1 1 jg9 jg7 jg5 u9 u10 jg4 1 jg8 reset irqb irqa run/stop gp2 gp1 1 2 7 8 jg4 1 2 7 8 jg3 3 1 2 jg12 31 4 jg14 jg10 6 9 7 jg10 1 jg1 3 1 jg6 3 1 jg2 3 jg5 jg15 3 1 jg11 3 1 jg16 3 1 jg15 1 jg16 1 jg11 1 jg18 jg17 jg17 jg18 jg7 table 8-2. dsp56f805 evm jumper settings jumper group comment connections jg1 pd0 input selected as a high 1-2 jg2 pd1 input selected as a high 1-2 jg3 primary uni-3 serial selected 1-2, 3-4, 5-6, 7-8 jg4 secondary uni-3 serial selected 1-2, 3-4, 5-6, 7-8 jg5 enable on-board parallel jtag command converter interface nc jg6 use on-board crystal for dsp oscillator input 2-3 jg7 select dsp?s mode 0 operation upon exit from reset 1-2 jg8 enable on-board sram 1-2 jg9 enable rs-232 output 1-2 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 180 application setup motorola note: when running the evm target system in a stand-alone mode from flash, the jg5 jumper must be set in the 1-2 configur ation to disable the command converter para llel port interface. 8.7 projects files the bldc motor control application is composed of the following files: ...\bldc_zc_adc_sa\bldczcapplication.c, main program ...\bldc_zc_adc_sa\bl dc_zc_adc_sa.mcp, application project file ....\bldc_zc_adc_sa\applicat ionconfig\appconfig.h, application configuration file ...\bldc_zc_adc_sa\systemconfig\e xtram\linker_ram.cmd, linker command file for external ram ...\bldc_zc_adc_sa\systemconfig \flash\linker_flash.cmd, linker command file for flash ...\bldc_zc_adc_sa\systemconf ig\flash\flash.cfg, configuration file for flash jg10 secondary uni-3 analog temperature input unused nc jg11 use host power for ho st target interface 1-2 jg12 primary encoder input selected ze ro crossing signals 1-2, 4-5, 7-8 jg13 secondary encoder input selected 2-3, 5-6, 8-9 jg14 primary uni-3 3-phase current sense se lected as analog inputs 1-2, 4-5, 7-8 jg15 primary uni-3 dc-bus over-current selected faulta1 2-3 jg16 secondary uni-3 phase a over-current selected for faultb1 1-2 jg17 can termination unselected nc jg18 use on-board crystal for dsp oscillator input 1-2 table 8-2. dsp56f805 evm jumper settings jumper group comment connections f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup projects files DRM026 ? rev 0 designer reference manual motorola application setup 181 ...\bldc_zc_adc_sa\pcmast er\zero_cross.pmp , pc master software file these files are located in the application folder. motor control algorithms used in the application: ...\controller.c, .h : source and header f iles for pi controller ...\bldc.h, bldcdrv.c, .h : source and hea der files for brushless dc motor driver ...\bldczc.c, .h : source and header file s for bldc zero crossing algorithms other functions used in the application: ...\boardid.c, .h : source and header files for the board identification function the application can run: using dsp56800_quick_start environment stand alone in case the application is using libraries of t he dsp5680_quick_start tool, the application project file re fers to the necessary resources (algorithms and peripheral drivers) of the tool. in case the application is running stand-alone , all the necessary resources (algorithms and peripheral drivers) are part of the application project file. all the resources are c opied into the foll owing folder under the application folder so the libraries of the dsp56800_quick_start are not required any more: ...\bldc_zc_adc_sa\src\include , folder for general c-header files ...\bldc_zc_adc_sa\src\dsp56805 , folder for the device specific source files, e.g. drivers ...\bldc_zc_adc_sa\sr c\pc_master_support , folder for pc master software source files ...\bldc_zc_adc_sa\sr c\algorithms\ , folder for algorithms f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 182 application setup motorola 8.8 application build & execute when building the bldc sensorless moto r control application, the user can create an applicat ion that runs from internal flash or external ram . to select the type of applic ation to build, open the bldc_zero_cross.mcp project and select the target build type, as shown in figure 8-8 . a definition of the projec ts associated with these target build types may be viewed under the targets tab of the project window. figure 8-8. target build selection the project may now be bui lt by executing the make command, as shown in figure 8-9 . this will build and link t he bldc sensorless motor control applicationand all needed me trowerks and quick_start libraries. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup application build & execute DRM026 ? rev 0 designer reference manual motorola application setup 183 figure 8-9. execute make command to execute the bldc sensorless mo tor control application, select project\debug in the codewarrior id e, followed by the run command. for more help with these commands, refer to the codewarrior tutorial documentation in the following fi le located in the codewarrior installation folder: <...>\codewarrior documentation\pdf\ targeting_dsp56800.pdf if the flash target is selected, c odewarrior will autom atically program the internal flash of the dsp with the executable generated during build . if the external ram target is sele cted, the executable will be loaded to off-chip ram. once flash has been progr ammed with the execut able, the evm target system may be run in a stand-alone m ode from flash. to do this, set the jg5 jumper in the 1-2 co nfiguration to disable t he parallel port, and press the reset button. once the applicat ion is running, move the ru n/stop switch to the run position and set the r equired speed using the up/ down push buttons. pressing the up/down buttons shou ld incrementally increase the motor speed until it r eaches maximum speed. if successful, the bldc motor will be spinning. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . application setup designer reference manual DRM026 ? rev 0 184 application setup motorola note: if the run/stop switch is set to t he run position when the application starts, toggle the run/stop s witch between the stop and run positions to enable motor spinning. this is a pr otection feature that prevents the motor from starting when the applicat ion is executed from codewarrior. you should also see a lighted green led, which indicates that the application is running. if the application is stop ped, the gree n led will blink at a 2hz frequency. if an under voltage fault occurs, the green led will blink at a frequency of 8hz. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola references 185 designer reference manual ? 3-ph bl dc with sensorless adc zc detection appendix a. references 1. motion control development tools found on the world wide web at: http://e-www.motorola.com 2. dsp56f805 evaluation module hardware user?s manual , dsp56f805evmum/d, motorola 2001 3. motorola embedded motion control 3-phase ac bldc high-voltage power stage user?s manual (document order number memc3pbldcpsum /d), motorola 2000 4. motorola embedded motion con trol optoisolation board (document order number me mcobum/d), motorola 2000 5. motorola embedded motion con trol evaluation motor board user?s manual (document order num ber memcevmbum/d), motorola 2000 6. motorola embedded motion cont rol 3-phase bldc low-voltage power stage user?s manual (document order number memc3pbldclvum/d), motorola 2000 7. user?s manual for pc master software, mo torola 2000, found on the world wide web at: http://e-www.motorola.com 8. low cost high efficiency sensor less drive for brushless dc motor using mc68hc(7)05mc4 (document order number an1627), motorola 9. dsp parallel command converte r hardware user?s manual , mcsl, mc108um2r1 10. embedded software develo pment kit for 56800/56800e , msw3sdk000aa, on motorola www 1. , motorola, 2001 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . references designer reference manual DRM026 ? rev 0 186 references motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . DRM026 ? rev 0 designer reference manual motorola glossary 187 designer reference manual ? 3-ph bl dc with sensorless adc zc detection appendix b. glossary ac ? alternative current. acim ? ac induction motor. a/d converter ? analog to digital converter. adc ? analog to digital converte r - see ?a/d converter? back-emf ? back electro-motive force (i n this document it means the voltage inducted into motor winding due to rotor movement) bldc ? brushless dc motor. cw ? codewarrior - compille rs produced by metrowerks dc ? direct current. dc-bus ? part of power converter with direct current dc-motor ? direct current motor, if not mentioned di fferently, it means the motor with brushes. dt ? see ?dead time (dt)? dead time (dt) ? short time that must be inserted between the turning off of one transistor in the invert er half bridge and tu rning on of the complementary transistor due to t he limited switching speed of the transistors. duty cycle ? a ratio of the amount of time the signal is on versus the time it is off. duty cycle is us ually represented by a percentage. eclovacbldc ? 3-ph ac/bldc low vo ltage power stage ecmtrlovbldc ? 3-ph bldc low voltage motor-brake sm40n + sg40n f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . glossary designer reference manual DRM026 ? rev 0 188 glossary motorola ecmtreval ? evaluation motor board ki t (supplied in kit with trapezoidal bldc ib23810) ecopthivacbldc ? 3-ph ac/bldc high voltage power stage + optoisolation board ecmtrhivbldc ? 3-ph bldc high voltage motor-brake sm40v + sg40n ecoptinl ? optoisolation between hos t computer and mcu board evaluation or customer tar get cards (optoisolation board) ecopt ? optoisolation between power stage and processor evaluation or controller cards (i n line optoisolator) ide ? integrated devel opement environment interrupt ? a temporary break in the sequential exec ution of a program to respond to signals fro m peripheral devices by executing a subroutine. input/output (i/o) ? input/output interfac es between a computer system and the external world. a cpu reads an input to sense the level of an external signal an d writes to an output to change the level on an external signal. logic 1 ? a voltage level approximately equal to the inpu t power voltage (v dd ). logic 0 ? a voltage level approximatel y equal to t he ground voltage (v ss ). mc ? motor control mcu ? microcontroller unit. a comp lete computer system, including a cpu, memory, a clock oscillator, and input/output (i/o) on a single integrated circuit. mw ? metrowerks corporation pcm ? pc master software for comm unication between pc computer and system f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . glossary DRM026 ? rev 0 designer reference manual motorola glossary 189 phase-locked loop (pll) ? a clock generator circuit in which a voltage controlled oscillator produces an osci llation which is synchronized to a reference signal. pmp ? pc master soft ware project file pval ? pwm value register of moto r control pwm module of 56805 controller. it defines the dut y cycle of generated pwm signal. pwm ? pulse width modulation reset ? to force a device to a known condition. sci ? see "serial communication interface module (sci)." sdk ? software developement kit - sw pack with drivers and algorithms for dsp (to be find on the motorola www) serial communications inte rface module (sci) ? a module that supports asynchronous communication. serial peripheral inte rface module (spi) ? a module that supports synchronous communication. software ? instructions and data that control the operation of a microcontroller. software interrupt (swi) ? an instruction that causes an interrupt and its associated vector fetch. spi ? see "serial peripheral interface module (spi)." sr ? switched reluctance motor. timer ? a module used to relate events in a system to a point in time. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . glossary designer reference manual DRM026 ? rev 0 190 glossary motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . how to reach us: usa/europe/locations not listed: motorola literature distribution; p.o. box 5405, denver, colorado 80217 1-303-675-2140 or 1-800-441-2447 japan: motorola japan ltd.; sps, technical information center, 3-20-1, minami-azabu minato-ku, tokyo 106-8573 japan 81-3-3440-3569 asia/pacific: motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong kong 852-26668334 technical information center: 1-800-521-6274 home page: http://motorola.com/semiconductors information in this document is provided solely to enable system and software implementers to use motorola products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any partic ular purpose, nor does motorola assume any liability arising out of the app lication or use of any product or circuit, and specifically disclaims any and all liability, including withou t limitation consequential or incidental damages. ?typical? parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not desig ned, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and the stylized m logo are registered in the u.s. patent and trademark office. digital dna is a trademark of motorola, inc. all other product or service names are the property of their respective owners. motorola, inc. is an equal opportunity/affirmative action employer. ? motorola, inc. 2003 DRM026/d f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . |
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