uc1872 uc2872 uc3872 07/99 features ? controls different types of lamps: cold cathode fluorescent, neon, and gas discharge ? zero voltage switching (zvs) of push-pull drivers ? accurate control of lamp current ? variable lamp intensity control ? 1 a disable current ? 4.5v to 24v operation ? open lamp detection circuitry description the uc3872 is a resonant lamp ballast controller optimized for driving cold cathode fluorescent, neon, and other gas discharge lamps. the res - onant power stage develops a sinusoidal lamp drive voltage, and mini - mizes switching loss and emi generation. lamp intensity adjustment is accomplished with a buck regulator, which is synchronized to the external power stage?s resonant frequency. suitable for automotive and battery powered applications, the uc3872 draws only 1 a when disabled. soft start and open lamp detect circuitry have been incorporated to mini - mize component stresses. open lamp detection is enabled at the comple - tion of a soft start cycle. the chip is optimized for smooth duty cycle control to 100%. other features include a precision 1.2% reference, undervoltage lockout, and accurate minimum and maximum frequency control. resonant lamp ballast controller 4 6 5 3 2 12 13 1 14 7 8 + ? 0.5v sync out sense oscillator gnd + ? ? + open lamp detect + ? + ? uvlo 3.0v ref 10 9 11 r s t toggle 50k 50k 50k push pull outputs n-channel vc aout bout cout pgnd 0.1v pwm 1 0.2v 200 a zero detect zd ct ss inv comp enbl ref vcc 1.5v 20 a (high=enable) buck drive p-channel ea block diagram udg-99112 note: pin numbers shown are for dip package. application info available
2 uc1872 uc2872 uc3872 electrical characteristics: unless otherwise stated, these parameters apply for t j = ? 55 c to +125c for the uc1872, ?40 c to +85 c for the uc2872, ? 0c to +70c for the uc3872; vcc= 5v, vc = 15v, v enbl = 5v, ct = 1nf, zd = 1v. parameter test conditions min typ max units reference section output voltage t j = 25 c 2.963 3.000 3.037 v over temperature 2.940 3.000 3.060 v line regulation vcc = 4.75v to 18v 10 mv load regulation i o = 0 to ? 5ma 10 mv oscillator section free running frequency t j = 25 c 576878khz maximum synchronization frequency t j = 25 c 160 200 240 khz charge current v ct = 1.5v 180 200 220 a voltage stability 2% temperature stability 48% zero detect threshold 0.46 0.5 0.56 v error amp section input voltage v o = 2v 1.445 1.475 1.505 v input bias current ? 0.4 ? 2 a open loop gain v o = 0.5 to 3v 65 90 db output high v inv = 1.3v 3.1 3.5 3.9 v absolute maximum ratings analog inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? 0.3 to +10v vcc, vc voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +24v zd input current high impedance source . . . . . . . . . . . . . . . . . . . . . . +10ma zd input voltage low impedance source . . . . . . . . . . . . . . . . . . . . . . . . +24v power dissipation at t a = 25 c . . . . . . . . . . . . . . . . . . . . . . 1w storage temperature . . . . . . . . . . . . . . . . . . . ? 65 c to +150 c lead temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 c note 1 : currents are positive into, negative out of the specified terminal. note 2 : consult packaging section of databook for thermal limi - tations and considerations of package. dil-14 (top view) n package plcc-20 (top view) q package connection diagrams soic-16, ssop-16 (top view) dw, m package
3 uc1872 uc2872 uc3872 electrical characteristics: unless otherwise stated, these parameters apply for t j = ? 55 c to +125c for the uc1872, ?40 c to +85 c for the uc2872, ? 0c to +70c for the uc3872; vcc= 5v, vc = 15v, v enbl = 5v, ct = 1nf, zd = 1v. parameter test conditions min typ max units error amp section (cont.) output low v inv = 1.7v 0.1 0.2 v output source current v inv = 1.3v, v o = 2v ?350 ?500 a output sink current v inv = 1.7v, v o = 2v 10 20 ma common mode range 0v in -1v v unity gain bandwidth t j = 25 c (note 4) 1 mhz open lamp detect section soft start threshold v inv = 0v 2.9 3.4 3.8 v open lamp detect threshold v ss = 4.2v 0.6 1.0 1.4 v soft start current v ss = 2v 10 20 40 a output section output low level i out = 0, outputs a and b 0.05 0.2 v i out = 10ma 0.1 0.4 v i out = 100ma 1.5 2.2 v output high level i out = 0, output c 13.9 14.9 v i out = ? 10ma 13.5 14.3 v i out = ? 100ma 12.5 13.5 v rise time t j = 25 c, cl = 1nf (note 4) 30 80 ns fall time t j = 25 c, cl = 1nf (note 4) 30 80 ns output dynamics out a and b duty cycle 48 49.9 50 % out c max duty cycle v inv = 1v 100 % out c min duty cycle v inv = 2v 0 % under voltage lockout section startup threshold voltage 3.7 4.2 4.5 v hysteresis 120 200 280 mv enable section input high threshold 2v input low threshold 0.8 v input current v enbl = 5v 150 400 a supply current section vcc supply current vcc = 24v 6 14 ma vc supply current vc = 24v 5 12 ma icc disabled vcc = 24v, v enbl = 0v 1 10 a note 3 : unless otherwise specified, all voltages are with respect to ground. currents are positive into, and negative out of the specified terminal. note 4: guaranteed by design. not 100% tested in production.
4 uc1872 uc2872 uc3872 aout, bout: these outputs provide complementary drive signals for the push-pull n-channel mosfets. each one is high for 50% of the time, switching states each time a zero-detect is sensed. comp: comp is the output terminal of the error ampli - fier. compensation components are normally connected between comp and inv. connecting a capacitor from this pin to ground limits turn on current and blanks the open lamp detect signal allowing the lamp to start. cout: this output directly drives the bulk regulator p-channel mosfet. cout turn-on is synchronized to each zero-detect, and therefore switches at twice the fre - quency of aout and bout. the modulator controlling cout is designed to provide smooth control up to 100% duty cycle. ct: a capacitor connected between this pin and gnd ground sets the synchronization frequency range. the capacitor is charged with approximately 200 a, creating a linear ramp which is used by cout?s (buck regulator driver) pwm comparator. enbl: when enbl is driven high the device is enabled. when enbl is pulled low, the ic is shut down and typi- cally draws 1 a. gnd: this pin is the ground reference point for the inter- nal reference and all thresholds. inv: this pin is the inverting input to the error amplifier and the input for the open lamp detect circuitry. if the voltage at inv is below the 1v open lamp detect thresh - old, the outputs are disabled. pgnd: this pin is the high current ground connection for the three output drivers. ref: this pin is connected to the 3v reference voltage which is used for the internal logic. bypass ref to ground with a 0.01 f ceramic capacitor for proper opera - tion. vc: vc is the power supply voltage connection for the output drivers. bypass it to ground with a 0.1 f ceramic capacitor for proper operation. vcc: vcc is the positive supply voltage for the chip. its operating range is from 4.2v to 24v. bypass vcc to ground with a 0.1 f ceramic capacitor for proper opera - tion. zd: the zero-detect input senses when the trans- former?s primary center tap voltage falls to zero to syn- chronize the sawtooth voltage waveform on ct. the threshold is approximately 0.5v, providing a small amount of offset such that with propagation delay, zero-volt switching occurs. a resistor (typically 10k) should be connected between zd and the primary cen- ter tap to limit input current at turn off. pin descriptions figure 1 shows a complete application circuit using the uc3872 resonant lamp ballast controller. the ic pro - vides all drive, control and housekeeping functions. the buck output voltage (transformer center-tap) provides the zero crossing and synchronization signals. the buck modulator drives a p-channel mosfet di - rectly, and operates over a 0-100% duty-cycle range. the modulation range includes 100%, allowing operation with minimal headroom. the oscillator and synchronization circuitry are shown in figure 2. the oscillator is designed to synchronize over a 3:1 frequency range. in an actual application however, the frequency range is only about 1.5:1. a zero detect comparator senses the primary center-tap voltage, gen - erating a synchronization pulse when the resonant wave - form falls to zero. the actual threshold is 0.5 volts, providing a small amount of anticipation to offset propa - gation delay. the synchronization pulse width is the time required for the 4ma current sink to discharge the timing capacitor to 0.1 volts. this pulse width limits the minimum linear con - trol range of the buck regulator. the 200 a current source charges the capacitor to a maximum of 3 volts. a comparator blanks the zero detect signal until the capac - itor voltage exceeds 1 volt, preventing multiple synchro - nization pulse generation and setting the maximum frequency. if the capacitor voltage reaches 3 volts (a zero detection has not occurred) an internal clock pulse is generated to limit the minimum frequency. application information
5 uc1872 uc2872 uc3872 figure 1. typical application. udg-93018-2 a unique protection feature incorporated in the uc3872 is the open lamp detect circuit. an open lamp interrupts the current feedback loop and causes very high second - ary voltage. operation in this mode will usually break - down the transformer?s insulation, causing permanent damage to the converter. the open lamp detect circuit, shown in figure 3 senses the lamp current feedback sig - nal at the error amplifier?s input, and shuts down the out - puts if insufficient signal is present. soft start circuitry limits initial turn-on currents and blanks the open lamp detect signal. other features are included to minimize external circuitry requirements. a logic level enable pin shuts down the ic, allowing direct connection to a battery. during shut- down, the ic typically draws less than 1 a. the uc3872, operating from 4.5v to 24v, is compatible with almost all battery voltages used in portable computers and auto - motive applications. undervoltage lockout circuitry dis - ables operation until sufficient supply voltage is available, and a 1% voltage reference insures accurate operation. application information (cont.)
6 uc1872 uc2872 uc3872 applications information 7 8 + ? + ? 200 a + ? + ? ct 0.1v 3.0v max freq comparator 0.5v zd 1.0v zero detect clk s q r 4ma discharge comparator min freq comparator figure 2. uc3872 oscillator section. figure 3. uc3872 open lamp detect circuitry. unitrode corporation 7 continental blvd. merrimack, nh 03054 tel. (603) 424-2410 fax (603) 424-3460 udg-99005
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