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  WS57C49C mode pins cs1/v pp v cc outputs read v il v cc d out output disable v ih v cc high z program v pp v cc d in program verify v il v cc d out v cc a 8 a 9 a 10 cs1/v pp a 11 a 12 o 7 o 6 o 5 o 4 o 3 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 o 0 o 1 o 2 gnd a 10 cs1/v pp a 11 a 12 nc o 7 o 6 a 5 a 6 a 7 v cc a 8 a 9 nc a 4 a 3 a 2 a 1 a 0 nc o 0 o 1 o 2 nc o 3 o 4 o 5 gnd 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 1 432 28 27 26 25 24 23 22 21 20 19 5 6 7 8 9 10 11 12 13 14 15 16 17 18 top view chip carrier cerdip/flatpack mode selection pin configuration 4-9 military high speed 8k x 8 cmos prom/rprom key features ultra-fast access time pin compatible with bipolar proms ? t acc = 35 ns immune to latch-up ? t cs = 20 ns ? up to 200 ma low power consumption esd protection exceeds 2000 v fast programming available in 300 and 600 mil dip, cllcc, and flatpack general description the WS57C49C is a high performance 64k uv erasable electrically r e-p rogrammable r ead o nly m emory (rprom). it is manufactured in an advanced cmos technology which enables it to operate at bipolar prom speeds while consuming only 25% of the power required by its bipolar counterparts. a further advantage of the WS57C49C over bipolar prom devices is the fact that it utilizes a proven eprom technology. this enables the entire memory array to be tested for switching characteristics and functionality after assembly. unlike devices which cannot be erased, every WS57C49C in a windowed package is 100% tested with worst case test patterns both before and after assembly. the WS57C49C is configured in the standard bipolar prom pinout which provides an easy upgrade path for systems which are currently using bipolar proms, or its predecessor, the ws57c49b. product selection guide parameter WS57C49C-35 WS57C49C-45 WS57C49C-55 WS57C49C-70 address access time (max) 35 ns 45 ns 55 ns 70 ns cs to output valid time (max) 20 ns 25 ns 25 ns 25 ns return to main menu
WS57C49C 4-10 ordering information operating wsi part number temperature manufacturing range procedure WS57C49C-35cmb * 35 28 pad cllcc c1 military mil-std-883c WS57C49C-35tmb * 45 24 pin cerdip, 0.3" t1 military mil-std-883c WS57C49C-35dmb 45 24 pin cerdip, 0.6" d1 military mil-std-883c WS57C49C-45cmb * 45 28 pad cllcc c1 military mil-std-883c WS57C49C-45dmb * 45 24 pin cerdip, 0.6" d1 military mil-std-883c WS57C49C-45tmb * 45 24 pin cerdip, 0.3" t1 military mil-std-883c WS57C49C-55cmb * 55 28 pad cllcc c1 military mil-std-883c WS57C49C-55dmb * 55 24 pin cerdip, 0.6" d1 military mil-std-883c WS57C49C-55fmb * 55 24 pin ceramic flatpack f1 military mil-std-883c WS57C49C-55tmb * 55 24 pin cerdip, 0.3" t1 military mil-std-883c WS57C49C-70cmb * 70 28 pad cllcc c1 military mil-std-883c WS57C49C-70tmb * 70 28 pin cerdip, 0.3" t1 military mil-std-883c speed package package (ns) type drawing programming/algorithms/erasure/programmers refer to page 5-1 the WS57C49C is programmed using algorithm d shown on page 5-9. note: the actual part marking will not include the initials "ws." * smd product. see page 4-1 for desc smd numbers. for complete data sheet and electrical specifications see page 2-39. return to main menu


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