1 ps2013a 03/09/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct273t (25 w w w w w series) p174fct2273t octal d flip-flop with master reset product description pericom semiconductor?s pi74fct series of logic circuits are pro- duced in the company?s advanced 0.6/0.8 micron cmos technology, achieving industry leading speed grades. all pi74fct2xxx devices have a built-in 25-ohm series resistor on all outputs to reduce noise because of reflections, thus eliminating the need for an external terminating resistor. the pi74fct273t and pi74fct2273t is an 8-bit wide octal designed with eight edge-triggered d-type flip-flops with individual d inputs and o outputs. the common buffered clock (cp) and master reset (mr) load and resets (clear) all flip-flops simultaneously. the register is fully edge-triggered. the d input state, one setup time before the low-to-high clock transition, is transferred to the corresponding flip-flop's o output. all outputs will be forced low independently of clock or data inputs by a low voltage level on the mr input. device models available upon request. fast cmos octal d flip-flop with master reset logic block diagram inputs outputs mode mr cp d n o n reset (clear) l x x l load "1" h - hh load "0" h - ll truth table (1) pin name description mr master reset (active low) cp clock pulse input (active rising edge) d 0 -d 7 data inputs o 0 -o 7 data outputs gnd ground v cc power product pin description product pin configuration 1. h = high voltage level h = high voltage level one setup time prior to the low-to-high clock transition l = low voltage level l = low voltage level one setup time prior to the low-to-high clock transition x = don?t care - = low-to-high clock transition 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct273t (25w (25w (25w (25w (25w series) pi74fct2273t product features ? pi74fct273/2273t is pin compatible with bipolar fast? series at a higher speed and lower power consumption ?25 w series resistor on all outputs (fct2xxx only) ? ttl input and output levels ? low ground bounce outputs ? extremely low static power ? hysteresis on all inputs ? industrial operating temperature range: ?40c to +85c ? packages available: ? 20-pin 173 mil wide plastic tssop (l) ? 20-pin 300 mil wide plastic dip (p) ? 20-pin 150 mil wide plastic qsop (q) ? 20-pin 150 mil wide plastic tqsop (r) ? 20-pin 300 mil wide plastic soic (s) d r d d 0 o 0 cp cp mr q d r d d 1 o 1 cp q d r d d 2 o 2 cp q d r d d 3 o 3 cp q d r d d 4 o 4 cp q d r d d 5 o 5 cp q d r d d 6 o 6 cp q d r d d 7 o 7 cp q 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 mr o 0 d 0 d 1 o 1 o 2 d 2 d 3 o 3 gnd vcc o 7 d 7 d 6 o 6 o 5 d 5 d 4 o 4 cp 20-pin l20 p20 q20 r20 s20
2 ps2013a 03/09/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct273t (25 w w w w w series) p174fct2273t octal d flip-flop with master reset storage temperature ............................................................ ?65c to +150c ambient temperature with power applied ............................ -40c to +85c supply voltage to ground potential (inputs & vcc only) ..... ?0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) .. ?0.5v to +7.0v dc input voltage .................................................................... ?0.5v to +7.0v dc output current .............................................................................. 120 ma power dissipation .....................................................................................0.5w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other condi- tions above those indicated in the operational sec- tions of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 5.0v 5%) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?15.0ma 2.4 3.0 v v ol output low current v cc = min., v in = v ih or v il i ol = 64ma 0.3 0.55 v v ol output low current v cc = min., v in = v ih or v il i ol = 12ma (25 w series) 0.3 0.50 v v ih input high voltage guaranteed logic high level 2.0 v v il input low voltage guaranteed logic low level 0.8 v i ih input high current v cc = max. v in = v cc 1a i il input low current v cc = max. v in = gnd ?1 a i ozh high impedance v cc = m ax .v out = 2.7v 1 a i ozl output current v out = 0.5v ?1 a v ik clamp diode voltage v cc = min., i in = ?18ma ?0.7 ?1.2 v i off power down disable v cc = gnd, v out = 4.5v ? ? 100 a i os short circuit current v cc = max. (3) , v out = gnd ?60 ?120 ma v h input hysteresis 200 mv capacitance (t a = 25c, f = 1 mhz) parameters (4) description test conditions typ max. units c in input capacitance v in = 0v 6 10 pf c out output capacitance v out = 0v 8 12 pf notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type . 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is determined by device characterization but is not production tested. maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.)
3 ps2013a 03/09/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct273t (25 w w w w w series) p174fct2273t octal d flip-flop with master reset power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power v cc = max. v in = gnd or v cc 0.1 500 a supply current d i cc supply current per v cc = max. v in = 3.4v (3) 0.5 2.0 ma per input @ ttl high i ccd supply current per v cc = max., outputs open v in = v cc 0.15 0.25 ma/ input per mhx (4) mr = vcc, one input toggling v in = gnd mhz 50% duty cycle i c total power supply v cc = max., outputs open v in = v cc 1.5 3.5 (5) ma current (6) f cp = 10 mh z , 50% duty cycle v in = gnd mr = vcc, 50% duty cycle v in = 3.4v 2.0 3.5 (5) one bit toggling at f i = 5 mh z v in = gnd v cc = max., outputs open v in = v cc 3.8 7.3 (5) f cp = 10 mh z , 50% duty cycle v in = gnd mr = v cc , 50% duty cycle v in = 3.4v eight bits toggling at v in = gnd 6.0 16.3 (5) f i = 2.5 mh z , 50% duty cycle notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device. 2. typical values are at vcc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
4 ps2013a 03/09/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct273t (25 w w w w w series) p174fct2273t octal d flip-flop with master reset notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter guaranteed but not production tested. switching characteristics over operating range 273t/2273t 273at/2273at 273ct/2273ct 273dt com. com. com. com. parameters description conditions (1) min max min max min max min max unit t plh propagation delay c l = 50pf 2.0 13.0 2.0 7.2 2.0 5.8 2.0 4.4 ns t phl cp to o n r l = 500 w t phl propagation delay 2.0 13.0 2.0 7.2 2.0 6.1 2.0 5.0 ns t plh mr to o n t su setup time, high or low 3.0 ? 2.0 ? 2.0 ? 2.0 ? ns dn to cp t h hold time, high or low 2.0 ? 1.5 ? 1.5 ? 1.5 ? ns dn to cp tw cp pulse width (3) 7.0 ? 6.0 ? 6.0 ? 3.0 ? ns high or low t w mr pulse width (3) 7.0 ? 6.0 ? 6.0 ? 3.0 ? ns low t rem recovery time mr to cp (3) 4.0 ? 2.0 ? 2.0 ? 2.0 ? ns pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com
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