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revisions ltr description date (yr-mo-da) approved a in accordance with n.o.r. 5962-r182-94. 94-04-26 m. a. frye b in accordance with n.o.r. 5962-r192-94. 94-06-01 m. a. frye c in accordance with n.o.r. 5962-r059-95. 95-01-25 m. a. frye d in accordance with n.o.r. 5962-r206-95. 95-10-11 m. a. frye e in accordance with n.o.r. 5962-r094-96. 96-04-10 m. a. frye f in accordance with n.o.r. 5962-r252-97. 97-03-21 r. monnin g incorporate previous notice of revisions. redrawn. 97-07-10 r. monnin h add a footnote to unity gain bandwidth and slew rate tests in table i. update boilerplate. -rrp 01-05-07 r. monnin j add footnote 3 / to tests t od , t do , and t d , in table i. add footnote 6 / to tests ps, t os , and f max in table i. - gt 02-04-03 r. monnin the original first sheet of this drawing has been replaced. rev sheet rev j sheet 15 rev status rev j j j j j j j j j j j j j j of sheets sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 14 pmic n/a prepared by rick officer defense supply center columbus standard microcircuit drawing checked by rajesh pithadia columbus, ohio 43216 http://www.d scc.dla.mil this drawing is available for use by all departments approved by raymond monnin microcircuit, linear, phase shift resonant controller, monolithic silicon and agencies of the department of defense drawing approval date 94-04-05 amsc n/a revision level j size a cage code 67268 5962-94555 sheet 1 of 15 dscc form 2233 apr 97 5962-e324-02 distribution statement a . approved for public releas e; distribution is unlimited.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 2 dscc form 2234 apr 97 1. scope 1.1 scope . this drawing documents two product assurance class le vels consisting of high reliability (device classes q and m) and space application (device class v). a choice of case outlines and lead finishes are available and are reflected in the part or identifying number (pin). when available, a choice of radiation hardness assurance (rha ) levels are reflected in the pin. 1.2 pin . the pin is as shown in the following example: 5962 - 94555 01 m r x federal stock class designator rha designator (see 1.2.1) device type (see 1.2.2) device class designator case outline (see 1.2.4) lead finish (see 1.2.5) \ / (see 1.2.3) \/ drawing number 1.2.1 rha designator . device classes q and v rha marked devices meet the mil-prf-38535 specified rha levels and are marked with the appropriate rha designator. device class m rha marked devices meet the mil-prf-38535, appendix a specified rha levels and are marked with the appropriate rha designator. a dash (-) indicates a non-rha device. 1.2.2 device type(s) . the device type(s) identify the circuit function as follows: uvlo uvlo device type generic number circuit function turn-on turn-off 01 uc1875 phase shift resonant controller 10.75 v 9.25 v 1.2.3 device class designator . the device class designator is a single letter identifying the product assurance level as follows: device class device requirements documentation m vendor self-certification to the requirements for mil-std-883 compliant, non- jan class level b microcircuits in accordance with mil-prf-38535, appendix a q or v certification and qualification to mil-prf-38535 1.2.4 case outline(s) . the case outline(s) are as designated in mil-std-1835 and as follows: outline letter descriptive designator terminals package style r gdip1-t20 or cdip2-t20 20 dual-in-line x cqcc1-n28b 28 square leadless chip carrier with thermal pads 3 cqcc1-n28 28 square leadless chip carrier 1.2.5 lead finish . the lead finish is as specified in mil-pr f-38535 for device classes q and v or mil-prf-38535, appendix a for device class m.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 3 dscc form 2234 apr 97 1.3 absolute maximum ratings . 1 / supply voltage (v c , v in ) ......................................................... 20 v output current, source or sink: dc ........................................................................................ 0.5 a pulse (0.5 s) ....................................................................... 3 a analog i/o pins....................................................................... -0.3 v to 5.3 v operating junction temperature (t j )....................................... 150 c storage temperature range .................................................... -65 c to +150 c lead temperature (solderi ng, 10 seconds ) ............................ 300 c thermal resistance, junction-to-case ( jc ) ............................. see mil-std-1835 thermal resistance, junction-to-ambient ( ja ): case r ................................................................................. 85 c/w cases x and 3...................................................................... 65 c/w 1.4 recommended operating conditions . supply voltage (v c , v in ) ......................................................... 12 v ambient operating temperature (t a ) ...................................... -55 c to +125 c 2. applicable documents 2.1 government specification, standards, and handbooks . the following specification, standards, and handbooks form a part of this drawing to the extent specified herein. unless ot herwise specified, the issues of these documents are those liste d in the issue of the department of defense i ndex of specifications and standards (dodi ss) and supplement thereto, cited in the solicitation. specification department of defense mil-prf-38535 - integrated circuits, manufacturing, general specification for. standards department of defense mil-std-883 - test method standard microcircuits. mil-std-1835 - interface standard electronic component case outlines. handbooks department of defense mil-hdbk-103 - list of standard microcircuit drawings. mil-hdbk-780 - standard microcircuit drawings. (unless otherwise indicated, copies of the specificat ion, standards, and handbooks are ava ilable from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111-5094.) 2.2 order of precedence . in the event of a conflict between the text of th is drawing and the references cited herein, the text of this drawing takes precedence. nothing in this docum ent, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1 / stresses above the absolute maximum rating may cause permanent damage to the device. extended operation at the maximum levels may degrade performance and affect reliability.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 4 dscc form 2234 apr 97 3. requirements 3.1 item requirements . the individual item requirements for device classes q and v shall be in accordance with mil-prf-38535 and as specified herein or as modified in the device manufacturer' s quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. the individual item requirements for device class m shall be in accordance with mil-prf-38535, appendix a for non-jan class level b devices and as specified herein. 3.2 design, construction, and physical dimensions . the design, construction, and physica l dimensions shall be as specified in mil-prf-38535 and herein for device classes q and v or mil-prf-38535, appendix a and herein for device class m. 3.2.1 case outline(s) . the case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 terminal connections . the terminal connections sha ll be as specified on figure 1. 3.2.3 logic diagram(s) . the logic diagram(s) shall be as specified on figure 2. 3.2.4 timing diagram(s) . the timing diagram(s) shall be as specified on figure 3. 3.3 electrical perform ance characteristics and posti rradiation parameter limits . unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as s pecified in table i and shall apply over th e full ambient operating temperature range. 3.4 electrical test requirements . the electrical test requirements shall be the subgroups specified in t able ii. the electrical tests for each subgroup are defined in table i. 3.5 marking . the part shall be marked with the pin listed in 1.2 her ein. in addition, the manufacturer's pin may also be marked as listed in mil-hdbk-103. for pa ckages where marking of the entire smd pi n number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. for rha product using this option, the rha designator shall still be marked. marking for device cl asses q and v shall be in accordance with mil-prf-38535. marking for device class m shall be in accordance with mil-prf-38535, appendix a. 3.5.1 certification/compliance mark . the certification mark for device classes q and v shall be a "qml" or "q" as required in mil-prf-38535. the compliance mark for device class m shall be a "c" as required in mil-prf-38535, appendix a. 3.6 certificate of compliance . for device classes q and v, a certificate of compliance shall be required from a qml-38535 listed manufacturer in order to supply to t he requirements of this drawing (see 6.6.1 herein). for device class m, a certifica te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in mil-hdbk-103 (see 6.6.2 herein). the certificate of compliance submitted to ds cc-va prior to listing as an approv ed source of supply for this drawing shall affirm that the manufactu rer's product meets, for device classes q and v, the requirements of mil-prf-38535 and herein or for device class m, the requi rements of mil-prf-38535, appendix a and herein. 3.7 certificate of conformance . a certificate of conformance as required for device classes q and v in mil-prf-38535 or for device class m in mil-prf-38535, appendix a shall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change for device class m . for device class m, notification to dscc-va of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in mil-prf-38535, appendix a. 3.9 verification and review for device class m . for device class m, dscc, dscc's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. offs hore documentation shall be made available onshore at the option of the reviewer. 3.10 microcircuit group assignment for device class m . device class m devices covered by this drawing shall be in microcircuit group number 110 (see mil-prf-38535, appendix a).
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 5 dscc form 2234 apr 97 table i. electrical per formance characteristics . test symbol conditions 1 / -55 c t a +125 c unless otherwise specified group a subgroups device type limits 2 / unit min max supply current section input current startup i is v in = 8 v, v c = 20 v, r slope = open, i delay = 0 ma 1,2,3 01 600 a output switch supply current startup i is v in = 8 v, v c = 20 v, r slope = open, i delay = 0 ma 1,2,3 01 100 a input supply current i in 1,2,3 01 40 ma output switch supply current i c 1,2,3 01 30 ma voltage reference section output voltage v out t a = +25 c 1 01 4.92 5.08 v load regulation v ld v ref = -10 ma 1,2,3 01 20 mv line regulation v ln +v in = 11 v to 20 v 1,2,3 01 10 mv total variation v t line, load, temperature 1,2,3 01 5.1 v error amplifier section offset voltage v io 1,2,3 01 15 mv input bias current i ib 1,2,3 01 3 a open loop voltage gain a vol v comp = 1 v to 4 v 4,5,6 01 60 db common mode rejection ratio cmrr v cm = 1.5 v to 5.5 v 4,5,6 01 75 db power supply rejection ratio psrr v in = 11 v to 20 v 4,5,6 01 85 db output sink current i si v comp = 1 v 1,2,3 01 1 ma see footnotes at end of table.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 6 dscc form 2234 apr 97 table i. electrical per formance characteristics ? continued. test symbol conditions 1 / -55 c t a +125 c unless otherwise specified group a subgroups device type limits 2 / unit min max error amplifier section - continued output source current i so v comp = 4 v 1,2,3 01 -0.5 ma output voltage, high v oh i comp = -0.5 ma 1,2,3 01 4 5 v output voltage, low v ol i comp = 1 ma 1,2,3 01 0 1 v unity gain bandwidth 3 / ugbw 4,5,6 01 5 mhz slew rate 3 / sr 4,5,6 01 6 v/ s pulse width modulator section zero phase shift voltage vzps 4 / 1,2,3 01 0.55 v v comp > (ramp peak + ramp offset) 98 102 pulse width modulator 5 / 6 / phase shift ps v comp < (zero phase shift voltage) 4,5,6 01 0 2 % output skew 5 / 6 / t os v comp < 1 v 9,10,11 01 20 ns ramp to output delay 3 / t od 9,10,11 01 125 ns oscillator section initial accuracy ia t a = +25 c 4 01 0.85 1.15 mhz voltage stability vs v in = 11 v to 20 v 4,5,6 01 2 % total variation vt line, temperature 1,2,3 01 0.80 1.20 mhz clock output pulse width t clko r clk/sync = 3.9 k ? 4,5,6 01 100 ns maximum frequency 6 / f max r fset = 5 k ? 4,5,6 01 2 mhz see footnotes at end of table.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 7 dscc form 2234 apr 97 table i. electrical per formance characteristics ? continued. test symbol conditions 1 / -55 c t a +125 c unless otherwise specified group a subgroups device type limits 2 / unit min max ramp generator / slope compensation section minimum ramp current i rmin i slope = 10 a, v fset = v ref 1,2,3 01 -14 a maximum ramp current i rmax i slope = 1 ma, v fset = v ref 1,2,3 01 -0.8 ma ramp peak, clamping level voltage v cl r fset = 100 k ? 1,2,3 01 3.8 v current limit section input bias current i ib c +c/s = 3 v 1,2,3 01 5 a threshold voltage v th 1,2,3 01 2.4 2.6 v delay to output 3 / t do 9,10,11 01 150 ns soft-start / reset delay section charge current i ch v s-s = 0.5 v 1,2,3 01 -20 -3 a discharge current i dch v s-s = 1 v 1,2,3 01 120 a restart threshold voltage v rth 1,2,3 01 4.3 v output drivers section output low level voltage v ol i out = 50 ma 1,2,3 01 0.4 v output high level voltage v oh i out = -50 ma 1,2,3 01 2.5 v see footnotes at end of table.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 8 dscc form 2234 apr 97 table i. electrical per formance characteristics ? continued. test symbol conditions 1 / -55 c t a +125 c unless otherwise specified group a subgroups device type limits 2 / unit min max delay set section delay set voltage v ds i delay = -500 a 1,2,3 01 2.3 2.6 v delay time 3 / t d i delay = -250 a 7 / 9,10,11 01 150 600 ns 1 / unless otherwise specified, v s = +v in = 12 v, frequency set resistance r fset = 12 k ? , frequency set capacitance c fset = 330 pf, slope resistance r slope = 12 k ? , ramp capacitance c ramp = 200 pf, delay set capacitance c ds a-b = c ds c-d = 0.01 f, delay set current i ds a-b = i ds c-d = -500 a. 2 / the algebraic convention, whereby the most negative va lue is a minimum and the most positive is a maximum, is used in this table. negative current shall be defined as conventional current fl ow out of a device terminal. 3 / not production tested. 4 / zero phase shift voltage has a temperature coefficient of about -2 mv/ c. 5 / phase shift percentage (0% = 0 , 100% = 180 ) is defined as: = (200/t) % . is the phase shift, and and t are defined in figure 3. at 0% phase shift, is the output skew. 6 / not tested at -55 c but guaranteed by bench testing. 7 / delay time can be programmed via resistors from t he delay set pins to ground. delay time = (62.5 x 10 -12 ) seconds/ i delay . i delay = delay set voltage/r delay . the recommended range for i delay is 25 a i delay 1 ma. 4. quality assurance provisions 4.1 sampling and inspection . for device classes q and v, sampling and inspection procedures shall be in accordance with mil-prf-38535 or as modified in the device manufacturer's qua lity management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. for device class m, sampling and inspection procedures shall be in accordance with mil-prf-38535, appendix a. 4.2 screening . for device classes q and v, screening shall be in accordance with mil-prf-38535, and shall be conducted on all devices prior to qualification and technology conform ance inspection. for device class m, screening shall be in accordance with method 5004 of mil-std-883, and shall be conduct ed on all devices prior to qua lity conformance inspection. 4.2.1 additional criteria for device class m . a. burn-in test, method 1015 of mil-std-883. (1) test condition b. the test circuit shall be maintai ned by the manufacturer under document revision level control and shall be made available to the preparing or acquiring ac tivity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) t a = +125 c, minimum. b. interim and final electrical test parameter s shall be as specified in table ii herein.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 9 dscc form 2234 apr 97 device type 01 case outlines r x and 3 terminal number terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 v ref e/a out (comp) e/a (-) e/a (+) c/s (+) soft-start delay set c/d output d (out d) output c (out c) v c v in power gnd output b (out b) output a (out a) delay set a/b freq set clock/sync slope ramp gnd --- --- --- --- --- --- --- --- v in pwr gnd output b (out b) output a (out a) nc nc delay set a/b freq set clock/sync slope ramp nc nc gnd nc v ref e/a out nc nc e/a (-) e/a (+) c/s (+) softstart delay set c/d nc output d (out d) output c (out c) v c nc = no connection figure 1. terminal connections .
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 10 dscc form 2234 apr 97 figure 2. logic diagram .
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 11 dscc form 2234 apr 97 phase shift, output skew and delay time definitions. duty cycle = t/t. period = t. t dhl (a to c) = t dhl (b to d) = figure 3. timing diagram .
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 12 dscc form 2234 apr 97 table ii. electrical test requirements . test requirements subgroups (in accordance with mil-std-883, method 5005, table i) subgroups (in accordance with mil-prf-38535, table iii) device class m device class q device class v interim electrical parameters (see 4.2) ---- ---- ---- final electrical parameters (see 4.2) 1,2,3,4,5, 1 / 6,9,10,11 1,2,3,4,5, 1 / 6,9,10,11 1,2,3,4,5, 1 / 6,9,10,11 group a test requirements (see 4.4) 1,2,3,4,5,6, 9,10,11 1,2,3,4,5,6, 9,10,11 1,2,3,4,5,6, 9,10,11 group c end-point electrical parameters (see 4.4) 1, 4 1, 4 1, 4 group d end-point electrical parameters (see 4.4) 1, 4 1, 4 1, 4 group e end-point electrical parameters (see 4.4) ---- ---- ---- 1 / pda applies to subgroup 1. 4.2.2 additional criteria for device classes q and v . a. the burn-in test duration, test condi tion and test temperature, or approved alte rnatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf- 38535. the burn-in test circuit shall be maintained under document revision level control of the device manufacturer' s technology review board (trb) in accordance with mil-prf-38535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of mil-std-883. b. interim and final electrical test parameter s shall be as specified in table ii herein. c. additional screening for device class v beyond the require ments of device class q shall be as specified in mil-prf-38535, appendix b. 4.3 qualification inspection for device classes q and v . qualification inspection for device classes q and v shall be in accordance with mil-prf-38535. inspections to be perform ed shall be those specified in mil-prf-38535 and herein for groups a, b, c, d, and e inspec tions (see 4.4.1 through 4.4.4). 4.4 conformance inspection . technology conformance inspection for cl asses q and v shall be in accordance with mil-prf-38535 including groups a, b, c, d, and e inspections and as specified herein. qualit y conformance inspection for device class m shall be in accordance with mil-prf-38535, appendi x a and as specified herein. inspections to be performed for device class m shall be those specified in method 5005 of mi l-std-883 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4). 4.4.1 group a inspection . a. tests shall be as specified in table ii herein. b. subgroups 7 and 8 in table i, method 5005 of mil-std-883 shall be omitted. 4.4.2 group c inspection . the group c inspection end-point electrical param eters shall be as specified in table ii herein.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 13 dscc form 2234 apr 97 4.4.2.1 additional criteria for device class m . steady-state life test conditions, method 1005 of mil-std-883: a. test condition b. the test circuit shall be maintai ned by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in acco rdance with the intent specified in test method 1005 of mil-std-883. b. t a = +125 c, minimum. c. test duration: 1,000 hours, except as permitted by method 1005 of mil-std-883. 4.4.2.2 additional criteria for device classes q and v . the steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf-38535. the test circuit shall be maintained under document revision level c ontrol by the device manufacturer's trb in accordance with mil-prf-38535 and shall be made available to the acquiring or prepar ing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil-std-883. 4.4.3 group d inspection . the group d inspection end-point electrical param eters shall be as specified in table ii herein. 4.4.4 group e inspection . group e inspection is required only for par ts intended to be marked as radiation hardness assured (see 3.5 herein). a. end-point electrical parameters shall be as specified in table ii herein. b. for device classes q and v, the devices or test vehicl e shall be subjected to radiation hardness assured tests as specified in mil-prf-38535 for the rha level being tested. for device class m, the devices shall be subjected to radiation hardness assured tests as specified in mil- prf-38535, appendix a for the rha level being tested. all device classes must meet the postirradiation end-point el ectrical parameter limits as defined in table i at t a = +25 c 5 c, after exposure, to the subgroups specified in table ii herein. c. when specified in the purchase or der or contract, a copy of the rha delta limits shall be supplied. 5. packaging 5.1 packaging requirements . the requirements for packaging shall be in accordance with mil-prf-38535 for device classes q and v or mil-prf-38535, appendix a for device class m. 6. notes 6.1 intended use . microcircuits conforming to this drawing are intended for use for gove rnment microcircuit applications (original equipment), design applic ations, and logistics purposes. 6.1.1 replaceability . microcircuits covered by this drawing will repl ace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 substitutability . device class q devices will replace device class m devices. 6.2 configuration control of smd's . all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this coordination will be accomplished using dd form 1692, engineering change proposal. 6.3 record of users . military and industrial users should inform de fense supply center columbus when a system application requires configuration control and which smd's are applic able to that system. dscc will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. users of drawings covering microelectronic devices (fsc 5962) shoul d contact dscc-va, telephone (614) 692-0544. 6.4 comments . comments on this drawing should be directed to dscc-va , columbus, ohio 43216-5000, or telephone (614) 692-0547.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 14 dscc form 2234 apr 97 6.5 abbreviations, symbols, and definitions . gnd signal ground. all voltages are measured with res pect to ground (gnd). the timing capacitor, on the freq set pin, and bypass capacitor on the v ref pin, bypass capacitors on v in and the ramp capacitor, on the ramp pin, should be connected directly to the ground plane near the signal ground pin. pwr gnd power ground. v c should be bypassed with a ceramic capacitor from the v c pin to the section of the gr ound plane that is connected to pwr gnd. any required bulk reservoir capacitor should parallel this one. power ground and signal ground may be joined at a signal point to optimize noise rejection and minimize dc drops. v c output switch supply volt age. this pin supplies power to the drivers and their associated bias circuitry. connect v c to a stable source above 3 v for normal operation, above 12 v for best performance. this supply should be bypassed directly to the pwr gnd pin with low esr, low esl capacitors. v in primary chip supply volt age. this pin supplies power to the logic and analog circuitry on the integrated circui try that is not directly associat ed with driving the output stages. freq set oscillator frequency set pin. a re sistor and a capacitor from freq set to gnd will set oscillator frequency according to the following relationship: f = 4/(r fset x c ramp ). clk/sync bi-directional clock and synchroniza tion pin. used as an output, this pin provides a clock signal. as an input, this pin provides a synchronization point. slope set ramp slope.slope compensation. a resistor from this pin to v cc will set the current used to generate the ramp. connecting this resistor to the dc input line will provide voltage feed forward. ramp voltage ramp. this pin is t he input to the pulse width modulator comparator. connect a capacitor from here to gnd. a voltage ramp is developed at this pin with a slope: (dv/dt) = (sense voltage/r slope x c ramp ). e/a out (comp) error amplifier output. this is the gain stage for overall feedback control. error amplifier output voltage levels below 1 volt will force 0 phase shift. since the error amplifier has a relatively low current drive capability, the output may be overridden by driving with a sufficiently low impedance source. e/a(+) this pin is normally connected to a reference voltage us ed for comparison with the sensed power supply output voltage level at the e/a(-) pin. e/a(-) this pin is normally c onnected to the voltage divider resist ors which sense the power supply output level. soft start soft start will remain at gnd as long as v in is below the uvlo threshold. soft start will be pulled up to about 4.8 v by an internal 9 a current source when v in becomes valid (assuming a non-fault condition). in the event of a current-fault (c/s (+) voltage exceeding 2.5 v), soft start will be pulled to gnd and then ramp to 4.8 v. if a fault occurs during the soft start cycle, the outputs will be immediately disabled and soft start must charge fully prior to resetting the fault latc h. for paralleled controllers, the soft start pins may be paralleled to a single capacitor, but the change currents will be additive. current sense (+) the positive input to the current-faul t comparator whose reference is set internally to fixed 2.5 v (separate from v ref ). when the voltage at this pin exceeds 2.5 v, the current-fault latch is set, the output s are forced off and a soft start cycle is initiated. if a constant voltage above 2.5 v is applied to this pin the outputs are disabled from switching and held in a low state until the c/s (+) pin is brought below 2.5 v. the outputs may begin switching at 0 degrees phase sh ift before the soft start pin begins to rise, this condition will not prematurely deliver power to the load.
standard microcircuit drawing size a 5962-94555 defense supply center columbus columbus, ohio 43216-5000 revision level j sheet 15 dscc form 2234 apr 97 outputs a, b, the outputs are 2 a tote m-pole drivers optimized for both mosfet gates and level shifting c, d transformers. the out puts operate as pair with a nominal 50% duty cycle. the a-b pair is intended to drive one half bridge in the external power stage and is synchronized with the clock waveform. the c-d pair will drive the other half-bridge with switching phase shifted with respect to the a-b outputs. delay set a-b, output delay control. the users programmed current flowing fr om these pins to gnd set the delay set c-d turn-on delay for the co rresponding output pair. this del ay is introduced between turn-off of one switch and turn -on of another in the same leg of the bridge to provide a dead time in which the resonant sw itching of the external power swit ches takes place. separate delays are provided for the two half bridges to accommodate diffe rences in the resonant capacitor charging currents. v ref this pin is an accurate 5 v voltage reference. this output is capable of delivering about 60 ma to per ipheral circuitry and is internally short circuit current limited. 6.6 sources of supply . 6.6.1 sources of supply for device classes q and v . sources of supply for device classes q and v are listed in qml-38535. the vendors listed in qml-38535 have submitted a certificate of compliance (see 3.6 herein) to dscc-va and have agreed to this drawing. 6.6.2 approved sources of supply for device class m . approved sources of supply for cl ass m are listed in mil-hdbk-103. the vendors listed in mil-hdbk-103 have agreed to this drawi ng and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by dscc-va.
standard microcircuit drawing bulletin date: 02-04-03 approved sources of supply for smd 5962-94555 are listed below for immediate acquisition information only and shall be added to mil-hdbk-103 and qml-38535 during the next revision. mil-hdbk-103 and qml-38535 will be revised to include the addition or deletion of sources. the vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accept ed by dscc-va. this bulletin is superseded by the next dated revision of mil-hdbk-103 and qml-38535. standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962-9455501mra 01295 uc1875j/883bc 5962-9455501mxa 3 / uc1875lp/883bc 5962-9455501m3a 01295 uc1875l/883bc 5962-9455501V3A 01295 uc1875lqmlv 5962-9455501vra 01295 uc1875jqmlv 1 / the lead finish shown for each pin representing a hermetic package is the most readily available from the manufacturer listed for that part. if the desired lead finish is not listed contact the vendor to determine its availability. 2 / caution . do not use this number for item acquisition. items acquired to this number may not satisfy the performance requirements of this drawing. 3 / not available from an approved source of supply. vendor cage vendor name number and address 01295 texas instruments, incorporated 13500 north central express way p.o. box 655303 dallas, tx 75265 point of contact: 6412 highway 75 south sherman, tx 75090-0084 the information contained herein is disseminated for convenience only and the government assumes no liability whatsoever for any inaccuracies in the information bulletin.

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