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rev.2.00 dec. 10, 2004 page 1 of 8 RD74LVC125B quad. bus buffer gates with 3-state outputs rej03d0498?0200 rev.2.00 dec. 10, 2004 description the RD74LVC125B has four bus buffer gates in a 14 pin p ackage. the device requires the three state control input oe to be taken high to put the output into the high impedance condition. low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. features ? v cc = 1.65 v to 5.5 v ? all inputs v ih (max.) = 5.5 v (@v cc = 0 v to 5.5 v) ? all outputs v out (max.) = 5.5 v (@v cc = 0 v or output off state) ? typical v ol ground bounce < 0.8 v (@v cc = 3.3 v, ta = 25c) ? typical v oh undershoot > 2.0 v (@v cc = 3.3 v, ta = 25c) ? high output current 4 ma (@v cc = 1.65 v) 8 ma (@v cc = 2.3 v) 12 ma (@v cc = 2.7 v) 24 ma (@v cc = 3.0 v to 5.5 v) ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) RD74LVC125Bfpel sop?14 pin (jeita) fp?14dav fp el (2,000 pcs/reel) RD74LVC125Btell tssop?14 pin ttp?14dv t ell (2,000 pcs/reel) function table inputs oe a outputs y h x z l l l l h h h: high level l: low level x: immaterial z: high impedance
RD74LVC125B rev.2.00 dec. 10, 2004 page 2 of 8 pin arrangement (top view) 11 12 13 14 v cc 4 o e 4a 4y 3 oe 3a 1 2 3 4 5 6 7 8 9 10 1 oe gnd 3y 1a 1y 2 oe 2a 2y absolute maximum ratings item symbol ratings unit conditions supply voltage v cc ?0.5 to 7.0 v input diode current i ik ?50 ma v i = ?0.5 v input voltage v i ?0.5 to 7.0 v ?50 v o = ?0.5 v output diode current i ok 50 ma v o = v cc +0.5 v ?0.5 to v cc +0.5 output "h" or "l" output voltage v o ?0.5 to 7.0 v output "z" or v cc : off output current i o 50 ma v cc , gnd current / pin i cc or i gnd 100 ma storage temperature tstg ?65 to +150 c note: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. RD74LVC125B rev.2.00 dec. 10, 2004 page 3 of 8 recommended operating conditions item symbol ratings unit conditions 1.5 to 5.5 data hold supply voltage v cc 1.65 to 5.5 v at operation v i 0 to 5.5 v 0 to v cc output "h" or "l" input / output voltage v o 0 to 5.5 v output "z" or v cc : off operating temperature ta ?40 to 85 c ?4 v cc = 1.65 v ?8 v cc = 2.3 v ?12 v cc = 2.7 v i oh ?24 ma v cc = 3.0 v to 5.5 v 4 v cc = 1.65 v 8 v cc = 2.3 v 12 v cc = 2.7 v output current i ol 24 ma v cc = 3.0 v to 5.5 v 20 v cc = 1.65 v to 2.7 v input rise / fall time *1 t r , t f 10 ns/v v cc = 3.0 v to 5.5 v note: 1. this item guarantees maxi mum limit when one input switches. waveform: refer to te st circuit of switching characteristics. RD74LVC125B rev.2.00 dec. 10, 2004 page 4 of 8 electrical characteristics ta = ?40 to 85c item symbol v cc (v) min max unit test conditions 1.65 to 1.95 v cc 0.65 ? 2.3 to 2.7 1.7 ? 2.7 to 3.6 2.0 ? v ih 4.5 to 5.5 v cc 0.7 ? v 1.65 to 1.95 ? v cc 0.35 2.3 to 2.7 ? 0.7 2.7 to 3.6 ? 0.8 input voltage v il 4.5 to 5.5 ? v cc 0.3 v 1.65 to 5.5 v cc ?0.2 ? i oh = ?100 a 1.65 1.2 ? i oh = ?4 ma 2.3 1.7 ? i oh = ?8 ma 2.7 2.2 ? 3.0 2.4 ? i oh = ?12 ma 3.0 2.2 ? v oh 4.5 3.8 ? v i oh = ?24 ma 1.65 to 5.5 ? 0.2 i ol = 100 a 1.65 ? 0.45 i ol = 4 ma 2.3 ? 0.7 i ol = 8 ma 2.7 ? 0.4 i ol = 12 ma 3.0 ? 0.55 output voltage v ol 4.5 ? 0.55 v i ol = 24 ma input current i in 0 to 5.5 ? 5.0 a v in = 5.5 v or gnd output leak current i off 0 ? 5.0 a v in / v out = 5.5 v off state output current i oz 2.7 to 5.5 ? 5.0 a v in = v cc or gnd, v out = 5.5 v or gnd 2.7 to 3.6 ? 5.0 v in = 3.6 v to 5.5 v i cc 2.7 to 5.5 ? 5.0 a v in = v cc or gnd quiescent supply current ? i cc 2.7 to 3.6 ? 500 a v in = one input at (v cc ?0.6) v, other inputs at v cc or gnd RD74LVC125B rev.2.00 dec. 10, 2004 page 5 of 8 switching characteristics ta = ?40 to 85c item symbol v cc (v) min typ max unit from (input) to (output) 1.80.15 1.0 ? 12.3 2.50.2 1.0 ? 6.3 2.7 1.0 ? 5.5 3.30.3 1.0 ? 4.8 propagation delay time t plh t phl 5.00.5 1.0 ? 3.8 ns a y 1.80.15 1.0 ? 14.3 2.50.2 1.0 ? 7.4 2.7 1.0 ? 6.6 3.30.3 1.0 ? 5.4 output enable time t zh t zl 5.00.5 1.0 ? 4.4 ns oe y 1.80.15 1.0 ? 11.1 2.50.2 1.0 ? 5.6 2.7 1.0 ? 5.0 3.30.3 1.0 ? 4.6 output disable time t hz t lz 5.00.5 1.0 ? 3.6 ns oe y 1.80.15 ? ? ? 2.50.2 ? ? ? 2.7 ? ? ? 3.30.3 ? ? 1.0 between output pins skew *1 t oslh t oshl 5.00.5 ? ? 1.0 ns input capacitance c in 3.3 ? 4.0 ? pf output capacitance c o 3.3 ? 7.0 ? pf note: 1. this parameter is characterized but not tested. tos lh = | t plhm - t plhn |, tos hl = | t phlm - t phln | operating characteristics ta = 25c item symbol v cc (v) min typ max unit test conditions 1.8 ? 21 ? 2.5 ? 22 ? 3.3 ? 23 ? power dissipation capacitance c pd 5.0 ? 27 ? pf f = 10 mhz RD74LVC125B rev.2.00 dec. 10, 2004 page 6 of 8 test circuit pulse generator z = 50 out ? output c l r l r l open gnd v tt s1 v cc input see function table v cc symbol s1 t / t plh phl open gnd v tt t / t zh hz t / t zl lz note: 1. c l includes probe and jig capacitance. RD74LVC125B rev.2.00 dec. 10, 2004 page 7 of 8 waveforms ? 1 t plh t phl v oh v ol input a 10 % gnd 90 % t r t f 90 % 10 % output y v ih v ref v ref v ref v ref note: 1. input waveform : prr = 10 mhz, duty cycle 50% waveforms ? 2 v ? ? v oh v + ? v ol t zl t lz t zh t hz t f t r 90 % 10 % 90 % 10 % v oh v ol gnd input oe waveform - a waveform - b v ref v ref v ref v ref v ih gnd 1/2 v tt 1.5 v 1.5 v v ref c l r l 1/2 v cc 30 pf 1.0 k ? 500 ? 500 ? 500 ? 500 ? ? v 0.3 v 0.3 v 0.3 v 0.15 v 0.15 v 30 pf 50 pf 50 pf 50 pf 1/2 v cc 1/2 v cc 6 v 6 v v tt 2 v cc 2 v cc 2 v cc 2.7 v 2.7 v inputs v cc v cc v cc v i t r /t f v cc = 1.80.15 v v cc = 2.50.2 v v cc = 3.30.3 v v cc = 5.00.5 v v cc = 2.7 v v cc (v) 2 ns 2 ns 2.5 ns 2.5 ns 2.5 ns notes: 1. input waveform : prr = 10 mhz, duty cycle 50% 2. waveform ? a shows input conditions such t hat the output is "l" level when enable by the output control. 3. waveform ? b shows input conditions such t hat the output is "h" level when enable by the output control. RD74LVC125B rev.2.00 dec. 10, 2004 page 8 of 8 package dimensions package code jedec jeita mass (reference value) fp-14dav ? conforms 0.23 g *ni/pd/au plating *0.20 0.05 *0.40 0.06 0.70 0.20 0.12 0.15 0 ? ? 8 ? m 0.10 0.10 2.20 max 5.5 10.06 1.42 max 14 8 1 7 10.5 max + 0.20 ? 0.30 7.80 1.15 1.27 as of january, 2003 unit: mm package code jedec jeita mass (reference value) ttp-14dv ? ? 0.05 g *ni/pd/au plating 0.50 0.10 0? ? 8? *0.15 0.05 6.40 0.20 0.10 1.10 max 0.13 m 0.65 17 14 8 4.40 5.00 5.30 max 0.83 max *0.20 0.05 0.07 +0.03 ?0.04 1.0 as of january, 2003 unit: mm keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is al ways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating i n the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents in formation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or e rrors. please also pay attention to information published by renesas technology corp. by various means, including the renesas technolo gy corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, an d algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under cir cumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materia ls. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lice nse from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is pro hibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com refer to " http://www.renesas.com/en/network " for the latest and detailed information. renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500, fax: <1> (408) 382-7501 renesas technology europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k. tel: <44> (1628) 585-100, fax: <44> (1628) 585-900 renesas technology hong kong ltd. 7th floor, north tower, world finance centre, harbour city, 1 canton road, tsimshatsui, kowloon, hong kong tel: <852> 2265-6688, fax: <852> 2730-6071 renesas technology taiwan co., ltd. 10th floor, no.99, fushing north road, taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. unit2607 ruijing building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1 harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices ? 200 4. re nesas technology corp ., all rights reser v ed. printed in ja pan. colophon .2.0 |
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