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ds04-27239-1e fujitsu semiconductor data sheet assp for power supply applications (general-purpose dc/dc converter) 3-ch dc/dc converter ic MB39A112 n description the MB39A112 is a 3-channel dc/dc converter ic using pulse width modulation (pwm) , and the MB39A112 is suitable for down-conversion. 3-channel is built in tssop-20p package. each channel can be controlled and soft-start. the MB39A112 contains a constant voltage bias circuit for output block, capable of implementing an efficient high-frequency dc/dc converter. it is ideal for built-in power supply such as adsl modems. n reatures ? supports for down-conversion (ch1 to ch3) ? power supply voltage range : 7 v to 25 v ? error amplifier threshold voltage : 1.00 v 1 % (ch1) : 1.23 v 1 % (ch2, ch3) ? oscillation frequency range : 250 khz to 2.6 mhz ? built-in soft-start circuit independent of loads ? built-in timer-latch short-circuit protection circuit ? built-in totem-pole type output for p-channel mos fet devices ? built-in constant voltage (vcco - 5 v) bias circuit for output block n pac k ag e 20-pin plastic tssop (fpt-20p-m06)
MB39A112 2 n pin assignment (top view) (fpt-20p-m06) cs1 : 1 - ine1 : 2 fb1 : 3 vcc : 4 rt : 5 ct : 6 gnd : 7 fb2 : 8 - ine2 : 9 cs2 : 10 20 : vcco 19 : out1 18 : out2 17 : out3 16 : vh 15 : gndo 14 : cscp 13 : fb3 12 : - ine3 11 : cs3 MB39A112 3 n pin description pin no. symbol i/o descriptions 1cs1 ? ch1 soft-start setting capacitor connection terminal. 2 - ine1 i ch1 error amplifer inverted input terminal. 3 fb1 o ch1 error amplifer output terminal. 4vcc ? control circuit power supply terminal. 5rt ? triangular-wave oscillation frequency setting resistor connection terminal. 6ct ? triangular-wave oscillation frequency setting capacitor connection terminal. 7gnd ? ground terminal. 8 fb2 o ch2 error amplifier output terminal. 9 - ine2 i ch2 error amplifier inverted input terminal. 10 cs2 ? ch2 soft-start setting capacitor connection terminal. 11 cs3 ? ch3 soft-start setting capacitor connection terminal. 12 - ine3 i ch3 error amplifier inverted input terminal. 13 fb3 o ch3 error amplifier output terminal. 14 cscp ? timer-latch short-circuit protection capacitor connection terminal. 15 gndo ? ground terminal. 16 vh o power supply terminal for driving output circuit. (vh = vcco - 5 v) . 17 out3 o ch3 external pch mos fet gate driving terminal. 18 out2 o ch2 external pch mos fet gate driving terminal. 19 out1 o ch1 external pch mos fet gate driving terminal. 20 vcco ? power supply terminal for driving output circuit. (connect to same potential as vcc terminal). MB39A112 4 n block diagram - + + + - 2 1 3 19 - + + + - 9 10 8 18 - + + - + + + + - 12 11 13 14 5 6 7 17 16 15 4 20 - ine1 cs1 fb1 - ine2 cs2 fb2 - ine3 cs3 fb3 cscp rt ct gnd out1 out2 out3 vh gndo vcc vcco vref error amp1 1.0 v 10 m a vref error amp2 1.23 v 10 m a vref scp osc uvlo vref vr power on/off ctl bias voltage vh i o = 150 ma pch drive3 vcco - 5 v gnd bias 3.5 v error amp3 pwm comp.3 scp comp. 1.23 v 2.7 v 2.5 v 2.0 v 10 m a ch3 i o = 150 ma pch drive2 pwm comp.2 ch2 i o = 150 ma pch drive1 pwm comp.1 ch1 threshold voltage 1.0 v 1 % threshold voltage 1.23 v 1 % threshold voltage 1.23 v 1 % l priority l priority h priority h: at scp h: uvlo release error amp power supply scp comp. power supply erroramp reference 1.0 v/1.23 v l priority MB39A112 5 n absolute maximum ratings * : the package is mounted on the dual-sided epoxy board (10 cm 10 cm) . warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. n recommended operating conditions warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol conditions rating unit min max power supply voltage vcc vcc, vcco terminal ? 28 v output current io out1, out2, out3 terminal ? 20 ma peak output current i op duty 5 % (t = 1/fosc duty) ? 400 ma power dissipation p d ta + 25 c ? 1280* mw storage temperature t stg ?- 55 + 125 c parameter symbol conditions value unit min typ max power supply voltage vcc vcc, vcco terminal 7 12 25 v input voltage v in - ine terminal 0 - ? vcc - 1.8 v output current i o out1, out2, out3 terminal - 15 ? 15 ma i vh vh terminal 0 ? 30 ma oscillation frequency fosc ? 250 1200 2600 khz timing capacitor c t ? 22 100 1000 pf timing resistor r t ? 4.7 10 22 k w vh terminal capacitor c vh vh terminal ? 0.1 1.0 m f soft-start capacitor c s cs1, cs2, cs3 terminal ? 0.1 1.0 m f short-circuit detection capacitor c scp cscp terminal ? 0.01 1.0 m f operating ambient temperature ta ?- 30 + 25 + 85 c MB39A112 6 n electrical characteristics (vcc = vcco = 12 v, ta = + 25 c) * : standard design value (continued) parameter sym- bol pin no. conditions value unit min typ max undervoltage lockout protection circuit block [uvlo] threshold voltage v th 4vcc = 6.35 6.55 6.75 v hysteresis width v hys 4 ?? 0.15 ? v short-circuit protection circuit block [scp] threshold voltage v th 14 ? 0.67 0.72 0.77 v input source current i cscp 14 ?- 1.4 - 1.0 - 0.6 m a reset voltage v rst 4vcc = 6.2 6.4 6.6 v triangular wave oscillator block [osc] oscillation frequency fosc 17 to 19 ct = 100 pf, rt = 10 k w 1080 1200 1320 khz soft-start block [cs1, cs2, cs3] charge current i cs 1, 10, 11 ?- 14 - 10 - 6 m a error amp block (ch1) [error amp1] threshold voltage v th 2fb1 = 2.25 v 0.99 1.00 1.01 v input bias current i b 2 - ine1 = 0 v - 250 - 63 ? na voltage gain a v 3 dc 60 100 ? db frequency band width b w 3a v = 0db ? 1.5* ? mhz output voltage v oh 3 ? 3.2 3.4 ? v v ol 3 ?? 40 200 mv output source current i source 3fb1 = 2.25 v ?- 2 - 1ma output sink current i sink 3fb1 = 2.25 v 150 250 ?m a error amp block (ch2, ch3) [error amp2, error amp3] threshold voltage v th 9, 12 fb2 = fb3 = 2.25 v 1.218 1.230 1.242 v input bias current i b 9, 12 - ine2 = - ine3 = 0 v - 250 - 63 ? na voltage gain a v 8, 13 dc 60 100 ? db frequency band width b w 8, 13 a v = 0 db ? 1.5* ? mhz output voltage v oh 8, 13 ? 3.2 3.4 ? v v ol 8, 13 ?? 40 200 mv output source current i source 8, 13 fb2 = fb3 = 2.25 v ?- 2 - 1ma output sink current i sink 8, 13 fb2 = fb3 = 2.25 v 150 250 ?m a MB39A112 7 (continued) (vcc = vcco = 12 v, ta = + 25 c) * : standard design value parameter sym- bol pin no. conditions value unit min typ max pwm comparator block [pwm comp.] threshold voltage v t0 17 to 19 duty cycle = 0 % 1.9 2.0 ? v v t100 17 to 19 duty cycle = 100 %? 2.5 2.6 v bias voltage block [vh] output voltage v h 16 ? v cco - 5.5 v cco - 5.0 v cco - 4.5 v output block [drive] output source current i sourc e 17 to 19 duty 5 % out1 = out2 = out3 = 7 v ?- 150* ? ma output sink current i sink 17 to 19 duty 5 % out1 = out2 = out3 = 12 v ? 150* ? ma output on resistor r oh 17 to 19 out1 = out2 = out3 = - 15 ma ? 13 19.5 w r ol 17 to 19 out1 = out2 = out3 = 15 ma ? 10 15 w general power supply current i cc 4 ?? 69ma MB39A112 8 n typical charcteristics (continued) 10 8 6 4 2 0 0 5 10 15 20 25 ta = + 25 c rt = open rt = 22 k w rt = 10 k w rt = 4.7 k w ta = +25 c vcc = 12 v 10000 1000 100 10 10 100 1000 10000 ct = 1000 pf ct = 390 pf ct = 100 pf ct = 22 pf ta = +25 c vcc = 12 v 10000 1000 100 10 1 10 100 1000 power supply current i cc (ma) power supply voltage v cc (v) power supply current vs. power supply voltage 2.0 1.5 1.0 0.5 0.0 - 0.5 - 1.0 - 1.5 - 2.0 - 40 - 20 0 20 40 60 80 100 vcc = 12 v fb1 = 0 ma threshold voltage d v th (%) ambient temperature ta ( c) error amp (err1) threshold voltage vs. ambient temperature 2.0 1.5 1.0 0.5 0.0 - 0.5 - 1.0 - 1.5 - 2.0 - 40 - 20 0 20 40 60 80 100 vcc = 12 v fb2(3) = 0 ma threshold voltage d v th (%) ambient temperature ta ( c) error amp (err2, err3) threshold voltage vs. ambient temperature triangular wave oscillation frequency fosc (khz) timing resistor r t (k w ) triangular wave oscillation frequency vs. timing resistor triangular wave oscillation frequency fosc (khz) timing capacitor c t (pf) triangular wave oscillation frequency vs. timing capacitor MB39A112 9 (continued) ta = +25 c vcc = 12 v ct = 100 pf 2.8 2.6 2.4 2.2 2.0 1.8 0 500 1000 1500 2000 2500 3000 triangular wave upper/lower limit voltage v ct (v) triangular wave oscillation frequency fosc (khz) triangular wave upper/lower limit voltage vs. triangular wave oscillation frequency upper limit lower limit vcc = 12 v rt = 10 k w ct = 100 pf 2.8 2.6 2.4 2.2 2.0 1.8 - 40 - 20 0 20 40 60 80 100 triangular wave upper/lower limit voltage v ct (v) ambient temperature ta ( c) triangular wave upper/lower limit voltage vs. ambient temperature ta = +25 c rt = 10 k w ct = 100 pf 1400 1350 1300 1250 1200 1150 1100 1050 1000 0 5 10 15 20 25 30 triangular wave oscillation frequency fosc (khz) ambient temperature ta ( c) triangular wave oscillation frequency vs. ambient temperature vcc = 12 v rt = 10 k w ct = 100 pf 1400 1350 1300 1250 1200 1150 1100 1050 1000 - 40 - 20 0 20 40 60 80 100 triangular wave oscillation frequency fosc (khz) power supply voltage v cc (v) triangular wave oscillation frequency vs. power supply voltage upper limit lower limit MB39A112 10 (conti n u ed ) 40 30 20 10 0 - 10 - 20 - 30 -4 0 180 90 0 - 90 - 180 out in 1.0 v 240 k w 2.4 k w 10 k w 10 k w 1 m f error amp1 100 1 k 10 k 100 k 1 m 10 m - + + + ta = + 25 c vcc = 12 v a v j 3.5 v 3 2 1 gain a v (db) frequency f (hz) error amp (ch1) gain, phase vs. frequency phase j (deg) 40 30 20 10 0 - 10 - 20 - 30 - 40 180 90 0 - 90 - 180 out in 1.23 v 240 k w 2.4 k (12) (13) (11) 10 k w 10 k w 1 m f error amp2 (error amp3) 100 1 k 10 k 100 k 1 m 10 m - + + + ta = + 25 c vcc = 12 v a v j 3.5 v 8 10 9 gain a v (db) frequency f (hz) error amp (ch2, ch3) gain, phase vs. frequency phase j (deg) 1400 1300 1280 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 - 40 - 20 20 40 60 80 1000 maximum power dissipation p d (mw) ambient temperature ta ( c) maximum power dissipation vs. ambient temperature MB39A112 11 n function 1. dc/dc converter function (1) triangular wave oscillator block (osc) the triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the ct terminl (pin 6) and rt terminl (pin 5) to generate triangular oscillation waveform amplitude of 2.0 v to 2.5 v. the triangular waveforms are input to the pwm comparator in the ic. (2) error amplifier block (error amp1, error amp2, error amp3) the error amplifier detects the dc/dc converter output voltage and outputs pwm control signals. in addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the cs1 terminl (pin 1) , cs2 terminl (pin10) and cs3 terminl (pin 11) which are the non-inverted input terminal for error amp. the use of error amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load on the dc/dc converter. (3) pwm comparator block (pwm comp.) the pwm comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/ output voltage. the comparator keeps output transistor on while the error amplifier output voltage remain higher than the triangular wave voltage. (4) output block the output blobk is in the totem pole configulation, capable of driving an external p-channel mos fet. (5) bias voltage block (vh) this bias voltage circuit outputs v cc - 5 v (typ) as minimum potential of the output circuit. 2. protective function (1) timer latch short-circuit protection circuit (scp) each channel has a short-circuit detection comparator (scp comp.) which constantly compares the error amp. output level to the reference voltage. while dc/dc converter load conditions are stable on all channels, the short-circuit detection comparator output remains at l, and the cscp terminal is held at l level. if the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator on that channel goes to h level. this causes the external short-circuit protection capacitor c scp connected to the cscp terminal (pin 14) to be charged. when the capacitor c scp is charged to the threshold voltage (vth : = 0.72 v) , the latch is set and the external fet is turned off (dead time is set to 100 % ) . at this point, the latch input is closed and the cscp terminal is held at l level. the latch applied by the timer-latch short-circuit protection circuit can be reset by recycling the power supply (vcc) (see n setting time constant for timer-latch short-circuit protection circuit) . MB39A112 12 (2) undervoltage lockout protection circuit block (uvlo) the transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause the ic to malfunction, resulting in breakdown or degradation of the system. to prevent such malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage, turns off the output transistor, and sets the dead time to 100 % while holding the cscp terminal (pin 14) at the l level. the circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit. (3) protection circuit operating function table this table refers to output condition when each protection circuit is operating. the latch can be reset as follows after the short-circuit protection circuit is actuated. recycling vcc resets the latch whenever the short-circuit protection circuit has been actuated. operating circuit ch1 ch2 ch3 out1 out2 out3 short-circuit protection circuit h h h under-voltage lockout circuit h h h MB39A112 13 n setting the output voltage n setting the triangular oscillation frequency the triangular oscillation frequency is determined by the timing capacitor (c t ) connected to the c t terminal (pin 6) and the timing resistor (r t ) connected to the r t terminal (pin 5) . triangular oscillation frequency : fosc fosc (khz) : = 1200000 c t (pf) r t (k w ) - + + 1 2 v o r1 r2 cs1 error amp 1.00 v v o (v) = (r1 + r2) 1.00 r2 - ine1 ch1 - + + 10 9 v o r1 r2 cs2 error amp 1.23 v v o (v) = (r1 + r2) 1.23 r2 - ine2 11 12 (cs3) ( - ine3) ch2, ch3 MB39A112 14 n setting the soft-start and discharge times to prevent rush currents when the ic is turned on, you can set a soft-start by connecting soft-start capacitors (c s1 , c s2 and c s3 ) to the cs1 terminal (pin 1) for channel 1, cs2 terminal (pin 10) for channel 2 and cs3 terminal (pin 11) for channel 3 respectively. setting each control terminal (ctlx ) from h to l starts charging the external soft-start capacitors (c s1 , c s2 and c s3 ) connected to the cs1, cs2 and cs3 terminal at about 10 m a. the dc/dc converter output voltage rises in proportion to the cs terminal voltage. also, soft-start time is obtained by the following formulas. soft-start time : ts (time to output 100 % ) ch1 : ts 1 [s] : = 0.100 c s1 [ m f] ch2 : ts 2 [s] : = 0.123 c s2 [ m f] ch3 : ts 3 [s] : = 0.123 c s3 [ m f] - + + - ine1 ( - ine2) ( - ine3) cs1 (cs2) (cs3) (l : on, h : off) fb1 (fb2) (fb3) error amp 1.23 v /1.0 v v o ctlx vref scp uvlo 10 m a l priority h : at scp h: uvlo release ch1 on/off signal soft-start circuit h t t l cs terminal voltage error amp. reference voltage soft-start time ts ctlx signal : = 1.23 v/ 1.00 v : = 0 v : = 3.4 v soft-start operation MB39A112 15 n treatment without using cs terminal when not using the soft-start function, open the cs1 terminal (pin 1) , cs2 terminal (pin 10) and cs3 terminal (pin 11) . 1 10 11 cs1 cs2 cs3 open open open without setting soft-start tme MB39A112 16 n setting time constant for timer-latch short-circuit protection circuit each channel uses the short-circuit detection comparator (scp comp.) to always compare the error amplifiers output level to the reference voltage. while dc/dc converter load conditions are stable on all channels, the short-circuit detection comparator output remains at l level, and the cscp terminal (pin 14) is held at l level. if the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator goes to h level. this causes the extemal short- circuit protection capacitor c scp connected to the cscp terminal to be charged at 1 m a. when the capacitor c scp is charged to the threshold voltage (v th : = 0.72 v) , the latch is set and the external fet is turned off (dead time is set to 100 % ) . at this time, the latch input is closed and the cscp terminal (pin 14) is held at l level. if any of ch1 to ch3 detects a short circuit, all the channels are stopped. short-circuit detection time : tcscp tcscp[s] : = 0.72 c scp [ m f] - + + - + + + - ine1 ( - ine2) ( - ine3) cs1 (cs2) (cs3) fb1 (fb2) (fb3) cscp latch uvlo vcc sr 14 error amp 1.23 v /1.0 v 2.7 v v o r1 r2 vref 10 m a 1 m a scp comp. [scp] h: at scp h: uvlo release timer-latch short-circuit protection circuit MB39A112 17 n treatment without using cscp terminal when not using the timer-latch short-circuit protection circuit, connect the cscp terminal (pin 14) to gnd with the shortest distance. 14 7 cscp gnd treatment without using cscp terminal MB39A112 18 n i/o equivalent circuit 4 14 vcc cscp 2 k w vref ( 3.5 v ) 7 2 gnd 5 vcc 1.2 v rt vref ( 3.5 v ) gnd - + 6 vcc vref ( 3.5 v ) gnd ct vcc vref ( 3.5 v ) gnd vcc cs1 fb1 1.00 v - ine1 vref ( 3.5 v ) gnd csx 3 vcc csx fbx vcc fbx ct gnd 1.23 v vref ( 3.5 v ) gnd 16 20 vcc vcco vcco gnd gndo outx vh vh 15 gndo < |
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