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skyper tm igbt driver core skyper 32 r preliminary data features

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! 3& ;6! ; 6 ! k i+%h#- 90 3-, (% $ this technical information specifies semiconductor devices but promises no characteristics. no warranty or guarantee expressed or implied is made regarding delivery, performance or suitability. skyper 32 r ... 1 19-01-2007 mhw ? by semikron
skyper? 32 r 2 2007-01-19 ? rev05 ? by semikron technical explanations revision 05 status: preliminary prepared by: markus hermwille this technical explanation is valid for the following parts: related documents: part number: l6100102 title: data sheet skyper 32 r date code (yyww): 0705 version: 2007-01-19 skyper? 32 r content application and handl ing instructions.......................................................................................... ............................................. 3 further application support.................................................................................................... ................................................... 3 general desc ription............................................................................................................ ...................................................... 3 features of skyper? 32 ......................................................................................................... .............................................. 3 block diagram.................................................................................................................. ......................................................... 4 dimensions..................................................................................................................... .......................................................... 4 pin array ? primary side ....................................................................................................... .................................................. 5 pin array ? secondary side..................................................................................................... ................................................ 6 driver performance ............................................................................................................. ..................................................... 7 insulation ..................................................................................................................... ............................................................. 7 isolation test voltage ......................................................................................................... ...................................................... 8 auxiliary power supply......................................................................................................... .................................................... 8 under voltage protection of driver power supply (uvp).......................................................................... ................................. 9 input signals.................................................................................................................. ........................................................... 9 short pulse suppression (sps) .................................................................................................. ............................................. 9 failure management............................................................................................................. .................................................. 10 shut down input (sdi).......................................................................................................... .................................................. 10 dead time generation (interlock top / bot) (dt) ................................................................................ ................................ 11 dynamic short circuit protection by v cesat monitoring / de-saturation monitoring (dscp)..................................................... 11 adjustment of dscp............................................................................................................. .................................................. 12 high voltage diode for dscp .................................................................................................... ............................................ 13 gate resistors ................................................................................................................. ........................................................ 13 external boost capacitors (bc)................................................................................................. ............................................. 14 application example ............................................................................................................ ................................................... 14 mounting notes ................................................................................................................. ..................................................... 15 environmental conditions....................................................................................................... ................................................ 15 marking........................................................................................................................ ........................................................... 16
skyper? 32 r 3 2007-01-19 ? rev05 ? by semikron skyper? 32 application and handling instructions ? please provide for static discharge protection during handling. as long as the hybrid driver is not completely assembled, the input terminals have to be short-circuited. persons working with devices have to wear a grounded bracelet. any synthetic floor coverings must not be statically chargeable. even during transportation the input terminals have to be short-circuited using, for example, conductive rubber. wo rktables have to be grounded. the same safety requirements apply to mosfet- and igbt-modules. ? any parasitic inductances within the dc-link have to be minimised. over-voltages may be absorbed by c- or rcd- snubbers between main terminals for plus and minus of the power module. ? when first operating a newly developed circuit, semikron recommends to apply low collector voltage and load current in the beginning and to increase these values gradually, observing the turn-off behaviour of the free-wheeling diode and the turn-off voltage spikes generated across the igbt. an oscillographic control will be necessary. additionally, the case temperature of the module has to be monitored. when the circuit works correctly under rated operation conditions, short-circuit testing may be done, starting again with low collector voltage. ? it is important to feed any errors back to the control circuit and to switch off the device immediately in failure events. repeated turn-on of the igbt into a short circuit with a high frequency may destroy the device. ? the inputs of the hybrid driver are sensitive to over-voltage. voltages higher than v s +0,3v or below -0,3v may destroy these inputs. therefore, control signal over-voltages exceeding the above values have to be avoided. ? the connecting leads between hybrid driver and the power module should be as short as possible (max. 20cm), the driver leads should be twisted. further application support latest information is available at http://www.semikron.com . for design support please read the semikron application manual power modules available at http://www.semikron.com . general description the skyper? 32 core constitutes an interface between igbt modules and the controller. this core is a half bridge driver. basic functions for driving, potential separation and protection ar e integrated in the driver. thus it can be used to build up a driver solution for igbt modules. features of skyper? 32 ? two output channels ? integrated potential free power supply for the secondary side ? short pulse suppression (sps) ? under voltage protection (uvp) ? drive interlock (dead time) top / bottom (dt) ? dynamic short circuit protection (dscp) by v ce monitoring and direct switch off ? shut down input (sdi) ? failure management ? expandable by external boost capacitors (bc) ? dc bus voltage up to 1200v please note: unless otherwise specified, all values in this technical explanation are typical values. typical values are the average values expected in large quantities and are provided for information purposes only. these values can and do vary in different applications. all op erating parameters should be validated by user?s technical experts for each application.
skyper? 32 r 4 2007-01-19 ? rev05 ? by semikron block diagram block diagram dimensions dimensions in mm (bottom view) (top view) 0,2mm unless otherwise noted 10,3 10,3
skyper? 32 r 5 2007-01-19 ? rev05 ? by semikron pin array ? primary side connectors connector x10 (rm2,54, 10pin) 0,25mm unless otherwise noted pin signal function specification x10:01 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:02 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:03 prim_nerror_out error output low = no error; open collector output; max. 30v / 15ma (external pull up resistor necessary) x10:04 prim_nerror_in error input 5v logic; low active x10:05 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:06 prim_pwr_gnd gnd for power supply and gnd for digital signals x10:07 prim_top_in switching signal input (top switch) digital 15 v; 10 kohm impedance; low = top switch off; high = top switch on x10:08 prim_bot_in switching signal input (bottom switch) digital 15 v; 10 kohm impedance; low = bot switch off; high = bot switch on x10:09 prim_pwr_15p drive core power supply stabilised +15v 4% x10:10 prim_pwr_15p drive core power supply stabilised +15v 4%
skyper? 32 r 6 2007-01-19 ? rev05 ? by semikron pin array ? secondary side connectors connector x100 / x200 (rm2,54, 10pin) 0,25mm unless otherwise noted pin signal function specification x100:01 sec_top_vce_cfg input reference voltage adjustment x100:02 sec_top_vce_in input v ce monitoring x100:03 sec_top_15p output power supply for external buffer capacitors stabilised +15v x100:04 sec_top_15p output power supply for external buffer capacitors stabilised +15v x100:05 sec_top_gnd gnd for power supply and gnd for digital signals x100:06 sec_top_igbt_on switch on signal top igbt x100:07 sec_top_gnd gnd for power supply and gnd for digital signals x100:08 sec_top_igbt_off switch off signal top igbt x100:09 sec_top_8n output power supply for external buffer capacitors stabilised -7v x100:10 sec_top_8n output power supply for external buffer capacitors stabilised -7v x200:01 sec_bot_vce_cfg input reference voltage adjustment x200:02 sec_bot_vce_in input v ce monitoring x200:03 sec_bot_15p output power supply for external buffer capacitors stabilised +15v x200:04 sec_bot_15p output power supply for external buffer capacitors stabilised +15v x200:05 sec_bot_gnd gnd for power supply and gnd for digital signals x200:06 sec_bot_igbt_on switch on signal bot igbt x200:07 sec_bot_gnd gnd for power supply and gnd for digital signals x200:08 sec_bot_igbt_off switch off signal bot igbt x200:09 sec_bot_8n output power supply for external buffer capacitors stabilised -7v x200:10 sec_bot_8n output power supply for external buffer capacitors stabilised -7v
skyper? 32 r 7 2007-01-19 ? rev05 ? by semikron driver performance the driver is designed for application with half bridges or single modules and a maximum gate charge per pulse < 2,5c (< 6,3c with external boost capacitors). the charge necessary to switch the igbt is mainly depending on the igbt?s chip size, the dc-link voltage and the gate voltage. this correlation is shown in module datasheets. it should, however, be considered that the driver is turned on at +15v and turned off at -7v. therefore, the gate voltage will change by 22v during each switching procedure. unfortunately, many datasheets do not show negative gate voltages. in order to determine the required charge, the upper leg of the char ge curve may be prolonged to +22v for determination of approximate charge per switch. the medium output current of the driver is determined by the switching frequency and the gate charge. the maximum switching frequency may be calculated with the shown equati on and is limited by the average current of the driver power supply and the power dissipation of driver components. calculation switching frequency maximum switching frequency @ different gate charges @ t amb =25c f max : maximum switching frequency * iout avmax : maximum output average current q ge : gate charge of the driven igbt * @ t amb =25c 0 khz 10 khz 20 khz 30 khz 40 khz 50 khz 60 khz 0 c 1 c 2 c 3 c 4 c 5 c 6 c 7 c gate charge switching frequency with external boost ca p acitors calculation average output current average output current as a function of the ambient temperature ge sw av q f iout = iout av : average output current f sw : switching frequency q ge : gate charge of the driven igbt 0 ma 10 ma 20 ma 30 ma 40 ma 50 ma 60 ma 0 c 10 c 20 c 30 c 40 c 50 c 60 c 70 c 80 c 90 c ambient temperature average output current insulation magnetic transformers are used for insulation between gate dr iver primary and secondary side. the transformer set consists of pulse transformers which are used bidirectional for turn-on and turn-off signals of the igbt and the error feedback between secondary and primary side, and a dc/dc converter. th is converter provides a potential separation (galvanic separation) and power supply for the two secondary (top and bo t) sides of the driver. thus, external transformers for external power supply are not required. creepage and clearan ce distance in mm primary to secondary min. 12,2 please note: the maximum value of the switching frequency is limited to 50khz due to switching reasons. ge max av max q iout f =
skyper? 32 r 8 2007-01-19 ? rev05 ? by semikron isolation test voltage the isolation test voltage represents a measure of immunity to transient voltages. the maximum test voltage and time applied once between input and output, and once between output 1 and output 2 are indicated in the absolute maximum ratings. the high-voltage isolation tests and repeated tests of an isolation barrier can degrade isolation capability due to partial discharge. repeated isolation voltage tests should be perfo rmed with reduced voltage. the test voltage must be reduced by 20% for each repeated test. the isolation of the isolation barrier (transformer) is checked in the part. with exception of the isolation barrier, no active parts, which could break through are used. an isolation test is not performed as a series test. therefore, the user can perform once the isolation test with voltage and time indicated in the absolute maximum ratings. auxiliary power supply a few basic rules should be followed when dimensioning the customer side power supply for the driver. the following table shows the required features of an appropriate power supply. requirements of the auxiliary power supply regulated power supply +15v 4% maximum rise time of auxiliary power supply 50ms minimum peak current of auxiliary supply 1a power on reset completed after 150ms the supplying switched mode power supply may not be turned-off fo r a short time as consequence of its current limitation. its output characteristic needs to be considered. switched mode power supplies with fold-back characteristic or hiccup-mode can create problems if no sufficient over current margin is available. the voltage has to rise continuously and without any plateau formation as shown in the following diagram. rising slope of the power supply voltage if the power supply is able to provide a higher current, a peak current will flow in the first instant to charge up the input capacitances on the driver. its peak current value will be limited by the power supply and the effective impedances (e.g. distribution lines), only. it is recommended to avoid the paralleling of several customer side power supply units. their different set current limitations may lead to dips in the supply voltage. the driver is ready for operation typically 150ms after turning on the supply voltage. the driver error signal prim_nerror_out is operational after this time. without any error present, the error signal will be reset. to assure a high level of system safety the top and bot signal inputs should stay in a defined state (off state, low) during driver turn-on time. only after the end of the power-on-reset, igbt switching operation shall be permitted. please note: do not apply switching signals during power on reset. please note: an isolation test is not performed at semikron as a series test.
skyper? 32 r 9 2007-01-19 ? rev05 ? by semikron under voltage protection of driver power supply (uvp) the internally detected supply voltage of the driver has an under voltage protection. the table below gives an overview of the trip level. supply voltage uvp level regulated +15v 4% 13,5v if the internally detected supply voltage of the driver falls bel ow this level, the igbts will be switched off (igbt driving signals set to low). the input side switching signals of the driver will be ignored. the error memory will be set, and the output prim_nerror_out changes to the high state. input signals the signal transfer to each igbt is made with pulse transformers, used for switching on and switching off of the igbt. the inputs have a schmitt trigger characteristic and a positive / active high logic (input high = igbt on; input low = igbt off). it is mandatory to use circuits which switch active to +15v and 0v. pull up and open collector output stages must not be used for top / bot control signals. it is recommended choosing the line drivers according to the demanded length of the signal lines. top / bot input a capacitor is connected to the input to obtain high noise immunity. this capacitor can cause for current limited line drivers a little delay of few ns, which can be neglected. the capacitors have to be placed as close as possible to the driver interface. short pulse suppression (sps) this circuit suppresses short turn-on and off-pulses of incoming signals. this way the igbts are protected against spurious noise as they can occur due to bursts on the signal lines. pulses shorter than 625ns are suppressed and all pulses longer than 750ns get through for 100% probability. pulses with a length in-between 625ns and 750ns can be either suppressed or get through. pulse pattern ? sps please note: it is not permitted to apply switching pulses shorter than 1s.
skyper? 32 r 10 2007-01-19 ? rev05 ? by semikron failure management any error detected will set the error latch and force the output prim_nerror_out into high state. switching pulses from the controller will be ignored. connected and switched off igbts remain turned off. the switched off igbts remain turned off. a reset of the latched error memory is only possible if no failure is present anymore and if the top and bot input signals are set to the low level for a period of t perrreset > 9s. the output prim_nerror_out is an open collector output. for the error evaluation an external pull-up-resistor is necessary pulled-up to the positive operation voltage of the control logic (low signal = no error present, wire break safety is assured). open collector error transistor application hints an external resistor to the controller logic high level is required. the resistor has to be in the range of v / i max < r pull_up < 10k ? . prim_nerror_out can operate to maximum 30v and can switch a maximum of 15ma. example: for v = +15v the needed resistor should be in the range r pull_up = (15v/15ma) ? 10k ? ? 1k ? ? 10k ? . shut down input (sdi) the shut down input / error input signal can gather error si gnals of other hardware components for switching off the igbt (input high = no turn-off; input low = turn-off). a low signal at prim_nerror_in will set the error latch and force the output prim_nerror_out into high state. switching pulses from the controller will be ignored. a reset of the latched error memory is only possible if no low signal at prim_nerror_in is present anymore and if the top and bot input signals are set to the low level for a period of t perrreset > 9s. the sdi function can be disabled by no connection or connecting to 5v. connection sdi please note: the error output prim_error_out is not short circuit proof.
skyper? 32 r 11 2007-01-19 ? rev05 ? by semikron dead time generation (interlock top / bot) (dt) the dt circuit prevents, that top and bot igbt of one half bridge are switched on at the same time (shoot through). the dead time is not added to a dead time given by the controller. thus the total dead time is the maximum of "built in dead time" and "controller dead time". it is possible to control the driver with one switching signal and its inverted signal. pulse pattern ? dt ? the total propagation delay of the driver is the sum of interlock dead time (t td ) and driver input output signal propagation delay (t d(on;off)io ) as shown in the pulse pattern. moreover the switching time of the igbt chip has to be taken into account (not shown in the pulse pattern). ? in case both channel inputs (prim_top_in and prim_bot_in) are at high level, the igbts will be turned off. ? if only one channel is switching, there will be no interlock dead time. dynamic short circuit protection by v cesat monitoring / de-saturation monitoring (dscp) the dscp circuit is responsible for short circuit sensing. it monitors the collector-emitter voltage v ce of the igbt during its on-state. due to the direct measurement of v cesat on the igbt's collector, the dscp circuit switches off the igbts and an error is indicated. the reference voltage v ceref may dynamically be adapted to the igbts switching behaviour. immediately after turn-on of the igbt, a higher value is effective than in steady state. this value will, however, be reset, when the igbt is turned off. v cestat is the steady-state value of v ceref and is adjusted to the required maximum value for each igbt by an external resistor r ce . it may not exceed 10v. the time constant for the delay (exponential shape) of v ceref may be controlled by an external capacitor c ce , which is connected in parallel to r ce . it controls the blanking time t bl which passes after turn-on of the igbt before the v cesat monitoring is activated. this makes an adaptation to any igbt switching behaviour possible. reference voltage (v ceref ) characteristic after t bl has passed, the v ce monitoring will be triggered as soon as v cesat > v ceref and will turn off the igbt. the error memory will be set, and the output prim_nerror_out changes to the high state. possible failure modes are shows in the following pictures. please note: the generated dead time is fixed and cannot be changed. please note: no error message will be generated when overlap of switching signals occurs.
skyper? 32 r 12 2007-01-19 ? rev05 ? by semikron short circuit during operation turn on of igbt too slow * short circuit during turn on * or adjusted blanking time too short adjustment of dscp the external components r ce and c ce are applied for adjusting the steady-state threshold the blanking time. connection r ce and c ce dimensioning of r ce and c ce [] ? ? ? ? ? ? ? ? ? ? ? ? ? ? + ? ? ? ? = ? v 5 , 8 k v r v 1 ln k 17 k r vce cestat ce [] [] pf s 00323 , 0 r s 11 , 0 s 5 , 2 s t pf c ce bl ce ? ? ? ? = v cestat : collector-emitter threshold static monitoring voltage t blx : blanking time v cestat_max = 8v (r vce = 0 ? ) v cestat_max = 7v (r vce = 1k ? ) please note: the equations are calculated considering the use of high voltage diode by203/20s. the calculated values v cestat and t bl are typical values at room temperature. these values can and do vary in the application (e.g. tolerances of used high voltage diode, resistor r ce , capacitor c ce ). the dscp function is not recommended for over current protection. application hints if the dscp function is not used, for example during the experimental phase, sec_top_vce_in must be connected with sec_top_gnd for disabling scp @ top side and sec_bot_vce_in must be connected with sec_bot_gnd for disabling scp @ bot side.
skyper? 32 r 13 2007-01-19 ? rev05 ? by semikron high voltage diode for dscp the high voltage diode blocks the high voltage during igbt off state. the connection of this diode between driver and igbt is shows in the following schematic. connection high voltage diode characteristics ? reverse blocking voltage of the diode shall be higher than the used igbt. ? reverse recovery time of the fast diode shall be lower than v ce rising of the used igbt. ? forward voltage of the diode: 1,5v @ 2ma forward current (t j =25c). a collector series resistance r vce (1k ? / 0,4w) must be connected for 1700v igbt operation. gate resistors the output transistors of the driver are mosfets. the so urces of the mosfets are separately connected to external terminals in order to provide setting of the turn-on and turn-off speed of each igbt by the external resistors r gon and r goff . as an igbt has input capacitance (varying during switching time) which must be charged and discharged, both resistors will dictate what time must be taken to do this. the final value of the resistance is difficult to predict, because it depends on many parameters as dc link voltage, stray inductance of the circuit, switching frequency and type of igbt. connection r gon , r goff application hints the gate resistor influences the switching time, switching losses, dv/dt behaviour, etc. and has to be selected very carefully. due to this influence a general value for the gate resistors cannot be recommended. the gate resistor has to be optimized according to switching behaviour and over voltage peaks within the specific circuitry. by increasing r gon the turn-on speed will decrease. the reverse peak current of the free-wheeling diode will diminish. by increasing r goff the turn-off speed of the igbt will decrease. the inductive peak over voltage during turn-off will diminish. in order to ensure locking of the igbt even when the driver supply voltage is turned off, a resistance (r ge ) has to be integrated. please note: do not connect the terminals sec_top_igbt_on with sec_top_igbt_off and sec_bot_igbt_on with sec_bot_igbt_off, respectively.
skyper? 32 r 14 2007-01-19 ? rev05 ? by semikron external boost capacitors (bc) the rated gate charge of the driver may be increase by additional boost capacitors to drive igbt with large gate capacitance. connection external boost capacitors dimensioning of c boost ? c boost15p [f] = q ge [c] 1/v - 2,2f ? c boost8n [f] = q ge [c] 2/v - 4,7f ? q ge : gate charge of the igbt @ v ge = -7 ?+15v ? minimum rated voltage c boost15p : 25v ? minimum rated voltage c boost8n : 16v ? type of capacitor: ceramic capacitor please consider the maximum rating four output charge per pulse of the gate driver. application hints sec_top_pwr_15p sec_top_gnd user side sec_top_pwr_15p sec_top_pwr_8n sec_top_pwr_8n sec_top_gnd c boost15p c boost8n sec_bot_pwr_15p sec_bot_gnd sec_bot_pwr_15p sec_bot_pwr_8n sec_bot_pwr_8n sec_bot_gnd c boost15p c boost8n the external boost capacitors should be connected as close as possible to the gate driver and to have low inductance. application example connection schematic 1nf 100 v +15v 1nf 100 v input bot input top 1nf 100 v 220f 35 v error out 1nf 100 v 4,75k by203/20 s dc+ 10k 16 v 4,7f 2,2f 25 v by203/20 s 10k 4,7f 16 v 2,2f 25 v dc- load 18k 330pf 50 v ron roff 18k 330pf 50 v ron roff sec_top_vce_cfg sec_top_vce_in sec_top_15p sec_top_15p sec_top_gnd sec_top_igbt_on sec_top_gnd sec_top_igbt_off sec_bot_vce_cfg sec_bot_vce_in sec_bot_15p sec_bot_15p sec_bot_gnd sec_bot_igbt_on sec_bot_gnd sec_bot_igbt_off prim_pwr_gnd prim_pwr_gnd prim_nerror_out prim_nerror_in prim_pwr_gnd prim_pwr_gnd prim_top_in prim_bot_in prim_pwr_15p prim_pwr_15p skyper tm 32 sec_top_8n sec_top_8n sec_bot_8n sec_bot_8n - application example for 1200v igbt - q out/pulse = 5c - v ceref = 5,5v - t bl = 5,5s
skyper? 32 r 15 2007-01-19 ? rev05 ? by semikron mounting notes soldering hints drill hole & pad size in mm the temperature of the solder must not exceed 260c, and solder time must not exceed 10 seconds. the ambient temperature must not exceed the specified maximum storage temperature of the driver. the solder joints should be in accordance to ipc a 610 revision d (or later) - class 3 (acceptability of electronic assemblies) to ensure an optimal connection between driver core and printed circuit board. the connection between driver core and printed circuit board should be mechanical reinforced by using support posts. use of support posts product information of suitable support posts and distributor contact information is available at e.g. http://www.richco-inc.com (e.g. series dlmspm, lcbst ). environmental conditions the driver core is type tested under the environmental conditions below. conditions values (max.) vibration sinusoidal sweep 20hz ? 500hz, 5g, 26 sweeps per axis (x, y, z) - tested acc. iec 68-2-6 - connection between driver core and printed circuit board mechanical reinforced by using support posts. shock half-sinusoidal pulse, 5g, shock width 18ms, 3 shocks in each direction (x, y, z), 18 shocks in total - tested acc. iec 68-2-27 - connection between driver core and printed circuit board mechanical reinforced by using support posts. the characteristics and further environmental conditions are indicated in the data sheet. please note: the use of agressive materials in cleaning and potting process of driver core may be detrimental for the device parameters. if the driver core is coated by the user, any warranty (gew?hrleistung) expires. please note: the driver is not suited for hot air reflow or infrared reflow processes.
skyper? 32 r 16 2007-01-19 ? rev05 ? by semikron marking every driver core is marked. the marking contains the following items. part marking information 1. semikron part number (8 digits) + version number (2 digits) 2. date code (4 digits): yyww 3. continuous number referred to date coce (4 digits) 4. data matrix code the data matrix code is described as follows: ? type: eec 200 ? standard: ico / iec 16022 ? cell size: 0,254 - 0,3 mm ? dimension: 5 5 mm ? the following data is coded: n o p q r xxxxxxxxyy zzzz vvvv n 8 digits 2 digits part number version number o 1 digit blank p 4 digits date code q 1 digit blank r 4 digits continuous number disclaimer semikron reserves the right to make changes without further notice herein to improve reliability, function or design. information furnished in this document is believed to be accurate and reliable. however, no representation or warranty is given and no liability is assumed with respect to the accuracy or use of such information. semikron does not assume any liability arising out of the application or use of any pro duct or circuit described herein. furthermore, this technical information may not be considered as an assurance of com ponent characteristics. no warranty or guarantee expressed or implied is made regarding delivery, performance or suitabi lity. this document supersedes and replaces all information previously supplied and may be supersede by updates without further notice. semikron products are not authorized for use in life suppor t appliances and systems without the express written approval by semikron. www.semikron.com

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