TESDV5V0A steering diode structure esd protection array small signal diode ? meet iec61000-4-4 (eft) rating. 40a (5/50 ?s) ? protects four high speed i/o lines ? working voltage : 5v min max min max 1.80 2.00 0.071 0.079 ? case : sot-363 standard package, molded plastic 1.15 1.35 0.045 0.053 0.15 0.30 0.006 0.012 - 1.10 - 0.043 ? notebooks, desktops, servers and video graphics cards ? monitors and flat panel displays ? portable instrumentation ? set top box part no. package packing marking TESDV5V0A sot-363 3k / 7" reel b54 maximum ratings and electrical characteristics maximum ratings electrical characteristics 1ma 5v 1a 3a ? pb free version, rohs compliant, and halogen free g unit (mm) unit (inch) 0.42 0.017 d a b c 0.051 bsc c v 6 - -2 5 - 15 1 pf w units a v ua 0.083 bsc 2 (typ.) ? terminal: matte tin plated, lead free, solderable per mil-std-202, method 202 guaranteed ? meet iec61000-4-2 (esd) 15kv (air), 8kv (contact) ? marking code : b54 ? molding compound flammability rating : ul 94v-o features mechanical data e dimensions ? high temperature soldering guaranteed: 260 c/10s kv type number rating at 25 c ambient temperature unless otherwise specified. peak pulse power (tp=8/20 s waveform) ? weight :8 mg (approximately) ordering information symbol packing code v esd max junction and storage temperature range p pp t j , t stg 150 peak pulse current (tp = 8/20 s) i pp 3 type number vc reverse breakdown volta g i r = reverse leakage current i pp = clamping voltage v reverse stand-off voltage units applications pin confi g utation ? usb power & data line protection rfg 16 8 symbol v rwm - f sot-363 5 esd per iec 61000-4-2 (air) esd per iec 61000-4-2 (contact) value . -55 to + 150 . min junction capacitance i pp = v r = 1.30 bsc 2.10 bsc c j i r v (br) v r =0v, f=1.0mhz - version : a11 1 io#1 2 gnd 3 io#2 6 io#4 5 vdd 4 io#3
TESDV5V0A steering diode structure esd protection array small signal diode rating and characteristic curves ambient tempeatature ( o c) fig 4 typical junction capacitance 0 0.4 0.8 1.2 1.6 2 012345 normalized capacitance 0 5 10 15 20 25 30 012345 clamping voltage (v) fig 5 clamping voltage vs. peak pulse current peak pulse current (a) waveform parameters: tr = 8 s, td = 20 s reverse voltage (v) fig 2 pulse waveform 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 25 30 percent of i pp 0.01 0.1 1 10 0.1 1 10 100 1000 peak pulse power ppp (kw) pulse duration (us) time (us) fig 1 non-repetitive peak pulse power vs. pulse time waveform parameters: tr = 8 s, td = 20 s fig 3 admissible power dissipation curve 0 40 80 120 160 200 0 20 40 60 80 100 120 140 160 180 power rating (%) f = 1.0mhz td=ipp/2 e -1 version : a11
TESDV5V0A steering diode structure esd protection array small signal diode applications information ? tesds5v0alc incorporates eight surge rated, low capacitance steering diodes and a tvs diode in a single package ? during transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground ? the internal tvs diode prevents over-voltage on the power line, protecting any downstream components circuit board layout recommendations ? data line protection using internal tvs diode as reference ? designed to protect protect high speed data interfaces ? data line and power supply protection using vcc as reference ? data line protection with bias and power supply isolatio n ? designed to protect four data lines from transient over-voltages by clamping them to a fixed reference ? to protect data lines and the power line, connect pin 5 directly to the vdd. in this configuration the data lines are referenced to the supply voltage. the internal tvs diode prevents over-voltage on the supply rail. ? the tesds5v0alc can be isolated from the power supply by adding a series resistor between pin 5 and vdd. a value of 100k ? is recommended. the internal tvs and steering diodes remain biased, providing the advantage of lower capacitance. 2in applications where no positive supply reference is available, or complete supply isolation is desired, the internal tvs may be used as the reference. in this case, pin 5 is not connected. the steering diodes will begin to conduct when the voltage ? designed to protect protect sensitive components which are connected to data and transmission lines from overvoltage caused by electrostatic discharge (esd), electrical fast transients (eft), and lightning. i/o#1 i/o#2 i/o#3 i/o#4 to protected device to protected device i/o#1 i/o#2 i/o#3 i/o#4 to protected device to protected device vdd i/o#1 i/o#2 i/o#3 i/o#4 to protected device to protected device vdd 100k ? version : a11
TESDV5V0A steering diode structure esd protection array small signal diode tape & reel specification suggested pad layout note 1: a 0 , b 0 , and k 0 are determined by component size. the clearance between the components and the cavity must be within 0.05 mm min. to 0.5 mm max. the component cannot rote more than 10 o within the determined cavity. note 2: if b 1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. note 3: the suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary despending on application. item symbol dimension ( mm ) carrier depth k 1.22 max. sprocket hole d 1.50 +0.10 reel outside diameter a 180 1 reel inner diameter d1 50 min. feed hole width d2 13.0 0.5 sprocke hole position e 1.75 0.10 sprocke hole pitch p0 4.00 0.10 embossment center p1 2.00 0.10 overall tape thickness t 0.6 max. tape width w 8.30 max. reel width w1 14.4 max. dimensions unit (inch) unit (mm) a 0.073 1.85 b 0.039 1.00 c 0.026 0.65 d 0.0 16 0.40 e 0.033 0.85 f 0.106 2.70 direction of feed top cover tape carieer tape any additional label (if required) tsc label w1 d1 d2 a version : a11 for machine reference only including draft and radll concentric around b 0 t top cover tape see note1 b0 k center lines of cavity f e w for components 2.0mm x 1.2mm and larger d' d p1 10 pitches cumulative tolerance on tape 2.0mm ( 0.008") b 0 embossment a 0 k 0 b 1 p0 c d a b e f
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