![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
original creation date: 01/06/99 last update date: 04/05/99 last major revision date: 04/01/99 mnclc432a-x rev 0a0 microcircuit data sheet dual wideband monolithic op amp general description the clc432 is a current-feedback amplifier that provides a wide bandwidth and high slew rate for applications where board density and power are key considerations. this amplifier provides a dc-coupled small signal bandwidth exceeding 92mhz while consuming only 7ma per channel. operating from +15v supplies, the clc432's enhanced slew rate circuitry delivers large-signal bandwidths with output voltage swings up to 28vpp. a wide range of bandwidth-insensitive gains are made possible by virtue of the clc432's current-feedback topology. the large common-mode input range and fast settling time (70ns to 0.05%) makes this amplifier well suited for ccd & data telecommunication applications. many high performance video applications requiring signal gain and/or switching will be satisfied with the clc432 due to it's very low differential gain and phase errors (less than 0.1% and 0.1 degrees; av = +2v/v at 4.43mhz into 150ohms load). quick 8ns rise and fall times on 10v pulses allow the clc432 to drive either twisted pair or coaxial transmission lines over long distances. the clc432's combination of low input voltage noise, wide common-mode input voltage range and large output voltage swings makes it especially well suited for wide dynamic range signal processing applications. ns part numbers CLC432AJ-QML industry part number clc432a prime die lb1792a controlling document 5962-9472502mpa processing mil-std-883, method 5004 quality conformance inspection mil-std-883, method 5005 subgrp description temp ( c) o 1 static tests at +25 2 static tests at +125 3 static tests at -55 4 dynamic tests at +25 5 dynamic tests at +125 6 dynamic tests at -55 7 functional tests at +25 8a functional tests at +125 8b functional tests at -55 9 switching tests at +25 10 switching tests at +125 11 switching tests at -55 1
microcircuit data sheet mnclc432a-x rev 0a0 features - wide bandwidth: 92mhz (av = +1) 62mhz (av = +2) - fast slew rate: 2000v/us - fast disable: 1us to high-z output - high channel isolation: 70db at 10mhz - single or dual supplies: +5v to +16.5v applications - video signal multiplexing - twisted-pair differential driver - ccd buffer & level shifting - discrete gain-select amplifier - transimpedance amplifier 2 microcircuit data sheet mnclc432a-x rev 0a0 (absolute maximum ratings) (note 1) supply voltage (vs) +16.5 v dc output current (iout) 100ma common mode input voltage (vcm) +vs differential input voltage(vid) +10 v maximum power dissipation (pd) (note 2) 1.02w lead temperature +300 c (soldering, 10 seconds) junction temperature (tj) +175 c storage temperature range -65 c to +150 c thermal resistance junction -to-ambient (thetaja) 128 c/w ceramic dip (still air) 67 c/w (500 lfpm) junction -to-case (thetajc) 23 c/w ceramic dip package weight (typical) tbd ceramic dip esd tolerance (note 3) 2000 v esd ratings note 1: absolute maximum ratings are limits beyond which damage to the device may occur. operating ratings are conditions for which the device is functional, but do not guarantee specific performance limits. for guaranteed specifications and test conditions see the electrical characteristics. the guaranteed specifications apply only for the test conditions listed. some performance characteristics may degrade when the device is not operated under the listed test conditions. note 2: the maximum package power dissipation must be derated at elevated temperatures and is dictated by tjmax (maximum junction temperature), thetaja (package junction to ambient thermal resistance), and ta (ambient temperature). the maximum allowable package power dissipation at any temperature is pdmax = (tjmax -ta) / thetaja or the number given in the absolute maximum ratings, whichever is lower. note 3: human body model, 100 pf discharged through 1.5k ohms. 3 microcircuit data sheet mnclc432a-x rev 0a0 recommended operating conditions supply voltage (vs) +15v dc gain range (av) +1 v/v to +10 v/v ambient operating temperature range (ta) -55 c to +125 c 4 mnclc432a-x rev 0a0 microcircuit data sheet electrical characteristics dc parameters: static and dc tests (the following conditions apply to all the following parameters, unless otherwise specified.) dc: vs = +15v dc, av = +2, and load resistance (rl) = 100ohms. gain resistance (rg) and feedback resistance (rf) equals 750ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups ibn input bias current, noninverting -8 +8 ua 1, 2 -18 +18 ua 3 ibi input bias current, inverting -6 6 ua 1, 2 -9 9 ua 3 vio input offset voltage -6 6 mv 1, 3 -9 9 mv 2 dibn average input bias current drift, noninverting ta = +125 c, -55 c 1 -150 150 na/c 2, 3 dibi average input bias current drift, inverting ta = +125 c, -55 c 1 -40 40 na/c 2, 3 dvio average input offset voltage drift ta = +125 c, -55 c 1 -50 50 uv/c 2, 3 icc supply current no load 15.8 ma 1, 2 19.6 ma 3 psrr power supply rejection ratio +vs = +4.0v to +5.0v, -vs = -4.0v to -5.0v 59 db 4, 6 57 db 5 cmrr common mode rejection ratio vcm = +1v 158 db4 1 56 db 5, 6 5 mnclc432a-x rev 0a0 microcircuit data sheet electrical characteristics ac parameters: frequency domain tests (the following conditions apply to all the following parameters, unless otherwise specified.) ac: vs = +15v dc, av = +2, and load resistance (rl) = 100ohms. gain resistance (rg) and feedback resistance (rf) equals 750ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups ssbw small signal bandwidth -3 db bandwidth, vout < 4.0 vpp 42 mhz 4 2 34 mhz 5 2 42 mhz 6 lsbw large signal bandwidth -3 db bandwidth, vout < 10 vpp 1 21 mhz 4, 6 1 17 mhz 5 gfph gain flatness peaking high 0.1 mhz to 100 mhz, vout < 4.0 vpp 0.5 db 4 2 0.9 db 5, 6 gfr gain flatness rolloff 0.1 mhz to 20 mhz, vout < 4.0 vpp 0.8 db 4 2 0.8 db 5, 6 dg differential gain 4.43 mhz 1 0.18 % 4, 6 1 0.22 % 5 dp differential phase 4.43 mhz 1 0.18 deg. 4, 6 1 0.32 deg. 5 lpd linear phase deviation dc to 20mhz, vout < 4.0 vpp 1 1.8 deg. 4, 6 1 2.3 deg. 5 6 mnclc432a-x rev 0a0 microcircuit data sheet electrical characteristics ac parameters: distortion and noise tests (the following conditions apply to all the following parameters, unless otherwise specified.) ac: vs = +15v dc, av = +2, and load resistance (rl) = 100ohms. gain resistance (rg) and feedback resistance (rf) equals 750ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups hd2 2nd harmonic distortion 2 vpp at 10 mhz 38 dbc 4 2 33 dbc 5 2 38 dbc 6 hd3 3rd harmonic distortion 2 vpp at 10 mhz 48 dbc 4 2 48 dbc 5, 6 vn input noise voltage > 1 mhz 1 4.2 nv/sq rthz 4, 6 1 4.7 nv/sq rthz 5 -icn inverting input noise current > 1 mhz 1 16 pa/sq rthz 4, 5 1 18 pa/sq rthz 6 +icn noninverting input noise current > 1 mhz 1 2.5 pa/sq rthz 4 1 2.8 pa/sq rthz 5, 6 ac parameters: timing tests (the following conditions apply to all the following parameters, unless otherwise specified.) ac: vs = +15v dc, av = +2, and load resistance (rl) = 100ohms. gain resistance (rg) and feedback resistance (rf) equals 750ohms. -55 c < ta < +125 c (note 3). sr slew rate vout = +10 v step 1 1500 v/us 9 1 1400 v/us 10, 11 tr, tf rise and fall time 10 v step 1 12 ns 9, 11 114ns10 ts settling time 2v step at 0.05% of the fixed value 1 100 ns 9, 11 1 120 ns 10 os overshoot 2 v step, 1 ns rise/fall 1 10 % 9, 11 114%10 7 mnclc432a-x rev 0a0 microcircuit data sheet electrical characteristics dc parameters: perfomance tests (the following conditions apply to all the following parameters, unless otherwise specified.) dc: vs = +15v dc, av = +2, and load resistance (rl) = 100ohms. gain resistance (rg) and feedback resistance (rf) equals 750ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups r+in positive input resistance 1 16 mohms 4, 5 1 5 mohms 6 c+in positive input capacitance 1 1 pf 4, 5, 6 vout output voltage range no load 1 -13.6 +13.6 v 1, 2 1 -13.2 +13.2 v 3 voutl output voltage range rl = 100ohms 1 -3.7 +3.7 v 1, 2 1 -2.7 +2.7 v 3 cmir common mode input voltage range 1 12 v 1, 2 1 11.5 v 3 iout output current 1 38 ma 1, 2 128 ma3 ac parameters: switching tests (the following conditions apply to all the following parameters, unless otherwise specified.) ac: vs = +15v dc, av = +2, and load resistance (rl) = 100ohms. gain resistance (rg) and feedback resistance (rf) equals 750ohms. -55 c < ta < +125 c (note 3). ton switching turn on time vin = 4 vpp at 10 mhz 1 150 us 9, 10 1 170 us 11 toff switching turn off time vin = 4 vpp at 10 mhz 1 1000 us 9, 11 1 1400 us 10 vih disable logic high input voltage single ended mode 1 2 v 1, 2, 3 vil disable logic low input voltage single ended mode 1 0.8 v 1, 2, 3 idin disable logic maximum input current dis = vil to vih 1 180 ua 1, 2 1 210 ua 3 vmin minimum differential voltage dis = vil to vih 1 0.4 v 1, 2 1 0.5 v 3 8 mnclc432a-x rev 0a0 microcircuit data sheet electrical characteristics ac parameters: isolation tests (the following conditions apply to all the following parameters, unless otherwise specified.) ac: vs = +15v dc, av = +2, and load resistance (rl) = 100ohms. gain resistance (rg) and feedback resistance (rf) equals 750ohms. -55 c < ta < +125 c (note 3). symbol parameter conditions notes pin- name min max unit sub- groups xtlk crosstalk, input referred isolation 10 mhz 1 64 db 4, 5, 6 iso off isolation 10 mhz 1 53 db 4, 5, 6 note 1: if not tested, shall be guaranteed to the limits specified in table i note 2: group a testing only. note 3: the algebraic convention, whereby the most negative value is a minimum and most positive is a maximum, is used in this table. negative current shall be defined as convential current flow out of a device terminal. 9 microcircuit data sheet mnclc432a-x rev 0a0 graphics and diagrams graphics# description 07082hra2 cerdip (j), 8 lead (b/i ckt) j08arl cerdip (j), 8 lead (p/p dwg) p000405a cerdip (j), 8 lead (pinout) see attached graphics following this page. 10 n mil/aerospace operations 2900 semiconductor drive santa clara, ca 95050 1 8 2 7 3 6 4 5 clc432j 8 - lead dip top view connection diagram p000405a v out1 v inv1 v non-inv1 -v cc v out2 +v cc v non-inv2 v inv2 microcircuit data sheet mnclc432a-x rev 0a0 revision history rev ecn # rel date originator changes 0a0 m0003352 04/05/99 shaw mead initial mds release 11 |
Price & Availability of CLC432AJ-QML
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |